JPH0281046U - - Google Patents
Info
- Publication number
- JPH0281046U JPH0281046U JP15950888U JP15950888U JPH0281046U JP H0281046 U JPH0281046 U JP H0281046U JP 15950888 U JP15950888 U JP 15950888U JP 15950888 U JP15950888 U JP 15950888U JP H0281046 U JPH0281046 U JP H0281046U
- Authority
- JP
- Japan
- Prior art keywords
- socket
- circuit
- eprom
- switch
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
Landscapes
- Connecting Device With Holders (AREA)
- Semiconductor Memories (AREA)
Description
第１図は本考案の一実施例の斜視図、第２図は
、ＲＯＭがｉｃソケツト、または、ｉｃソケツト
がプリント基板に異常な装置状態となつた時にオ
ンする検知スイツチの断面図、第３図は、短絡動
作をロツクする防止スイツチの断面図、第４図は
本考案の回路図、第５図は上書きタイム図である
。
２……短絡スイツチ、３……電池格納部、４…
…ロツク板、１２……電池、１３……保護スイツ
チ、１５……書込回路、１６……分圧回路、１７
……アドレス／データ発生回路、１８……書込制
御信号発生回路。
Fig. 1 is a perspective view of an embodiment of the present invention, Fig. 2 is a sectional view of a detection switch that is turned on when the ROM is connected to the IC socket or the IC socket is in an abnormal device state on the printed circuit board. The figure is a sectional view of a prevention switch that locks the short-circuit operation, FIG. 4 is a circuit diagram of the present invention, and FIG. 5 is an overwriting time diagram. 2...Short-circuit switch, 3...Battery storage section, 4...
...Lock plate, 12...Battery, 13...Protection switch, 15...Writing circuit, 16...Voltage dividing circuit, 17
...Address/data generation circuit, 18...Write control signal generation circuit.
Claims (1)
、プリント基板から前記ｉｃソケツトが離脱され
そうになると前記ＥＰＲＯＭの内容を破壊する回
路を設けたことを特徴とする保護機能付ｉｃソケ
ツト。 An IC socket with a protection function, characterized in that a circuit is provided to destroy the contents of the EPROM when the IC socket is about to be removed from the EPROM mounted in the IC socket or from a printed circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15950888U JPH0281046U (en) | 1988-12-09 | 1988-12-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15950888U JPH0281046U (en) | 1988-12-09 | 1988-12-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0281046U true JPH0281046U (en) | 1990-06-22 |
Family
ID=31440784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15950888U Pending JPH0281046U (en) | 1988-12-09 | 1988-12-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0281046U (en) |
-
1988
- 1988-12-09 JP JP15950888U patent/JPH0281046U/ja active Pending
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