JPH0282121U - - Google Patents
Info
- Publication number
- JPH0282121U JPH0282121U JP16108888U JP16108888U JPH0282121U JP H0282121 U JPH0282121 U JP H0282121U JP 16108888 U JP16108888 U JP 16108888U JP 16108888 U JP16108888 U JP 16108888U JP H0282121 U JPH0282121 U JP H0282121U
- Authority
- JP
- Japan
- Prior art keywords
- output
- divider
- removal circuit
- voltage
- diode mixer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 230000010355 oscillation Effects 0.000 claims 2
- 230000001934 delay Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Amplitude Modulation (AREA)
Description
第１図はこの考案による周波数変調器の全体構
成図、第２図は直流除去回路の電気接続図、第３
図は従来の技術による周波数変調器の全体構成図
、第４図はオフセツト補償回路の電気接続図であ
る。
図において、１は電圧制御発振器、２は分配器
、３はデイレイライン、４はダイオードミキサ、
５は直流除去回路、６は変調器、７は誤差増幅器
、８はコンデンサ、９は抵抗、１０はアンプ、１
１はオフセツト補償回路、１２は可変抵抗器、１
３，１４は抵抗である。なお、図中、同一符号は
同一、又は相当部分を示す。
Figure 1 is an overall configuration diagram of the frequency modulator according to this invention, Figure 2 is an electrical connection diagram of the DC removal circuit, and Figure 3 is an electrical connection diagram of the DC removal circuit.
This figure is an overall configuration diagram of a frequency modulator according to the prior art, and FIG. 4 is an electrical connection diagram of an offset compensation circuit. In the figure, 1 is a voltage controlled oscillator, 2 is a distributor, 3 is a delay line, 4 is a diode mixer,
5 is a DC removal circuit, 6 is a modulator, 7 is an error amplifier, 8 is a capacitor, 9 is a resistor, 10 is an amplifier, 1
1 is an offset compensation circuit, 12 is a variable resistor, 1
3 and 14 are resistances. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
器、その発振周波数を変調する信号を作る変調器
、発振信号を分配する分配器、分配器からの出力
を遅らせるデイレイライン、デイレイラインから
の出力と、分配器からの出力を掛け合わせるダイ
オードミキサ、コンデンサを用いてダイオードミ
キサからの出力における直流成分を取り除く抵抗
とコンデンサから成る直流除去回路、前述直流除
去回路出力と、変調信号とを比較し、誤差出力を
電圧制御発振器に与える誤差増幅器を備えたこと
を特徴とする周波数変調器。 A voltage-controlled oscillator whose frequency is varied by a control voltage, a modulator that creates a signal that modulates the oscillation frequency, a divider that distributes the oscillation signal, a delay line that delays the output from the divider, an output from the delay line, and a divider. A diode mixer that multiplies the output from the diode mixer, a DC removal circuit consisting of a resistor and a capacitor that uses a capacitor to remove the DC component in the output from the diode mixer, and a DC removal circuit that compares the output of the DC removal circuit described above with the modulation signal and calculates the error output as a voltage. A frequency modulator characterized by comprising an error amplifier feeding a controlled oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16108888U JPH0282121U (en) | 1988-12-12 | 1988-12-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16108888U JPH0282121U (en) | 1988-12-12 | 1988-12-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0282121U true JPH0282121U (en) | 1990-06-25 |
Family
ID=31699570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16108888U Pending JPH0282121U (en) | 1988-12-12 | 1988-12-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0282121U (en) |
-
1988
- 1988-12-12 JP JP16108888U patent/JPH0282121U/ja active Pending
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