JPH028243U - - Google Patents
Info
- Publication number
- JPH028243U JPH028243U JP1988086993U JP8699388U JPH028243U JP H028243 U JPH028243 U JP H028243U JP 1988086993 U JP1988086993 U JP 1988086993U JP 8699388 U JP8699388 U JP 8699388U JP H028243 U JPH028243 U JP H028243U
- Authority
- JP
- Japan
- Prior art keywords
- level
- demodulated signal
- demodulating
- converting
- detecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 8
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 3
- 230000008929 regeneration Effects 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Transceivers (AREA)
- Dc Digital Transmission (AREA)
- Mobile Radio Communication Systems (AREA)
Description
第１図は、この考案の一実施例の無線通信装置
における復調回路を説明するためのブロツク図、
第２図は第１図の復調回路に入力されるる信号を
説明するための図、第３図は第１図の誤差信号生
成回路を説明するための図、第４図は第１図の積
分器を説明するための図、第５図はこの考案の他
の実施例の復調回路である自動レベルコントロー
ル回路を示すブロツク図、第６図は第５図の誤差
信号生成回路を示す図、第７図は従来の復調回路
を示す図、第８図は従来の他の復調回路を示す図
である。
１１……受信アンテナ、１２……高周波・中間
周波部周波数弁別器、１３……ローパスフイルタ
、１４……減算器、１５……データ判定回路、１
６……直流レベル検出回路１６、１７……Ａ／Ｄ
コンバータ、１８……クロツク再生回路、１９…
…誤差信号生成回路、２０……積分器、２１……
Ｄ／Ａコンバータ。
FIG. 1 is a block diagram for explaining a demodulation circuit in a wireless communication device according to an embodiment of the invention;
Fig. 2 is a diagram for explaining the signal input to the demodulation circuit in Fig. 1, Fig. 3 is a diagram for explaining the error signal generation circuit in Fig. 1, and Fig. 4 is a diagram for explaining the signal input to the demodulation circuit in Fig. 1. 5 is a block diagram showing an automatic level control circuit which is a demodulation circuit of another embodiment of this invention. FIG. 6 is a diagram showing an error signal generation circuit of FIG. 5. FIG. 7 is a diagram showing a conventional demodulation circuit, and FIG. 8 is a diagram showing another conventional demodulation circuit. 11...Receiving antenna, 12...High frequency/intermediate frequency section frequency discriminator, 13...Low pass filter, 14...Subtractor, 15...Data determination circuit, 1
6...DC level detection circuit 16, 17...A/D
Converter, 18...Clock regeneration circuit, 19...
...Error signal generation circuit, 20...Integrator, 21...
D/A converter.
Claims (1)
ルおよび下限レベルを求めこれらの平均である直
流レベルを検出するレベル検出手段と、 予め設定された基準直流レベルに基づいて前記
復調信号とデイジタル信号に変換する変換手段と
、 前記レベル検出手段により得られた直流レベル
と前記基準直流レベルとの差から誤差情報を求め
この誤差情報に基づいて前記復調信号の直流レベ
ルを変動させる制御手段と を具備する無線通信装置。[Claims for Utility Model Registration] Demodulating means for demodulating a received signal to obtain a demodulated signal, and level detecting means for determining an upper limit level and a lower limit level from the waveform pattern of the obtained demodulated signal and detecting a DC level that is the average of these levels. and converting means for converting the demodulated signal into a digital signal based on a preset reference DC level; and determining error information from the difference between the DC level obtained by the level detection means and the reference DC level. A wireless communication device comprising: control means for varying the DC level of the demodulated signal based on information.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988086993U JPH028243U (en) | 1988-06-30 | 1988-06-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988086993U JPH028243U (en) | 1988-06-30 | 1988-06-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH028243U true JPH028243U (en) | 1990-01-19 |
Family
ID=31311630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988086993U Pending JPH028243U (en) | 1988-06-30 | 1988-06-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH028243U (en) |
-
1988
- 1988-06-30 JP JP1988086993U patent/JPH028243U/ja active Pending
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