JPH0282785A - Video signal recording system - Google Patents

Abstract

PURPOSE:To use a still video camera system as the recorder of the other video system without remodeling the system by dubbing a video signal from the outside to a medium, which is electrically freely. interchangeably coupled to the still video camera and loaded to the camera. CONSTITUTION:A recording adapter 80 has a signal converting circuit 81, which respectively converts input video signals into prescribed signal forms in a chroma system input signal line and a luminance system signal line and supplys them to the line corresponding to the respective signals out of the both lines. Further, the video signals from the outside at a different signal standard are converted into the video signals conforming to the standard of the still video camera system, and inputted to a camera 1 by using a dubbing terminal T of the camera. Thus, without the remodeling, the still video camera system can be used as the recording device of the other video system.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a video camera system, and particularly to a video camera system that is electrically detachably coupled to a still video camera and that transmits external video signals to a medium loaded in the camera. The present invention relates to a video signal recording system that enables dubbing.

[Prior Art] A camera-integrated video tape recorder has already been developed in which a video tape recorder for playing back recorded images shot and recorded by the same camera is detachably connected to a video camera that uses video tape as a recording medium. It is well known.

In this type of video tape recorder, the camera is separated from the video tape recorder so that only the camera can be carried to take pictures, and when the camera is connected to the video tape recorder, reproduced images can be obtained.

On the other hand, still video cameras (ill! child still cameras) have recently appeared that use a still video floppy disk, which has the same structure as a floppy disk, as a recording medium, and in this camera as well, the image playback processor can be attached and detached electrically and mechanically. The system is configured such that the images taken by the camera alone are recorded on the still video floppy built in the camera, and the camera is connected to an image playback processor to play back the recorded images on the still video floppy and display or hard copy. It is possible to obtain and appreciate the images.

By the way, in such a still video camera,
In order to improve the portability of the camera, the camera has a built-in minimum number of functional parts, including the photographic function part necessary for recording and the magnetic recording/playback part, and the functional parts necessary for playback and a large-capacity power supply part. etc. are all placed in the image reproduction processor, which does not require portability, in order to make the camera smaller and lighter. Here, an example of such a still video camera system is shown in FIGS. 3 to 6.

As shown in the figure, the still video camera l and the image playback processor 20 have substantially the same shape and the same dimensions, and the camera l is located above the middle part of the main body on one side, from the front to the back. The photographic lens barrel 2 has a box-like shape with its upper portion partially exposed. A finder convex portion is provided on the rear end surface side of the photographic lens barrel 2 on the rear surface 1a of the main body.

The finder convex portion is provided with an eyecup 4 made of rubber or elastic synthetic resin and having an eyepiece 3 therein (see FIG. 5), from which the subject is viewed. Further, although not shown, a zoom operation ring 5 for operating a zoom switch is provided in the lens barrel section immediately in front of the eye cup 4, and a release button 6 is provided in the front section.
An opening/closing lid 7, which also serves as a main switch operating member, is disposed below the eyecup 4 on the back side of the main body of the camera 1 so as to be slidable laterally.

As shown in Fig. 3, when the opening/closing lid moves inward on the back side and closes the connector opening 8 (see Fig. 4), the main switch SN of the camera (see Fig. 7) is closed. is open, and when the opening/closing cover 7 is slid in the direction of the arrow to open the connector opening 8 as shown in FIG. 4, the main switch MS is closed and the main battery inside the camera l is connected to the electric circuit. Camera 1 is now ready for use. In addition, a connector jack 48 (see FIG. 7) is provided in the connector intake port B, and this jack 48 has a connector at the end of a short cable CB pulled out from the front of the image reproduction processor 20. plug 22
When the electric circuit in the camera l is connected to the commercial AC power supply via the image reproduction processor 20 connected to the commercial AC power supply, the electric circuit in the camera l is supplied from the image reproduction processor 20 side to the electric circuit in the camera l. Image reproduction operations are performed through the circuit.

Further, this camera (2) is provided with a display 9 for displaying various information using, for example, a liquid crystal panel and operation buttons for various switches on the rear surface 1a near the viewfinder convex portion. The display 9 displays the operating status of the various switches, shooting modes such as some modes, snapshot mode, strobe off mode, and presence/absence of batteries, etc., and the track number (number of frames). etc. are displayed numerically on a 7-segment LCD (liquid crystal) display, and around it are strobe light emitting windows and switches 111. Buzzer off red switch 12, drive switch 13, self-timer switch 14,
Erase mode switch 15, clock set fist switch 1B
, a group of operation buttons for various switches such as a clock mode switch 17 are provided. In addition, an insertion slot 18 for autoloading a still video floppy IO (see Figure 6), which is a recording medium, is provided near the rear of the other side (left side in the figure) of the main body of the camera l. When a video floppy lO is inserted, the still video floppy 10 is automatically loaded into a predetermined recording/playback position within the camera l. Also, near this insertion slot 18, a loaded still video disc lO can be inserted into the camera/
An eject button is provided for ejecting the liquid to the outside. Further, although not shown in the drawings, the front surface of the camera l is provided with a photographic lens, an autofocus lens, a strobe light emitting window, an auto white balance window, and the like.

On the other hand, the image reproducing processor 20 is housed in a casing of approximately the same size as the camera 1, and by connecting the camera l to the front of the image reproducing processor 20 from its rear surface 1a, as shown in FIG. , the two can be combined.

The main body of the image reproduction processor 20 is formed with a recess 23 for inserting the eye cup 4 of the camera l at a position in contact with the lens barrel 2 when combined with the camera l.
A display 24 for displaying various status information and the like is provided on the top surface of the main body of the image reproduction processor 200. This display 2
4 is configured to display the same display content as the display 9 of camera 1 by the output signal from camera 1 when coupled with camera 1, and when coupled, the display 9 of camera 1 is blocked by the image reproduction processor 20. Because it becomes invisible,
It is intended to be used as a substitute display.

The display 24 uses, for example, an LED (light emitting element; a liquid crystal panel may also be used), and in addition to displaying the mode and track number etc. with the 7-segment LED element, it also displays functions specific to the image reproduction processor. It is possible to display certain multi-screen displays, intervals, etc. Further, a heat dissipation fin 25 is provided on the rear upper surface of the display 24 to dissipate heat accumulated inside the image reproduction processor 20. Further, on the top surface of the main body of the image reproduction processor 20, there are operation buttons 2B to 28 for mode switches, a stop switch 29, a start φ switch 30. A group of operation buttons such as an addition/subtraction switch 31 for adding and subtracting the number of frames are arranged, and on the side of the main body of the image reproduction program near the position where these operation buttons are arranged, there is a light receiving window section that receives infrared light for the remote control. 32 is provided, and by using a remote controller, the image reproduction processor 2o can be remotely controlled (remote controller).
You can. Further, near the lower edge of the surface facing the rear surface 1a of the camera, four connector storage parts 33 are provided, and the cable CB and the connector plug 22 can be stored in the connector storage recess 33 so as to be freely drawn out. be. In this stored state, the plug 22 and cable CB do not protrude beyond the image reproduction processor 2o. Incidentally, a power switch 34 is provided near the rear of one screen of the image reproduction processor 2o.

FIG. 7 shows the camera 1 and image reproduction processor 20 configured as described above.
FIG. 2 is a block diagram of the main parts of the circuit provided inside.

All circuits and drive system inside the camera are main CP040.
It is now controlled by software. That is, a drive motor 41 that rotates the still video floppy 10 loaded from the autoloading insertion slot 18 at high speed, a head access mechanism and a drive controller that control the movement of the magnetic recording/reproducing head 42 brought into contact with the still video floppy 10, etc. The disk control function section 101, which includes a magnetic recording/reproducing section such as a head access drive control 43, is controlled by a control signal from the main CPU 40.
The PU 40 generates the control signal and the LCD control signal to the LCD control display section 44 based on the signals from the various operation button groups. In addition, this main CP040 outputs a clock signal CK and a serial data output signal SO to the coupling pin of the connector jack 48 disposed in the connector intake port B, and these signals are transmitted to the image reproducing processor. 20 is input to sub CP050,
When confirmed by the check signal and serial data input signal S1, control of the main CPυ40 is transferred to the sub CPIJ50 in the image reproduction processor 20, and subsequent control on the camera 1 side is transferred to the sub CPIJ50 in the image reproduction processor zo through the main CPU 40. This is performed by the CPU 50. Therefore, in this coupled state, camera l
The control buttons on the side lose their functionality.

Further, the power supply inside the camera l consists of a main battery power supply 45 of large capacity of 12V and a backup power supply 4B using a button type battery. The backup power source 46 is connected to the main switch SH through a switching diode 47.
is connected to the switching terminal 9Ma of the above main battery power supply 4.
5 is connected to a switching terminal SMa of the main switch SH, and the main battery power supply 45 is connected to one switching fixed terminal SMb of the main switch SH. The other switching fixed terminal SMc of the switch SH is connected to the coupling pin of the connector jack 48, and when the image reproduction processor 2o is coupled, the power supply 51 in the image reproduction processor 2o connects the connector plug 22 and the jack 48. As shown, the switch SM is connected to the circuit inside the camera l via the switching fixed terminal SMc. Therefore, during this connection, the switching terminal SMa of the main switch SM is switched to the other switching fixed terminal SMe when the plug 22 is inserted, but during this switching operation and when the plug is removed from the jack 48, the switching terminal SMa is switched to one switching terminal SMe. During the switching operation in which the switching terminal SMa is switched to the fixed terminal SMb, there is a state in which the movable contact piece of the switching terminal SMa does not come into contact with any of the switching fixed terminals SMb and SMc, and in this case, the power supply to the circuit inside the camera is cut off. As a result, there is a risk that data in the memory circuit etc. will be lost, so in this state, the backup power supply 4B
is automatically connected and backed up. That is, the switching diode 47 is normally connected to the main battery power supply 45 or the power supply 5 in the processor 20.
1 is applied and is reverse biased, so it is in a non-conducting state, but during the above switching operation, the reverse bias is released and becomes forward biased, and the output of the backup power supply 46 is applied to the storage circuit, etc. These backups are provided. Further, in the main switch SM, the opening/closing cover of the connector opening 8 also serves as a switching operation member, and the opening/closing N7 closes the opening 8. When the switch terminal SM is at the solid line position shown in FIG.
The movable contact piece a is switched to the other fixed switching terminal SMc, disconnecting the main battery power source 45 and connecting only the backup power source 46 to the memory circuit. Furthermore, when the opening/closing lid 7 is moved to the position shown by the dotted line to open the opening 8, the movable contact piece of the switching terminal SMa is moved to the one switching fixed terminal S.
Switch to Mb and connect the main battery power supply 45 to the circuit,
The configuration is such that the camera 1 is brought into operation.

On the other hand, all of the circuits within the image reproduction processor 20 are controlled by commands from the sub CPU 50 as described above, and the sub CPU 050 is controlled by signals from the operation buttons of the image reproduction processor 20. In addition to outputting LED control signals etc. to the LED display circuit 52 etc., when connected to the camera 1, it receives the clock signal C and serial data output SO from the main CPU 40 in the camera 1, and outputs the aforementioned check signal and serial data input signal. Plug 22 into the main CPU 40 inside the camera,
The image reproduction signal is inputted through the jack 48, and is controlled through the main CPU 40 to control functional units including a magnetic recording/reproducing unit such as a head access mechanism. ). The power supply 51 of this image reproduction processor 20 uses a commercial power supply AC, converts it to DC, and uses it as a system power supply.
The main switch inside the camera is connected through the
It is also used as a power source for the camera 1.

Further, the magnetic recording/reproducing system is operated by the disk control function section 10 described above.
1 and a recording/reproducing section 102, and the recording/reproducing section 102 includes an imaging section 102a, a modulating section 1, 02, and a recording/reproducing section 102, as shown in FIG.
b, a recording section 102e, and a reproducing section 102d. Of these, the imaging unit 102a is composed of an imaging device such as a CCD, and captures a color image captured by a lens.
(luminance signal) + S (sync signal), R (red image signal) -
It converts into Y, B (blue image signal) - Y signals. Further, the modulating section 102b modulates and outputs these signals, and the recording section 102e amplifies a multiplexed signal of the modulated signals and outputs the signal as a magnetic recording signal to the disk control function section 101 for recording (not shown). This is what is given to the magnetic head. Further, the reproducing section 101d is for amplifying and outputting a signal read out from the magnetic head 42 of the disk control function section 101, and sending the amplified signal to the jack 48.

During photography, the signal of the image captured by the imaging unit 102a is modulated by the modulation unit 102b and sent to the recording unit 102c. Then, the recording section 102c amplifies this modulated signal and supplies it to the recording head. At this time, the main CPU 40 serving as a system controller commands the track number on the still video disk 10, which is a magnetic recording medium. , head access drive control 43 is activated to move recording head 42 to its commanded position and record image information on that track. Since the track number is updated every time a photograph is taken, images are magnetically recorded on new tracks one after another.

On the other hand, when the image reproduction processor 20 commands reproduction by specifying a track or without specifying a track, the main C
The specified or first track number on the still video floppy 10 is commanded from the PU 40, which activates the head access drive control 43 to control the magnetic head 4.
2 to the commanded position, and the image information recorded on the track is read out.

After this signal is amplified by the reproducing unit 101d, it is separated into a luminance signal Y and a chroma signal C by a Y/C separation circuit (not shown). Then, the luminance signal Y is subjected to PM demodulation by a demodulator 73a,
The A/D converter 74a converts the signal into a digital signal of predetermined bits (for example, 8 bits), the digital processing circuit 75a processes the signal waveform, and supplies the signal to the L terminal of the analog switch 21a. On the other hand, the chroma signal C is subjected to PM demodulation by a demodulator 73b, converted into a digital signal of predetermined bits (for example, 6 bits) by an A/D converter 74b, and subjected to signal waveform processing by a digital processing circuit 75b. Give it to the terminal. Analog switch 2 above
The H terminals of the analog switches 1a and 21b are connected to monochrome signal generating means 78a and 78b for generating blue signals for blueback, respectively, and the control input terminals CI of the analog switches 21a and 21b are connected with control signals Cont, 78b, respectively. This is a configuration that supplies l. Cont, 1 is obtained by detecting the output of the reproducing unit 102d with a detection circuit and delaying it by a delay line, and while there is a read signal, the analog switches 21a and 21b are switched to the L terminal, and other Now switch to the H terminal. Analog switch 21a.

The luminance and chroma signals Y and C that have passed through 21b are input to field memories 77a and 71b, respectively, and stored therein.

In addition, the signal passes from the H terminal of the analog switch 22a, 22b to the A/D converter 78a, 78b, and is connected to the encoder 7.
9, where it is encoded and output as an NTSC video signal. Analog switch 22a.

The control input terminal c1 of the sub-CPU 22b is set to "L" at normal times, and "H" at the end of head access.
A control signal Cont, 2 is applied, and the stored image signals in the field memories 77a and 77b are normally controlled, and when the head access is completed, the analog switch 21a is
, 21b are given and sent to A/D converters 78a and 78b, respectively.

On the other hand, in this reproduction system, the image reproduction outputs of the process circuits 75a and 75b are temporarily transferred to the field memories 11a and 17b.
It is stored in the memory so that it can be read at any time.

The stored information in the field memories 77a and 77b is configured to be outputted through the L terminals of the analog switches 22e and 22d when the control signal Cont,2 is L'', and is bypassed when it is H''. be. The field memories 77a and 77b use volatile memories and can store one frame or one field of image information. This stored information is then read out at appropriate timing and transferred to the D/A converters 78a and 78b.
After being analog-converted in
C format decoded color video signal, or Y-C
The signal is converted into a signal, sent to a monitor device (not shown), and displayed as an image.

In such a configuration, when the still video floppy lO1 or another still video floppy captured by the camera l is loaded into the camera l- and the recorded images are played back, the camera 1 and the image playback processor 20 are connected. First, as shown in FIG. 4, insert the connector plug 22 of the image reproduction processor 20 into the connector storage recess 3.
3 and insert it into the connector jack 48 in the exposed connector opening 8 by opening the opening/closing lid 7, which is the main switch operating member on the back surface 1a of the camera l.

As a result, the sub CPU 50 of the image reproduction processor 20
The main CPU 40 in the camera 1 is controlled by this, and the functional units including the magnetic recording/reproducing unit such as the head access mechanism and drive control are controlled.

Furthermore, since the cable CB is short, the front surface 20a of the image reproducing processor 20 will inevitably be close to the back surface 1a of the camera 1 when connected to the camera l; 4) into the recess 23 of the front surface 20a of the image reproducing processor 20, the camera l and the image reproducing processor 20 are linearly integrated and connected as shown in FIG. It has a nice design, and there is no stress on the connector.

[Problems to be Solved by the Invention] By the way, the image reproduction processor 20 reproduces/plays recorded images recorded on a still video floppy that is a magnetic recording medium.
When editing, this is used by connecting to camera 1. For editing, image information stored in the field memory of image playback processor 20 is sent to the recording/playback unit of camera 1 and magnetically transferred to still video floppy IO. It is now possible to re-record.

However, this function is for images from camera 1 in the combined state, and image signals from other video devices cannot be recorded.

In addition, camera 1 is equipped with a dubbing terminal T (see Figure 7) so that images can be sent and recorded from another camera in the still video camera system, but the still video camera system has a dubbing terminal T (see Figure 7). Since the device is configured to record and reproduce video signals based on the video signal, it cannot handle normal television video signals and the like.

On the other hand, there are many cases where it is desired to record television images, computer output, etc. as still photographs, and in such cases the only option is to obtain a hard copy using a video printer, which is very inconvenient.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a video signal recording system that allows a still/video camera number system to be easily used as a recording device for other video systems.

[Means for Solving the Problems] In order to solve the above-mentioned problems and achieve the object, the present invention takes the following measures. That is, a chroma input signal line serially supplies a chroma signal in a color difference line sequential manner to the recording/playback section, a luminance input signal line supplies a luminance signal to the recording/playback section, and an input video signal. A signal conversion circuit is provided for converting each of the chroma system input signal line and the luminance system input signal line into predetermined signal formats and supplying the signals to corresponding lines of both lines.

[Effects] By taking such measures, the following effects are achieved. In other words, when this camera is combined with a camera that has a storage medium that records video as a signal, records on this recording medium, and can read and output the recorded signal of this recording medium, the It consists of an image reproduction processor configured to process a reproduction signal from a recording medium installed in the camera, convert it into a video signal, and output it, and serially supplies a chroma signal in a time-division sequential manner. Video recording from external video equipment used in still video camera systems where luminance signals are multiplexed and supplied to the recording/playback unit for recording, and the playback signals are separated into chroma signals and luminance signals. The camera has a chroma input signal line connected to a signal line that serially supplies a chroma signal in a color difference line sequential manner to the recording/playback section of the camera, and a chroma input signal line that supplies a luminance signal to the recording/playback section of the camera. Dubbing terminals are provided for luminance input signal lines connected to the supplied signal lines, and in order to input and record video signals from external video equipment to these dubbing terminals, chroma input signal lines and luminance input signal lines are provided. A signal line is provided in which the input video signal is separately converted into a predetermined signal form for the chroma system input signal line and the luminance system input signal line, and is supplied to the line corresponding to each signal among both lines. By inputting an input video signal from a video system other than the still/video camera system to the signal conversion circuit, the input video signal can be converted to the chroma signal. The chroma input signal and luminance input signal are separately converted into predetermined signal formats on the system input signal line and the luminance system signal line and supplied to the corresponding lines, so the chroma system input signal and the luminance system input signal must be separately provided to the recording/reproducing section of the camera. Furthermore, since the signal is a chroma signal in the color difference line sequential format, which is the recording method of the camera, it can be recorded and played back by the camera.

Therefore, according to the present invention, it is possible to provide a video signal recording system that allows a still video camera system to be used as a recording device for other video systems.

[Example] Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

Here, the technology on which the present invention is based will be explained.

In a still video camera that uses a still video floppy as a magnetic recording medium, the magnetic recording medium is radially moved by a head access mechanism onto the magnetic surface of a magnetic disk based on a flexible thin circular plastic film. Image information is recorded concentrically by a moving recording/reproducing magnetic head, and when recording image information in a still video camera, up to 50 concentric recording tracks are arranged at equal intervals. , and one frame of image is recorded on each track.

As described above, the playback system for capturing and recording images with this still video camera is as shown in FIG.
When the track number desired for reproduction above is commanded, the head access drive control 43 is activated to move the magnetic head 42 to the relevant position, read the recorded image information of the specified track, and send the image information signal to the recording/reproducing section. 10
The data is supplied to the playback unit 102d of No.2. The video signal amplified by the reproduction section 102d is separated into a luminance signal Y and a chroma signal C by a Y/C separation circuit (not shown), and the luminance signal Y is
The demodulator 73a performs FM demodulation, and the A/D converter 74a performs 8
After the signal is converted into a bit digital signal and the signal waveform is processed by the digital processing circuit 75a, it is applied to the left side terminal of the analog switch 21a. Further, the chroma signal C is sent to the demodulator 73b, in the same way as the luminance signal Y, except that the digital value after A/D conversion is 6 bits.
The signal is applied to the terminal of the analog switch 21b via the A/D converter 74b and the process circuit 75b. Monochromatic signal generating means 76a and 78b are connected to the H side terminals of the analog switches 21a and 21b, respectively. A control voltage Cont,l is supplied to the control input terminal C1 of the analog switches 21a and 21b, and this control voltage Cont,l is supplied to the reproducing unit 10.
It is produced by detecting the output of 2d with a detection circuit (not shown), comparing it with a comparator, and delaying the obtained output through a delay line. The monochromatic signal generating means 76
The roles of the detection circuit, comparator, and delay line will be described later, but the analog switches 21a and 21
The luminance signal Y and chroma signal C that have passed through b are further supplied to analog switches 22a and 22b. Each control input terminal C1 of the analog switches 22a and 22b is supplied with a control voltage Con from the main CPU 40 which is normally at the "L" level and becomes the "H" level when the head access is completed.
, 2 are applied.

On the other hand, in this reproduction system, the image reproduction outputs of the process circuits 75a and 75b are temporarily stored in the field memories 77a and 77b.
The stored image reproduction signal can be read out at any time. This field memory 77
a, 77b are inserted into a circuit configured on the respective terminal sides of the analog switches 22a, 22b when the control voltage C0nt,2 is at L'' level, and the control voltage Cont,
, 2 is at "H# level," the analog switch 22
Since the terminals c and 22b are switched to the respective H terminals, the field memories 77a and 77b are bypassed.

The field memories 77a and 77b are formed of volatile memories and have a memory capacity capable of storing one frame or one field of image information, and the storage signals of the field memories 77a and 77b are stored as appropriate. The D/A converters 78a and 78b
After converting it into an analog signal, an encoder 79 adds a synchronization signal, a burst signal, etc. to form a composite color video signal of the NTSC system, for example, and converts it into a YC signal, which is then provided to a monitor device (not shown).

Here, the configuration and operation of the field memories 77a and 77b, including their peripheral circuits, will be briefly explained.

In general, the Y signal is treated as a single signal in the form of a mix of a luminance signal and a synchronization signal.
It is sufficient to write to and read data from each memory as usual, and there is no particular problem. However, in this case, the recording method of the chroma signal is somewhat unique, and the color difference signal R-Y and the color difference signal B-Y are
It is configured to write to the memory in a sequential manner with color difference lines arranged alternately. This will be explained with reference to FIG.

FIG. 8 is a diagram showing a general process of color difference line sequentialization and synchronization of color difference signals. In the same figure, (A) shows the horizontal synchronization signal, (B) shows the R-Y color difference signal, and (C) shows the B-Y color difference signal.
(D) is the color difference line sequential signal related to B and C above, (E) is the R-Y system color difference signal obtained by synchronizing the color difference line sequential signal, and (F) 1 and 2 respectively show R-Y system color difference signals obtained by synchronizing color difference line sequential signals. The color difference line sequential signal shown in the figure (D) combines the color difference signal R-Y shown in the figure (B) and the color difference signal B-Y shown in the figure (C) into one signal in a color difference line sequential manner. The IH eye is a color difference signal R-Y system IH eye I? -Y
l, and the 211th is the 2H B-Y of the color difference signal B-Y system.
2, and in the 3rd H, return to the R-Y system of the color difference signal and convert that 3H.
The eye R-Y3 is formed by alternately picking up the original color difference signals R-Y system and B-Y system.

If the color difference line sequential signals are recorded in the form of color difference line sequential signals in this manner, the color difference line sequential signals are first synchronized to form the color difference signal R-Y and the color difference signal B.
The memory capacity is only 172 compared to the conventional method in which the signals are converted into independent signals called -Y and recorded in separate memories.

FIG. 9 is a block diagram showing an example of a recording/reproducing system for the above-mentioned color difference line sequential signal. In the figure, a color difference line sequential signal S1 is converted into a digital signal by a ^/D converter A and input to a memory B. This memory B operates in response to a drive signal and an address signal from an address circuit C that responds to an external line discrimination signal LSB.
This address circuit C is a write address counter circuit C1.
and a read address counter circuit C2.

Further, the synchronization circuit connected to the output side of the memory B is provided with output lines for separately outputting the color difference signal R-Y and the color difference signal B-Y, and these Okayama color line signals are D/A converter E inserted into the line.

F to output as analog signals (R-Y, B-Y").The above synchronization circuit is 3.58MH
The drive pulse signal z and the address signal from the read address counter circuit C2 of the address circuit C are applied to operate.

The synchronized and output R-Y and B-Y signals are alternately selected for each il+ by the line sequential circuit, and become one system of output, and the R-Y and B-Y signals are further separated later. By passing the level switch LC, which alternately switches the amplification factor high/low for each IH, the level of the R
-Y, B-Y signal sequences are sent to the modulation section, multiplexed with the Y+S signal by the recording section, and written to a still video floppy. For reproduction, the multiplexed signal is separated into a Y+S signal and a stepped RY, BY signal string, and this stepped RY, BY signal string uses the stepped The signals are converted into R-Y and B-Y signals with no step difference, are converted into chroma signals by a process circuit, and are sent to a monitor device together with a Y+S signal (luminance signal).

FIG. 10 shows the concept of the storage area of the memory B. Conceptually, in this memory B, the horizontal axis X direction is the horizontal direction of the monitor screen, and the small sections in the figure are each pixel of the monitor screen.

The vertical axis Y direction is the vertical direction of the monitor screen, and the pixel is 00.01.
,02. The horizontal line represented by ... is the scanning line IH.
corresponds to Further, the depth Z direction represents the gradation of the color signal. For example, information of horizontal period (192) x vertical period (25B) x gradation (0) -294912 bits is stored. In addition, when storing the color difference signal R-Y and the color difference signal B-Y constituting the color difference line sequential signal in the area corresponding to the sequential horizontal scanning section allocated in the memory B, the color difference signal R-Y is stored in an even numbered area of the memory B. th horizontal scanning section area Y (YO, Y2...
), and the color difference signals B-Y are sequentially stored in odd-numbered horizontal scanning section corresponding regions Y (Yl, Y3, . . . ).

For example, the memory B in FIG.
The IH-th color difference line sequential signal RY is stored in the horizontal scanning section corresponding area Yl (12, 11, 12...) of the first row.
The 2Hth color difference line sequential signal B-Y is stored in the 2H-th horizontal scanning section corresponding area Y2 (20,
The 3H color difference line sequential signal RY is stored at addresses 21, 22, . . . . The target still video camera system uses this type of recording/playback system. By the way, the signals recorded on each track of the recording medium may be affected by the state at the time of recording, that is, the brightness of the subject is inappropriate for photographing, or the recording system including the magnetic head is temporarily modulated. In such cases,
Since the information recorded on that track becomes unstable, the signal level read out and output onto the input video signal line does not reach a level that allows the video to be properly reproduced.

Therefore, the display screen of the monitor device also becomes a very unsightly screen with unstable hue and brightness flickering. Furthermore, if the designated track is an empty track on which no data has been recorded, the screen will not display a normal image, resulting in a similarly unsightly screen. Therefore, if the signal level of the video signal read from each track of the magnetic recording medium does not reach a level that can properly reproduce the video, the screen corresponding to that track is displayed using a monochrome signal from the monochrome display means. To display a screen that is easy to see as a whole by using a colored screen.

This converts the video signal amplified by the reproduction section 102d into a DC voltage using a detection circuit, and compares the voltage with a ground level using a comparator. The output terminal potential of this comparator becomes an L level when a normal video signal is output from the reproduction section 102d, and becomes an H level when the reproduced video signal level does not reach a predetermined value.The output voltage of this comparator is , the demodulators 73a, 73b to the process circuit 7
By delaying the control voltage Cont by the delay line by a time corresponding to the delay time caused by
, l, and these are the analog switches 21a and 2 described above.
1b to each control input terminal Ct. A monochromatic signal generating means 76a is provided at the H side terminals of the analog switches 21a and 21b.

Since the output terminals of process circuits 75a and 75b are respectively connected to the H side terminal of 78b, the control voltage Cont,l is "L" when the reproduced video signal level is normal.
The reproduced video signal output from the process circuits 75a and 75b is output as is, and in the abnormal case where the reproduced video signal level does not reach a predetermined value, the control voltage Cont,l becomes "H" level. Monochromatic signals from the monochromatic signal generating means 78a and 76b are output.

In a still video camera system using the method described above, in order to be able to record video from another video system, it is not enough to simply provide a dubbing terminal T for inputting an external video signal; It is necessary to convert the video signal input to the signal format of this still video camera system.

Therefore, in the system of the present invention, the video signal is input to the dubbing terminal T via the conversion adapter. An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1(b) is a block diagram showing the main structure of the still video camera system of the present invention, and shows the image recording and reproducing system portion of the entire system. Other aspects are basically the same as the prior art described with reference to FIG.

In this system, the recording adapter 80 of the present invention is connected to the dubbing terminal T provided on the camera l, and the camera 1 is activated by supplying an external video signal to the camera 1 via the recording adapter 80. Use as a recording device. The image reproduction is performed by the image reproduction processor 0 as in the conventional case.

As shown in FIG. 1(a), the recording adapter 80 has a terminal T1 for a luminance input signal line and a terminal T2 for a chroma input signal line, and the former has Y+S ( synchronization signal), and the latter has R-Y and B- signals that switch every horizontal line (IH).
A signal is supplied in which the Y signal is line-sequential and has a step difference so that RY and BY are at different levels so that they can be distinguished. Therefore, the recording adapter 80 has field memories YMEM and CMEM for Y signal and C (chroma) signal, respectively, and stores the external video signal separately into Y+S signal and C signal.
A signal conversion circuit 81 that converts the S signal into a color-difference line-sequential C signal and outputs it, and a step-differenced R-Y converter that converts the line-sequential C signal into a C signal.

A level switching circuit LC for converting into a BY signal train is provided. The level switching circuit LC operates to alternately switch the amplification factor between high and low for each IH using a line index signal according to the field memory read address outputted from the signal conversion circuit 81.

Incidentally, such a recording adapter 80 may be provided within the image reproduction processor 20, and the level switching circuit LC may also be provided within the camera 1 side.

FIG. 2 shows a block diagram of an example of the above-mentioned recording adapter 80. In the figure, a composite video signal input from the outside or an S input video signal of a y+s signal and a C signal is separated and decoded by a separation filter H, and a luminance signal (Y+S) and a chroma signal (R
-Y, B-Y). Each of these signals is converted into a digital signal by the A/D converter (Y+S, RY, BY) and stored in the memory B, respectively. The upper memory B of the A/D conversion converter has a clock CLK2 for luminance signals and a clock CLK for chroma signals for each operation.
It is supplied from a signal source (not shown) corresponding to each signal of I. The memory B is a field memory, and has one field for luminance signals (Y+S) and two fields for chroma signals. For chroma signals, there are one field for R-Y and one field for B-Y.

Memory B operates upon receiving an address signal from address circuit C, and this address circuit C has a write address counter circuit C1 and a read address counter circuit C2.
Further, the synchronization circuit connected to the a side of the memory B is provided with output lines for outputting the color difference signal R-Y and the color difference signal B-Y separately, These Okayama line signals are connected to a D/A connected to each line.
Analog signals (R-Y, B-Y) by converters E and F
Convert and output.

The above synchronization circuit operates in response to a 3.58 MHz driving pulse signal and an address signal from the read address counter circuit C2 of the address circuit C. Then, RY read out from memory B.

After each signal of B-Y is synchronized by the synchronization circuit,
This analog signal is converted into an analog signal, and this analog signal is converted into an analog signal.
The Y and B-Y signals are switched to I11 by the switching signal output from the address circuit C for each IH by the line sequential circuit G.
They are selected alternately for each output, resulting in one system of output with no level difference, and further R-Y.

As a result, a signal train of RY and BY with a level difference between RY and BY is sent from the terminal T2 to the dubbing terminal T of the camera 1. In addition, the luminance signal read from memory B is converted into an analog signal upstream from the D/A converter, and transferred from terminal T1 to dubbing terminal T of camera 1.
sent to. Therefore, when the output side of the main recording adapter 80 is connected to the dubbing terminal T of the camera 1 and the video signal from the external system is input to the camera 1 via the main recording adapter 80, the luminance system signal and the chroma system signal are respectively The signals are sent to the modulation unit 102b of the camera l through the line, and are modulated there, and the Y+S signal and the stepped R-Y/B-Y signal are multiplexed by the recording unit 102e and written to the still video floppy lO from the recording head HD. .

Therefore, when using the camera l for recording video of an external video device, connect the recording adapter 80 to the dubbing terminal T, input the video output of the external video device to the external terminal of the recording adapter 80, and then When the input line switching switch Sw of 1 is switched to the dubbing terminal T side and camera 1 is turned on, camera 1 receives the video signal of the external system in the form of a video signal that meets the standards of the still video camera system. You can input it, so by recording this,
The camera of the still video camera system can now be used for recording in other video systems.

Incidentally, the writing tracks of the disc are recorded by sequentially using unrecorded tracks.

In this way, this system uses a still video camera that can record captured image information on a magnetic recording medium, magnetically record and reproduce it, and output it to an image reproduction processor, and a system that uses a still video camera that can record photographed image information on a magnetic recording medium, perform magnetic recording and reproduction, and output it to an image reproduction processor. Convert to video signal,
This is a still video camera system consisting of an output image reproduction processor, and the camera is equipped with a dubbing terminal, which can be used to input chroma-based and luminance-based video signals from the outside. The system includes a signal conversion circuit for converting the input video signal into a predetermined signal format for each of the chroma input signal line and the luminance input signal line and supplying the converted signals to the corresponding lines of the two lines. This adapter converts external video signals with different signal standards into video signals that meet the standards of this still video camera system, and allows input to the camera using the camera's dubbing terminal. be. Therefore, an input video signal from a video system other than the still video camera system can be divided into a chroma input signal and a luminance input signal and provided to the recording/playback section of the camera. Since the signal is a chroma signal with steps in the sequential color difference line format, it can be recorded and played back by the camera.

Therefore, according to this device, a still/video camera system can be used as a recording device for another video system without modification.

It should be noted that the present invention is not limited to the embodiments described above and shown in the drawings, but can be practiced with appropriate modifications within the scope of the invention without changing its gist.

[Effects of the Invention] As detailed above, the present invention provides a video signal recording system that allows a still video camera system to be used as a recording device for other video systems without modification. Can be done.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing the main configuration of the device of the present invention, and FIGS. 3 to 6 are diagrams for explaining the structure of a video still camera system. 7 to 11 are diagrams for explaining a video still camera system as a prior art to which the present invention is directed. DESCRIPTION OF SYMBOLS 1...Camera, 2...Lens barrel, 7...Opening/closing lid, 8...Connector opening, 9, 24...Display device,
10... Still video floppy, 70... Line sequential circuit, 73a, 71°H-... Demodulator, 74a, 74b
, A-A/D converter, 75a. 75b...Digital process circuit, 78a, 78b
... Monochrome signal generation means, 77a, 77b, B... Field memory, 7B... Auto loading insertion slot, Ha, ? 8b...A/D converter, 79...Encoder, CB...Cable, 20...Image playback processor, 21a, ~22b...Analog switch, 2
2... Connector plug, 2B-30... Operation button,
32... Light receiving window for remote control, 34... Power switch, 40... Main CPU, 41... Drive motor, 42... Head for magnetic recording/reproduction, 43... Head access drive control , 44...LCD
Display unit, 50... sub CPU. 70, G...line sequential circuit, T...dubbing terminal,
80... Recording adapter, C... Address circuit, D
...Synchronization circuit, LC...Level switching circuit, E,
F, I...D/A converter, H...demodulator.

Claims (1)

[Scope of Claims] A chroma input signal line that serially supplies a chroma signal in a color difference line sequential manner to the recording/playback section, a luminance signal line that supplies a luminance signal to the recording/playback section, and an input. and a signal conversion circuit for converting the video signal into a predetermined signal form for each of the chroma input signal line and the luminance input signal line and supplying the converted signals to the corresponding lines of both lines. Video signal recording system.