JPH0283587U - - Google Patents
Info
- Publication number
- JPH0283587U JPH0283587U JP16322088U JP16322088U JPH0283587U JP H0283587 U JPH0283587 U JP H0283587U JP 16322088 U JP16322088 U JP 16322088U JP 16322088 U JP16322088 U JP 16322088U JP H0283587 U JPH0283587 U JP H0283587U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- voltage
- power
- deflection
- high voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010248 power generation Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Details Of Television Scanning (AREA)
- Transforming Electric Information Into Light Information (AREA)
Description
第1図はこの考案の一実施例を示す概略構成図
、第2図はVPCがOFFからONと連続的に動
作したときの、第1図の各部の波形の一例を示す
図、第3図は従来のストロークスキヤンCRTデ
イスプレイ装置の概略構成図、第4図は二次電源
発生部の詳細図、第5図は輝度信号増幅器の詳細
図、第6図にVPCがONしたときおよびVPC
がOFFからONと連続的に動作したときの第3
図の各部の波形の一例を示す図である。
図において、1は表示信号発生部、2は偏向信
号増幅器、3は輝度信号増幅器、4は二次電源発
生部、5はCRT、6はCRT駆動部、7は制御
回路、8はDC電圧発生器、9は高電圧発生器、
15はモニタ回路である。尚、各図中同一符号は
同一または相当部分を示す。
Fig. 1 is a schematic configuration diagram showing an embodiment of this invention, Fig. 2 is a diagram showing an example of waveforms of each part in Fig. 1 when VPC operates continuously from OFF to ON, and Fig. 3. 4 is a detailed diagram of the secondary power generation section, FIG. 5 is a detailed diagram of the luminance signal amplifier, and FIG. 6 is a diagram showing the schematic configuration of a conventional stroke scan CRT display device.
The third condition when the is operated continuously from OFF to ON.
It is a figure which shows an example of the waveform of each part of a figure. In the figure, 1 is a display signal generator, 2 is a deflection signal amplifier, 3 is a luminance signal amplifier, 4 is a secondary power supply generator, 5 is a CRT, 6 is a CRT driver, 7 is a control circuit, and 8 is a DC voltage generator. 9 is a high voltage generator,
15 is a monitor circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
示信号発生部と、外部からのパワーON/OFF
信号、外部から供給される一次電源および高電圧
+VHを入力し、上記パワーON/OFF信号の
パワーOFFの状態および高電圧+VHの電圧レ
ベルを検出し、上記高電圧+VHが必ずOVまで
降下するまでの期間、パワーOFFの状態を保持
する電源制御信号を発生するモニタ回路と、外部
から供給される一次電源を入力し、上記電源制御
信号の制御の元に、DC電圧±V0、DC電圧±
V1、DC電圧+V2および上記高電圧+VHを
発生する二次電源発生部と、上記DC電圧±V0
の供給を受け、上記偏向電圧信号を偏向電流信号
に変換し、CRTへ供給する偏向信号増幅器と、
上記DC電圧±V1および上記DC電圧+V2の
供給を受け、上記輝度指令信号をCRTの駆動に
必要な電圧に増幅した輝度制御信号に変換しCR
Tへ供給する輝度信号増幅器とを備えたことを特
徴としたストロークスキヤンCRTデイスプレイ
装置。 Display signal generator that generates deflection voltage signals and brightness command signals, and external power ON/OFF
Input the signal, the primary power supply supplied from the outside, and the high voltage +VH, and detect the power OFF state of the power ON/OFF signal and the voltage level of the high voltage +VH until the high voltage +VH drops to OV without fail. A monitor circuit that generates a power control signal that maintains the power OFF state for a period of
V 1 , a secondary power generation section that generates the DC voltage +V 2 and the high voltage +VH, and the DC voltage ±V 0
a deflection signal amplifier that converts the deflection voltage signal into a deflection current signal and supplies the signal to the CRT;
The DC voltage ±V 1 and the DC voltage +V 2 are supplied, and the brightness command signal is converted into a brightness control signal amplified to the voltage necessary to drive the CRT.
1. A stroke scan CRT display device comprising: a luminance signal amplifier for supplying a signal to a stroke scan CRT display device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16322088U JPH0283587U (en) | 1988-12-16 | 1988-12-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16322088U JPH0283587U (en) | 1988-12-16 | 1988-12-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0283587U true JPH0283587U (en) | 1990-06-28 |
Family
ID=31447751
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16322088U Pending JPH0283587U (en) | 1988-12-16 | 1988-12-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0283587U (en) |
-
1988
- 1988-12-16 JP JP16322088U patent/JPH0283587U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2901901B2 (en) | Power supply control circuit for display device | |
| JPH0194991U (en) | ||
| JPS63118087U (en) | ||
| JPS63118086U (en) | ||
| JPS63162390U (en) | ||
| JPS6438691U (en) | ||
| US5943028A (en) | Self-raster circuit of a monitor | |
| JPH01179679U (en) | ||
| JPH0217790U (en) | ||
| JPH01103883U (en) | ||
| JPS6311693U (en) | ||
| JPS63155189U (en) | ||
| JPH0740175B2 (en) | CRT scanning device | |
| JPH039574U (en) | ||
| JPS6329774U (en) | ||
| JPS63180895U (en) | ||
| JPH01133866U (en) | ||
| JPH0450706Y2 (en) | ||
| KR970005656Y1 (en) | Circuit for the control of waiting mode | |
| JPS6230464U (en) | ||
| JPH036683U (en) | ||
| JPS6186785U (en) | ||
| JPS63198091U (en) | ||
| JPS63164793U (en) | ||
| JPS63162391U (en) |