JPH0284763A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
JPH0284763A
JPH0284763A JP63236907A JP23690788A JPH0284763A JP H0284763 A JPH0284763 A JP H0284763A JP 63236907 A JP63236907 A JP 63236907A JP 23690788 A JP23690788 A JP 23690788A JP H0284763 A JPH0284763 A JP H0284763A
Authority
JP
Japan
Prior art keywords
circuit
circuit blocks
signals
output
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63236907A
Other languages
Japanese (ja)
Inventor
Nobuyuki Nakai
信行 中井
Shigeto Suzuki
茂人 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63236907A priority Critical patent/JPH0284763A/en
Publication of JPH0284763A publication Critical patent/JPH0284763A/en
Pending legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the signal lines and terminals required for inspection simultaneously enabling the circuit blocks arbitrarily selected from a plurality of circuit blocks successively connected to be inspected by a method wherein transfer circuits selecting the input signals or output signals to and from the first circuit blocks by control signals to be transmitted as the input signals to the circuit block in the next stage are provided. CONSTITUTION:The title integrated circuit is composed of a plurality of circuit blocks 1-3 successively connected as well as transfer circuits 10-12 selecting either the input signals to the first circuit blocks or the output signals from the first block to be transferred to the input signals to the second circuit blocks in the next stage. For example, firstly, the circuit block to be inspected is selected from the circuit blocks 1-3. Secondly, the transfer circuits 10-12 are controlled by control signals from transfer circuit control circuit 16 so that the transfer circuits 10-12 may output the output signals from said selected circuit blocks as well as the input signals to not-selected circuit blocks respectively as output signals. Thus, the input signals from an input signal terminal 17 are inputted to said selected circuit block to output the results to an output terminal 18.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、継続接続した複数の回路ブロックで構成され
る集積回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an integrated circuit consisting of a plurality of circuit blocks connected in series.

従来の技術 従来、継続接続した複数の回路ブロックで構成される半
導体集積回路の検査では、前記回路ブロックの出力信号
を直接取り出して検査信号としていた為、検査信号の数
だけ専用の信号線及び端子を必要とした。
2. Description of the Related Art Conventionally, in testing semiconductor integrated circuits consisting of a plurality of continuously connected circuit blocks, the output signals of the circuit blocks were directly taken out as test signals. required.

以下に、従来の半導体集積回路の構成について説明する
The configuration of a conventional semiconductor integrated circuit will be described below.

第2図は従来の半導体集積回路の構成図であり、1,2
.3は回路ブロックで、それぞれ継続接続した関係゛に
ある。4,5は前記回路ブロックを接続する信号線、6
は入力信号端子、7は出力信号端子、8.9は検査信号
端子となっている。
Figure 2 is a configuration diagram of a conventional semiconductor integrated circuit.
.. 3 is a circuit block, each of which is in a continuously connected relationship. 4 and 5 are signal lines connecting the circuit blocks; 6
7 is an input signal terminal, 7 is an output signal terminal, and 8.9 is a test signal terminal.

本従来例では、6の入力信号を全体の入力信号とし、前
記回路ブロックを継続接続して信号を処理し、7を出力
信号とするものであり、7の出力信号端子及び8,9の
検査信号端子で、前記回路ブロック間の信号を観測する
事によって、前記回路ブロックの動作を検査するもので
ある。
In this conventional example, the input signal 6 is used as the overall input signal, the circuit blocks are continuously connected to process the signal, and 7 is used as the output signal, and the output signal terminal 7 and the inspection terminals 8 and 9 The operation of the circuit blocks is tested by observing signals between the circuit blocks at signal terminals.

発明が解決しようとする課題 しかしながら、前記の構成では検査信号の数だけ専用の
信号線及び端子を必要とするが、半導体集積回路では使
用可能な端子数に制限がある為、観測できる信号数に制
限がある。また、端子数を減らす為、第3図で示す他の
実施例のように、セレクターを設けたとしても、前記回
路ブロック間信号をそれぞれ取り出す為、検査に必要な
配線面積は増大してしまう。
Problems to be Solved by the Invention However, the above configuration requires dedicated signal lines and terminals for the number of test signals, but since there is a limit to the number of usable terminals in semiconductor integrated circuits, the number of signals that can be observed is limited. There is a limit. Further, even if a selector is provided to reduce the number of terminals as in the other embodiment shown in FIG. 3, the wiring area required for inspection will increase because the signals between the circuit blocks are taken out respectively.

また、前記回路ブロック間に任意の入力信号を入力しよ
うと思っても、前記回路ブロック間へ入力信号を直接入
れる事のできる信号線及び端子が必要となり、面積は増
大する。
Further, even if it is intended to input an arbitrary input signal between the circuit blocks, signal lines and terminals that can directly input the input signal between the circuit blocks are required, which increases the area.

本発明は、前記従来の問題点を解決するものであり、検
査に必要な信号線及び端子を減らす七共に、継続接続し
た複数の回路ブロックから任意に選択した複数の回路ブ
ロックを検査する事が可能で、又、全体から任意な複数
の回路ブロックをバイパスさせて検査することも、可能
な集積回路を提供する事を目的とする。
The present invention solves the above-mentioned conventional problems.It reduces the number of signal lines and terminals required for inspection, and also makes it possible to inspect a plurality of circuit blocks arbitrarily selected from a plurality of continuously connected circuit blocks. It is an object of the present invention to provide an integrated circuit in which it is possible to inspect an arbitrary plurality of circuit blocks by bypassing the entire circuit.

課題を解決するための手段 この目的を達成する為に、本発明の集積回路は、継続接
続した複数の回路ブロックで構成される半導体集積回路
で、前記第1の回路ブロックへの入力信号、前記第1の
回路ブロックからの出力信号、および制御信号を入力と
し、前記制御信号により、前記第1の回路ブロックへの
入力信号または、前記第1の回路ブロックからの出力信
号を選択し、次段の第2の回路ブロックへの入力信号と
して出力する切換回路を備え、検査時に第1の回路ブロ
ックの入力信号が次段の第2の回路ブロックの入力信号
になるように構成されている。
Means for Solving the Problems In order to achieve this object, the integrated circuit of the present invention is a semiconductor integrated circuit composed of a plurality of continuously connected circuit blocks, in which an input signal to the first circuit block, an input signal to the first circuit block, The output signal from the first circuit block and the control signal are input, and the input signal to the first circuit block or the output signal from the first circuit block is selected according to the control signal, and the next stage The switching circuit is configured such that the input signal of the first circuit block becomes the input signal of the second circuit block at the next stage during inspection.

作用 この構成により、前記継続接続した複数の回路ブロック
から、取捨選択した任意の回路ブロックに対し任意の信
号を与えたり、バイパスさせたりして検査する事が可能
であり、かつ切換回路と制御信号線を持つだけでよく、
検査に必要な信号線及び端子の占める面積を減らす事が
できる。
Effect: With this configuration, it is possible to test any selected circuit block from the plurality of continuously connected circuit blocks by giving it any signal or by bypassing it, and it is also possible to inspect the switching circuit and the control signal. Just hold the line,
The area occupied by signal lines and terminals required for inspection can be reduced.

実施例 以下、本発明の一実施例について、図面を参照しながら
説明する。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

第1図は、本発明の一実施例における集積回路を示すも
のである。1.2.3は回路ブロックで継続接続関係に
ある。4,5.6は前記回路ブロックへの入力信号線、
7,8.9は前記回路からの出力信号線、10,11.
12は切換回路、13.14.15は制御信号線、16
は切換回路用制御回路、17は入力信号端子、18は出
力信号端子、19は制御信号入力端子である。
FIG. 1 shows an integrated circuit in one embodiment of the invention. 1.2.3 are circuit blocks that are continuously connected. 4, 5.6 is an input signal line to the circuit block,
7, 8.9 are output signal lines from the circuit, 10, 11.
12 is a switching circuit, 13.14.15 is a control signal line, 16
17 is an input signal terminal, 18 is an output signal terminal, and 19 is a control signal input terminal.

以上のように構成された本実施例の集積回路について、
以下その動作を説明する。
Regarding the integrated circuit of this example configured as described above,
The operation will be explained below.

まず、1.2.3の回路ブロックから、検査する回路ブ
ロックを選択する。次に、10.11゜12の切換回路
が、前記選択した回路ブロックからの出力信号と、選択
しなかった回路ブロックへの入力信号を各々出力信号と
して出力するよう、16の切換回路制御用回路及び13
.14.15の制御信号線による制御信号で制御する。
First, a circuit block to be inspected is selected from the circuit blocks in 1.2.3. Next, 16 switching circuit control circuits are configured so that the switching circuits 10.11 and 12 output the output signal from the selected circuit block and the input signal to the unselected circuit block as output signals, respectively. and 13
.. It is controlled by the control signal from the control signal line 14.15.

すると、17の入力信号端子からの入力信号は、前記選
択した回路ブロックに入力され、その結果は18の出力
信号端子に出力される。
Then, the input signals from the 17 input signal terminals are input to the selected circuit block, and the results are output to the 18 output signal terminals.

発明の効果 以上のように本発明によれば、前記継続接続した複数の
回路ブロックから、取捨選択した任意の回路ブロックの
みを任意の信号で検査する事が可能であり、検査用の信
号線及び端子の占める面積も従来技術に比べ減らす事が
でき、検査効率に秀れた集積回路を実現できるものであ
る。
Effects of the Invention As described above, according to the present invention, it is possible to test only a selected arbitrary circuit block from the plurality of continuously connected circuit blocks using an arbitrary signal, and it is possible to inspect the signal line for inspection and The area occupied by the terminals can also be reduced compared to conventional techniques, making it possible to realize integrated circuits with excellent inspection efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例における継続接続した複数の
回路ブロックで構成される集積回路の構成図、第2図、
第3図は従来の前記集積回路の検査を考慮した構成図で
ある。 1.2.3・・・・・・回路ブロック、10.11゜1
2・・・・・・切換回路、16・・・・・・切換回路用
制御回路、19・・・・・・制御信号入力端子。
FIG. 1 is a configuration diagram of an integrated circuit composed of a plurality of continuously connected circuit blocks according to an embodiment of the present invention, and FIG.
FIG. 3 is a configuration diagram that takes into consideration the conventional inspection of the integrated circuit. 1.2.3...Circuit block, 10.11゜1
2... Switching circuit, 16... Control circuit for switching circuit, 19... Control signal input terminal.

Claims (1)

【特許請求の範囲】[Claims] 継続接続した複数の回路ブロックで構成され、制御信号
により、第1の回路ブロックへの入力信号または同業1
の回路ブロックからの出力信号を選択し、次段の第2の
回路ブロックへの入力信号とする切換回路を具備したこ
とを特徴とする集積回路。
It is composed of a plurality of continuously connected circuit blocks, and depending on the control signal, the input signal to the first circuit block or the same
1. An integrated circuit comprising a switching circuit which selects an output signal from the circuit block and inputs the signal to a second circuit block at the next stage.
JP63236907A 1988-09-21 1988-09-21 Integrated circuit Pending JPH0284763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63236907A JPH0284763A (en) 1988-09-21 1988-09-21 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63236907A JPH0284763A (en) 1988-09-21 1988-09-21 Integrated circuit

Publications (1)

Publication Number Publication Date
JPH0284763A true JPH0284763A (en) 1990-03-26

Family

ID=17007522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63236907A Pending JPH0284763A (en) 1988-09-21 1988-09-21 Integrated circuit

Country Status (1)

Country Link
JP (1) JPH0284763A (en)

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