JPH0286264U - - Google Patents

Info

Publication number
JPH0286264U
JPH0286264U JP16730688U JP16730688U JPH0286264U JP H0286264 U JPH0286264 U JP H0286264U JP 16730688 U JP16730688 U JP 16730688U JP 16730688 U JP16730688 U JP 16730688U JP H0286264 U JPH0286264 U JP H0286264U
Authority
JP
Japan
Prior art keywords
original
image data
circuit
sized image
obtains fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16730688U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16730688U priority Critical patent/JPH0286264U/ja
Publication of JPH0286264U publication Critical patent/JPH0286264U/ja
Pending legal-status Critical Current

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  • Editing Of Facsimile Originals (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例を示すフアクシミ
リ装置のブロツク図、第2図は第1図の画像処理
回路3の詳細なブロツク図、第3図は第2図のペ
ージ区切回路の動作を示すための説明図、第4図
、第5図はこの考案の他の実施例を示す画像処理
回路のそれぞれブロツク図、第6図は従来のフア
クシミリ装置のブロツク図である。 図において、1は読取装置、2はモデム、3は
画像処理回路、4はメモリ、5は拡大縮小回路、
6はページ区切回路、7は帯域圧縮回路、8は帯
域伸長回路を示す。なお、図中、同一符号は同一
、または相当部分を示す。
FIG. 1 is a block diagram of a facsimile machine showing an embodiment of this invention, FIG. 2 is a detailed block diagram of the image processing circuit 3 of FIG. 1, and FIG. 3 shows the operation of the page separation circuit of FIG. FIGS. 4 and 5 are block diagrams of an image processing circuit showing other embodiments of the invention, and FIG. 6 is a block diagram of a conventional facsimile apparatus. In the figure, 1 is a reading device, 2 is a modem, 3 is an image processing circuit, 4 is a memory, 5 is an enlargement/reduction circuit,
Reference numeral 6 indicates a page separation circuit, 7 a band compression circuit, and 8 a band expansion circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 原稿を拡大又は縮小することにより定寸化され
た画像データを得る拡大縮小回路、又は原稿のペ
ージ区切りを行なうことにより定寸化された画像
データを得るページ区切り回路を備えたことを特
徴とするフアクシミリ装置。
The present invention is characterized by comprising an enlargement/reduction circuit that obtains fixed-sized image data by enlarging or reducing the original, or a page separation circuit that obtains fixed-sized image data by dividing the pages of the original. Fax machine.
JP16730688U 1988-12-22 1988-12-22 Pending JPH0286264U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16730688U JPH0286264U (en) 1988-12-22 1988-12-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16730688U JPH0286264U (en) 1988-12-22 1988-12-22

Publications (1)

Publication Number Publication Date
JPH0286264U true JPH0286264U (en) 1990-07-09

Family

ID=31455478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16730688U Pending JPH0286264U (en) 1988-12-22 1988-12-22

Country Status (1)

Country Link
JP (1) JPH0286264U (en)

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