JPH0286266U - - Google Patents
Info
- Publication number
- JPH0286266U JPH0286266U JP16504688U JP16504688U JPH0286266U JP H0286266 U JPH0286266 U JP H0286266U JP 16504688 U JP16504688 U JP 16504688U JP 16504688 U JP16504688 U JP 16504688U JP H0286266 U JPH0286266 U JP H0286266U
- Authority
- JP
- Japan
- Prior art keywords
- wave signal
- parabolic wave
- circuit
- waveform
- parabolic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000003786 synthesis reaction Methods 0.000 claims description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 2
- 230000000737 periodic effect Effects 0.000 claims 2
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Details Of Television Scanning (AREA)
Description
第１図は本考案による偏向歪補正回路の一実施
例を示すブロツク図、第２図は第１図の偏向歪補
正回路の動作を説明するための波形図、第３図は
偏向歪を補正した後の陰極線管の画面を示す図で
あり、第３図ａは従来の偏向歪補正回路による補
正後の画面、第３図ｂは第１図の偏向歪補正回路
によつて補正した後の画面を示し、第４図は偏向
歪の原因を説明するための説明図、第５図は従来
の補正用のパラボラ波形を示す波形図、第６図は
従来の水平偏向電流を示す波形図、第７図は従来
の偏向歪補正回路の一例を示すブロツク図である
。
１，２……積分回路、３……パラボラ信号増幅
回路、４……波形合成回路、５……波形クリツプ
回路、６……信号波形増幅回路、７……合成波増
幅回路、８……偏向電流変調部、Ｌｙ……水平偏
向コイル、Ｃｓ……Ｓ字補正用コンデンサ。
Fig. 1 is a block diagram showing an embodiment of the deflection distortion correction circuit according to the present invention, Fig. 2 is a waveform diagram for explaining the operation of the deflection distortion correction circuit of Fig. 1, and Fig. 3 is a diagram showing the deflection distortion correction circuit. FIG. 3A shows the screen after correction by the conventional deflection distortion correction circuit, and FIG. 3B shows the screen after correction by the deflection distortion correction circuit in FIG. 4 is an explanatory diagram for explaining the cause of deflection distortion, FIG. 5 is a waveform diagram showing a conventional parabolic waveform for correction, and FIG. 6 is a waveform diagram showing a conventional horizontal deflection current. FIG. 7 is a block diagram showing an example of a conventional deflection distortion correction circuit. 1, 2...Integrator circuit, 3...Parabola signal amplification circuit, 4...Waveform synthesis circuit, 5...Waveform clipping circuit, 6...Signal waveform amplification circuit, 7...Synthetic wave amplification circuit, 8...Deflection Current modulation section, Ly...Horizontal deflection coil, Cs...S-shaped correction capacitor.
Claims (1)
信号を作り出す第１のパラボラ波信号発生回路と
、垂直周期の鋸歯状波信号が入力され上記第１の
パラボラ波信号発生回路からのパラボラ波信号に
比べて急峻な傾きを持つパラボラ波信号を作り出
す第２のパラボラ波信号発生回路と、この第２の
パラボラ波信号発生回路から出力されるパラボラ
波信号の尖端ピーク波形を取出すクリツプ回路と
、上記第１のパラボラ波信号発生回路からのパラ
ボラ波信号に上記波形クリツプ回路からの出力波
形信号を合成する波形合成回路とこの波形合成回
路から出力される合成出力波形信号によつて水平
コイルに流れる水平偏向電流を変調する偏向電流
変調部とを具備することを特徴とする偏向歪補正
回路。 a first parabolic wave signal generation circuit to which a vertically periodic sawtooth wave signal is input and generates a parabolic wave signal; and a parabolic wave signal from the first parabolic wave signal generator to which the vertically periodic sawtooth wave signal is inputted. a second parabolic wave signal generating circuit that generates a parabolic wave signal having a steeper slope than the second parabolic wave signal generating circuit; a clipping circuit that extracts the tip peak waveform of the parabolic wave signal output from the second parabolic wave signal generating circuit; A waveform synthesis circuit that synthesizes the output waveform signal from the waveform clipping circuit with the parabolic wave signal from the parabolic wave signal generation circuit No. 1, and a horizontal deflection flowing to the horizontal coil by the synthesized output waveform signal output from the waveform synthesis circuit. A deflection distortion correction circuit comprising: a deflection current modulation section that modulates a current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16504688U JPH0286266U (en) | 1988-12-22 | 1988-12-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16504688U JPH0286266U (en) | 1988-12-22 | 1988-12-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0286266U true JPH0286266U (en) | 1990-07-09 |
Family
ID=31451180
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16504688U Pending JPH0286266U (en) | 1988-12-22 | 1988-12-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0286266U (en) |
-
1988
- 1988-12-22 JP JP16504688U patent/JPH0286266U/ja active Pending
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