JPH0287555A - semiconductor equipment - Google Patents

Abstract

PURPOSE:To inhibit a reduction in connection resistance in the connection part of fellow wirings and the variability of the value of resistance, which is generated there, by a method wherein at least the upper most layer of the laminated wiring is constituted of a conductive material difference from that of the other wiring and the other wiring is directly connected to a layer consisting of the same conductive material in the laminated wiring. CONSTITUTION:A laminated wiring 14 is wired on the surface of a semiconductor substrate 11 through a silicon oxide film 12 and an upper side wiring (other wiring) 15 is wired thereon through a silicon oxide film 13. The lower wiring 14 includes a metal film 14a of an aluminum alloy, on which a high-melting point metal film 14b (e.g., tungsten) is deposited thinner than the metal film 14a. This wiring 14 is connected to a semiconductor region 10 through an electrode lead-out hole 16 providing in the film 12. The wiring 15 is constituted of an Al alloy. Thus wiring 15 is connected to the film 14a of the wiring 14 through a hole 17 provided in the film 13. In short, the connection between the wirings 15 and 14 is performed by the fellow Al alloys.

Description

Detailed Description of the Invention [Industrial Application Field] The present invention relates to semiconductor technology and to technology that is effective when applied to the formation of semiconductor integrated circuits. It relates to techniques that are effective for use in manufacturing devices.

[Prior Art] As semiconductor integrated circuits become denser and more integrated, the number of wires used to interconnect individual circuit elements increases, and design constraints for wiring have become apparent. As a technique to solve this problem, a multilayer wiring technique in which wiring is arranged three-dimensionally through an insulating film is being considered. On the other hand, in order to ensure reliability in semiconductor integrated circuits, a laminated wiring technique has been considered in which the wiring itself is implanted by laminating two or more types of conductive materials.

FIG. 2 shows a part of a conventional semiconductor device that combines both of the above-mentioned technologies, that is, three-dimensional wiring technology and laminated wiring technology. The outline is as follows.

That is, in the P-type semiconductor substrate 1, there are N-type semiconductor regions (for example, the source/drain of a MOSFET) constituting a circuit element.
2 is formed. Further, on the P-type semiconductor substrate 1, a laminated wiring 3 connected to the semiconductor region 2 is formed on an M edge film 4.
Furthermore, on the laminated wiring 3, a wiring 5 (upper wiring) connected to the laminated wiring 1IIA3 is placed with a burlap film 6 interposed therebetween.

In the above, the wiring 5 is made of an aluminum alloy. On the other hand, the laminated wiring 3 has a structure in which a thin silicide film 3b is laminated on an aluminum alloy metal film 3a. The reason is as follows.

That is, the metal film 3a of aluminum alloy that serves as the main conductor
has low resistivity and excellent electrical properties, but is weak in strength, and the metal film 3a may be cut due to electromigration or thin layer migration. In order for the circuit to operate properly even when such a problem occurs, a silicide film 3b is formed on the metal film 3a.
It was decided to do li5.

Regarding the technology related to the above, for example, V-MIC Conference Proceedings (1985) pp. 102-113 (V-MICC
onferenceProceedings, (198
5) pp. 102-113).

[Problems to be Solved by the Invention] By the way, in the above technique, when connecting the upper wiring 5 to the laminated wiring 3, a connection hole 7 is provided in the insulating film 6 to partially cover the surface of the silicide film 3b. The upper wiring 5 was exposed and brought into contact with the silicide film 3bL. That is, the connection between the wiring 5 and the laminated wiring 3 was made between conductors having different resistances.

In a semiconductor device having such a structure, the connection between the laminated wiring 3 and the upper wiring 5 connects dissimilar materials, and there is a high specific resistance in the middle of the aluminum alloy films 3a and 5, which are the main conductors. Since the material (silicide) is sandwiched between the materials, the following problems arise.

That is, connecting an aluminum alloy, which is a dissimilar material, to the silicide 3b makes the connection surface uneven, unlike connecting aluminum alloys to each other. the result,
The contact resistance varies, which adversely affects the operation, and moreover, from the standpoint of quality control, the number of defective products increases. Also,
Since different materials come into contact with each other on the connection surface, contact resistance occurs, increasing the resistance of electricity flowing between the rewiring lines 3.5 and slowing down the operating speed.

Further, an aluminum alloy film 3a which is the main conductor,
Since a substance with high specific resistance (silicide) is sandwiched in the middle of the circuit 5, the resistance becomes high, the operation speed becomes slow, and the function of the circuit is degraded.

The purpose of the present invention is to reduce the contact resistance at the connecting portions between wirings and to suppress the variation in resistance values that occur therein, when employed on the three-dimensional wiring structure/laminated wiring 3, and to improve the reliability of the semiconductor device. It is in.

The above and other objects and novel features of the present invention will become clear from the description in Book #1 and the accompanying drawings.

[Means for Solving the Problems] Representative inventions disclosed in this application will be summarized as follows.

A semiconductor device having a multilayer wiring structure according to the present invention includes a laminated wiring formed by laminating two or more types of conductive films, and second, other wiring connected to the laminated wiring through an insulating film, and at least one of the laminated wirings. In a semiconductor device in which the uppermost layer is made of a conductive material different from that of the other wiring, and a layer below it is made of the same conductive material as the other wiring, The structure is such that the wiring is directly connected to layers made of the same conductive material in the laminated wiring.

[Function] According to the semiconductor device described above, since the upper wiring and the lower laminated wiring are connected by the same conductive material, resistance due to reaction products between different types of conductive materials occurs at the connection portion. There is no problem of variation in values, and there is also no problem of increased resistance occurring at the connection interface between different types of conductive materials. Therefore, the contact resistance at the connection portion between the wirings is reduced and the variation in resistance value generated therein is suppressed, and the reliability of the semiconductor device can be improved.

[Example code] Hereinafter, the present invention will be explained according to examples.

FIG. 1 is a sectional view showing a part of a semiconductor device according to an embodiment of the present invention. In the semiconductor device of this embodiment, an N-type semiconductor region (for example, a MOSFE) forming part of a circuit element is used.
A silicon oxide film (insulating film) 12 is formed on the surface (principal surface) of the P-type semiconductor substrate 11 on which the T source/drain) 10 is formed.
A laminated wiring 14 is disposed through the layered wiring 14, and an upper wiring (other wiring) 15 that is partially connected to the laminated wiring 14 is further placed thereon via a silicon oxide film (insulating film) 13. There is.

Here, the laminated wiring 14 disposed on the lower side is constructed by laminating a high melting point metal film 14b thinner than the metal film 14a on a metal film 14a made of aluminum alloy, for example, tungsten, and is made of silicon. It is connected to the semiconductor region 10 through an electrode extraction hole 16 provided in the oxide film 12.

On the other hand, the upper wiring 15 is made of aluminum alloy. This wiring 15 is connected to the silicon oxide film 13.
111 through the hole 17 provided inside! It is connected to the metal film 14a of the layer wiring 14. That is, in the semiconductor device of this embodiment, the connection between the wiring 1115 and the laminated wiring 14 is made using aluminum alloy.

Next, a method of wiring and a method of connecting wires in the semiconductor device shown in FIG. 1 will be explained below.

First, a method for forming the laminated wiring 14 will be explained.

Electrode extraction holes 16 are formed at positions corresponding to conductor regions 10 of silicon oxide film 12 formed on semiconductor substrate 11 by photolithography and dry etching. Thereafter, an aluminum alloy is deposited on the entire surface of the silicon oxide film 12 by a sputtering method, and tungsten or the like is further deposited thereon by a sputtering method. Next, patterning is performed by photolithography and dry etching using a photosensitive resin to form a laminated wiring 14 consisting of a metal film 14a and a high melting point metal film 14b.

On the other hand, the formation and connection of the upper wiring 15 are performed as follows.

A connection hole 17 is formed in the silicon oxide film 13 existing on the laminated wiring 14 by photolithography and dry etching, and the high melting point metal film 14b is exposed in the connection hole 17 using the remaining silicon oxide film 13 as a mask. is removed by dry etching using a gas containing fluorine. That is, the surface of the aluminum alloy metal film 14a of the lower wiring is exposed. Thereafter, a metal film of aluminum alloy is deposited on the entire surface of the silicon oxide film 13 including the inside of the connection hole 17 by, for example, sputtering, and processed by photolithography and tri-etching to form the upper wiring having a desired wiring pattern. form 15. With this, distribution! The aluminum alloys of the lA 15 and the laminated wiring 14 will be connected to each other, but in order to ensure the connection at the connection surface, the aluminum is heat-treated at, for example, 450°C for about 30 minutes in a hydrogen-containing gas. Integrate the connecting surfaces by reaction and diffusion.

Note that after forming the connection hole 17 in the silicon oxide film 13, in order to remove the high melting point metal film 14b inside the connection hole 17, a physical sputter removal method using an inert gas such as argon, other than dry etching, or ammonia Alternatively, it is also possible to use a wet removal method using an aqueous solution containing fluorine or the like.

In addition, any other method may be used to remove the high melting point metal film 14a within the connection hole 17.

Furthermore, the degree of removal of the high melting point metal film 14a does not have to be complete. That is, when the heat treatment is performed, aluminum reacts and thermally diffuses, and the aluminum alloys are connected to each other through the remaining high melting point metal film 14b to some extent.

According to the above embodiment, the aluminum alloy metal film 14a of the lower wiring 14 is directly connected to the upper wiring 15 made of the same material. Therefore, the upper distribution! 15 and laminated wiring 14
The circuits are connected through aluminum alloy, which is the main conductor, and there is no longer any increase in resistance or variation in resistance along the way, resulting in faster circuit operation.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, in the above embodiment, the high melting point metal film 14b such as tungsten is laminated on the upper layer of the laminated wiring 14, but the film to be laminated may be of any material that can reinforce the aluminum alloy from stress. , silicon compounds, aluminum compounds, etc. can be used, and specific examples include 5-silicide, titanium-1-nyrite, polycide, and polysilicon.

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are briefly explained below.

In the semiconductor device according to the present invention, another wiring connected to the laminated wiring formed by laminating two or more types of conductive films is arranged through an insulating film, and at least the uppermost layer of the laminated wiring is arranged on the laminated wiring formed by laminating two or more types of conductive films. In a semiconductor device that is made of a conductive material different from that of the wiring, and in which there is a layer made of the same conductive material as the other wiring in a layer below it, the other wiring is Since the structure is directly connected to layers made of the same conductive material, the contact resistance at the connection between the wires is reduced and the variations in resistance values that occur there are suppressed, which in turn improves the reliability of semiconductor devices. It will be possible to achieve this goal.

[Brief explanation of drawings]

FIG. 1 is a vertical cross-sectional view of a semiconductor device obtained by applying the present invention, and FIG. 2 is a vertical cross-sectional view of a conventional semiconductor device. 11...Semiconductor substrate, 12.13...Silicon oxide film, 14...Laminated wiring, 14a...Aluminum alloy metal film, 14b...High melting point metal film, 1
5...Wiring. Figure 1 Diagram 2

Claims (1)

[Claims] On a laminated wiring formed by laminating one or more types of conductive films, other wiring connected thereto is arranged via an insulating film, and at least the uppermost layer of the laminated wiring is connected to the other wiring. In a semiconductor device that is made of a conductive material different from that of the wiring, and in which there is a layer made of the same conductive material as the other wiring in a layer below it, the other wiring is A semiconductor device characterized by being directly connected to layers made of the same conductive material. 2. The other wiring mentioned above is composed of a metal layer mainly made of aluminum alloy, while the laminated wiring mentioned above is composed of a conductive layer made of a silicon-based material laminated on a metal layer mainly made of aluminum alloy. The semiconductor device according to claim 1, characterized in that: 3. The other wiring mentioned above is composed of a metal layer mainly made of aluminum alloy, while the laminated wiring mentioned above is made by laminating a conductive layer made of a high melting point metal on a metal layer mainly made of aluminum alloy. The semiconductor device according to claim 1, characterized in that: