JPH0293584A - information processing equipment - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to an information processing device, and particularly to an image information processing device suitable for a display device using a ferroelectric liquid crystal having memory properties.

[Prior art]

BACKGROUND ART Conventionally, refresh scan type CRTs have been mainly used as computer terminal display devices, and vector scan type CRTs having some memory properties have been used for large-sized, high-definition displays for CAD. Once a vector scan type CRT has been displayed, the next screen will not be updated until the screen is erased. It is not suitable for display devices for real-time man-machine interfaces such as editing display (insertion, deletion, movement, copying, etc.).On the other hand, in the case of refresh scan type CRTs, from the viewpoint of preventing flickering (screen flickering), 60Hz as frequency
The non-interlace method is used to improve the visibility of the moving display of screen white information (moving display of icons), which requires the above refresh cycle (TV
In order to simplify the video display and drive control system, we adopted an interlaced system with a 60Hz field frequency and 30H.
z frame frequency). For this reason, the higher the display resolution, the larger the display device, requiring higher power and larger drive control, resulting in higher costs.

The reason behind the emergence of flat panel displays in recent years is this C.
This is caused by the inconvenience of increasing the size and power of RTs.

There are currently several types of flat display panels. For example, the high time division driving method (STN) for twisted nematic liquid crystals, and its variant, the method aiming at black and white display (
NTN) or plasma display systems use the same image data transfer method as CRT, and their screen update methods are also non-standard with a frame frequency of 60Hz or higher.
Since the interlaced method is used, a large flat display panel with a total number of 400 to 480 scanning lines constituting one screen, which is more than 1000 lines, has not been obtained. The reason for this is that these display panels do not have memory properties due to their driving principle, so in order to prevent flicker, a frame frequency of 60H is required.
A refresh cycle of z or more is required, so one horizontal scanning time is short, less than 10 to 50 μsec,
Good contrast could no longer be obtained.

Ferroelectric liquid crystal display devices are capable of displaying larger screens and higher definition than the display devices mentioned above, but because of their low frame frequency drive, they are not compatible with the man-machine interface display devices mentioned above. In order to cope with this, a partial rewriting scanning method (scanning only the scanning lines within the rewriting area) that takes advantage of memory properties is required. This partial rewriting scanning method is used, for example, in U.S. Pat.
This is disclosed in Publication No. 5,561, etc.

In particular, the above-mentioned partial rewriting scanning method is suitable for ferroelectric liquid crystal display devices, such as moving displays such as a mouse or cursor, and scrolling displays for multi-ride displays. Since rewriting scanning cannot be performed, in the case of a method in which partial rewriting scanning is performed by specifying the start address and end address for partial rewriting scanning, it is not possible to move the mouse or cursor while displaying a scrolling multi-window. There was a problem. For example, if we consider the scroll display of a window and the display of a pointing device, and consider their movements, first a partial rewrite scan request for the window scroll display is generated, and then a partial rewrite scan for the scroll starts on the display panel. Even if the pointing device moves, the pointing device cannot start rewriting scanning until it finishes scanning the last scanning line address of the window, so the pointing device moves according to the window size (number of partial rewriting scanning lines). There was a problem in that the device moved discontinuously, making the movement display clearly unnatural.

[Summary of the invention]

An object of the present invention is to provide an information processing device suitable for screen display that maintains real-time operability as a man-machine interface for a ferroelectric liquid crystal display device.

The present invention provides, firstly, a) means for controlling an image information storage memory so as to store received image information in the image information storage memory; The information processing apparatus is characterized in that it has means for controlling the image information storage memory so as to prohibit the storage of information in the image information storage memory.Secondly, a. receiving means; b. an image information storage device for storing the received image information in an image information storage memory in the order of graphic events having a higher display priority based on a prespecified display priority order of graphic events; means for controlling the memory, and until image information of a second graphic event having a higher display priority than the first graphic event stored in the C0 image information storage memory starts to be stored in the image information storage memory. An information processing apparatus is characterized in that it has means for controlling an image information storage memory so that image information of a first graphic event is output within a period of
Thirdly, a. means for receiving image information having first and second graphic events; b. first graphic events having higher display priorities in order based on display priorities of graphic events specified in advance;
c. means for controlling an image information storage memory to store the received image information in the image information storage memory in the order of the event and the second graphic event, and c. The information processing apparatus is characterized by having means for controlling the memory so as to prohibit storage of the image information of the second graphic event in the memory within a period during which the image information is being output from the memory.

[Detailed description of aspects of the invention]

FIG. 1 is a block configuration diagram of a ferroelectric liquid crystal display device 101 and a graphics controller 102 provided in a main body device such as a personal computer that is a source of display information. Moreover, FIG. 2 is a communication timing chart of image information.

The display panel 103 has 1120 scanning electrodes and 1 information electrode.
280 liquid crystals are arranged in a matrix and ferroelectric liquid crystal is sealed in two glass plates that have been subjected to alignment treatment.
The scanning line is connected to a scanning line driving circuit 104, and the information line is connected to an information line driving circuit 105.

The operation will be explained below with reference to the drawings. The graphics controller 102 sends scan line address information specifying scan electrodes and image information (PDO to PD3) on the scan line specified by the address information to the display drive circuit (scan line drive circuit 104 and information line) of the liquid crystal display device 101. (configured by the drive circuit 105) 104/105. In this embodiment, since image information including scanning line address information and display information is transferred through the same transmission path, it is necessary to distinguish between the two types of information. The signal for this identification is AH/DL, and when this AH/DL signal is Hi level, it indicates scanning line address information;
When it is level, it indicates that it is display information.

The scanning line address information is extracted from the image information transferred as image information PDO to PD3 on the drive control circuit 111 side of the liquid crystal display device 101, and then scanned in accordance with the timing of driving the specified scanning line. Line drive circuit 1
04. This scanning line address information is input to the decoder 106 in the scanning line driving circuit 104, and the designated scanning electrode of the display panel 103 is driven by the scanning signal generating circuit 107 via the decoder 106.
The display information is sent to the shift register 1 in the information line drive circuit 105.
08, and shifted in units of 4 pixels at the transfer lock. When the shift register 108 completes the shift for one scanning line in the horizontal direction, the display information for 1280 pixels is transferred to the attached line memory 109 and stored for a horizontal scanning period, and an information signal is generated. The signal is output from the circuit 110 to each information electrode as a display information signal.

Further, in this embodiment, the display panel 103 in the liquid crystal display device 101 is driven and the graphics controller 102 is driven.
Because the generation of scanning line address information and display information in
01/102) must be synchronized. The signal governing this synchronization is 5YNC, which is generated in the drive control circuit 111 in the liquid crystal display device 101 every horizontal scanning period. The graphics controller 102 side always monitors the 5YNC signal, and when the 5YNC signal is at Lo level, image information is transferred; conversely, when it is at Hi level, image information for one horizontal scanning line is transferred after completion of transfer. Do not do this. That is, in FIG. 2, the graphics controller 10
When the second side detects that the 5YNC signal becomes Lo level, it immediately changes the AH/DL signal to Hi level and starts transferring image information for one horizontal scanning line. Liquid crystal display device 10
The drive control circuit 111 in 1 sets the 5YNC signal to Hi level during the image information transfer period. After the writing to the display panel 103 is completed after one predetermined horizontal scanning time, the drive control circuit (FLCD controller) 111
By returning the C signal to the Lo level again, image information for the next scanning line can be received.

FIG. 3 shows the display screen 3 when there is a request to display a plurality of pieces of display information in the multi-store window and the multi-task system.

Display request 31; Mouse battle font moves diagonally and smoothly Display request 32; A certain window is selected as the active screen, and the part that overlaps with the previous window that is already displayed is displayed in front Display request 33; Keyboard command Character insertion display request by input 34; Movement of the previous character that was already displayed (
Display request 35; Overlap area display change display request 36; Non-active window display display request 37; Non-active window scroll display display request 38; Full scanning display table below 1 indicates the display priority of graphic events corresponding to the display requests 31 to 38 described above.

"Partial rewriting" in the table is a driving method that scans only the scan lines in the partial rewriting area, and "multi-field refresh" is a driving method that scans only the scanning lines in the partial rewriting area.
=2. 4. 8...2N) scanning method (driving method described in Japanese Patent Application No. 62-287172). The "display priority order" is a pre-specified order, and in this embodiment, the priority is placed on the operability of the man-machine interface.
(mouse movement display) as the highest priority display, followed by Graguitsk events 33.34.37 and 3.
The priority display order was 8. Further, "drawing operation" represents an internal drawing operation of the graphics processor.

The reason why the mouse movement display has the highest display priority is because the purpose of the pointing device is to reflect the operator's intention most quickly (in real time) on the computer. The next important thing is character input from the keyboard, which is usually buffered, and although it has high real-time performance, it is lower than that of a mouse. The screen within the window as a result of this key input does not necessarily need to be updated at the same time as the key input, and the line where the key input is input has a higher priority. The relationship between scrolling in other windows and the display of the overlap area changes depending on the system settings, but this can naturally occur under multi-tasking, and here, line scrolling that goes under the active window is It is said that the

In the present invention, the screen display control program shown in FIG. 4 receives external screen display requests 31 to 38 through the communication procedure shown in the diagram, and sends them to the ferroelectric liquid crystal display (FLCD) 101 shown in FIG. It has a function to control the transfer of image information. This screen display control program stores the rewriting area and the VRAM (
The image information to be sent to the display device 101 can be selected and transferred while being synchronized with the display device 101 by determining the drawing process to the image information storage memory) based on the display priority order.

The communication procedure shown in FIG.
1 and an operating system (O3) 42 are used. Operating System (O5) 42
The example is rMS-DO3J from Microsoft, USA.
(Product name), the company (7) rXENIXJ (Product name),
rUNIXj (product name) from AT&T (USA) and ros/2J (product name) from Microsoft (USA) are used, and as the window manager 41, rMS-Windows ver 1.0 from Microsoft (USA) is used.
3J or rver2. Oj (all product names), ROS/2 Presentation from Microsoft, USA
n Manager J (product name), public domain "X-Window J" and r DEC-Window J (product name) from Digital Equipment Corporation of the United States are used. Event emulator 4 shown in the figure
3, a set of rMs-DO3&MS-WiHd
owsJ, rUNIX&X-WindowJ, etc. can be used.

The partial rewriting used in the present invention scans only the scanning lines in the partial rewriting area, and since the FLCD has memory properties, high-speed partial rewriting can be performed. Furthermore, the present invention assumes the condition that the computer system does not rewrite display information instantaneously at high speed within the entire screen. For example, information from a pointing device (such as a mouse) may be displayed at a speed of 30 Hz or less, and the human eye cannot follow it at a speed higher than that. Similarly, the speed of smooth scrolling (scrolling every 1 line), which most requires high-speed display, is not noticeable if it is too fast. Rather, in practice, scrolling is often performed not on a line-by-line basis but on a character-by-character basis or a certain group of blocks. In computer systems, scrolling is often used when editing programs or text, and its purpose is to display movement from one line to another rather than a smooth scroll, and the scrolling is performed at a rate of 10 lines/sec in line units. There is no practical problem.

If the mouse font is composed of 32 x 32 dots and the partial rewriting scan for FLCD is driven in a non-interlaced manner, a simple calculation of this is [Formula 1] 32 lines x 100 μsec/line = 3.2
A response speed of m5ec 4312Hz is possible.

On the other hand, performing line scrolling at 10 lines/sec corresponds to a non-interlaced screen update rate of 10 Hz. Strictly speaking, at a frequency of 10 Hz, flicker should occur, but since the entire screen moves line by line, changes in information are more noticeable than flicker, so this is not actually a problem. Therefore, when scrolling row by row, the number of scanning lines that can be driven in non-interlaced mode is [Formula 2 (1/1 OHz)/100μ5ec = 100]
0 (books).

The present invention provides a data format of image information having scanning line address information shown in FIGS. 1 and 2, and a 5Y
By using communication synchronization means using NC signals, a liquid crystal display device based on a partial rewrite scanning algorithm on the downstream graphics controller side is realized.

Image information is generated by the graphics controller 102 on the main unit side, and is transferred to the display panel 103 according to the signal transfer means shown in FIGS. 1 and 2. The graphics controller 102 includes a CPU (
The host C
It is in charge of image information management and communication between the PU 113 and the liquid crystal display device 101, and the control method of the present invention is mainly realized on this graphics controller 102.

Here, in order to take a data format of image information having scanning line address information, the scanning line address information is
It was mapped onto AM114 as shown in Figure 10. VR
The AM 114 is divided into two areas, one of which is assigned to a scanning line address information area and the other to a display information area. VR
Image information is arranged horizontally for one line so that the information on the AM 114 corresponds l:l to the pixels of the display panel 103, and scanning line address information is placed at the beginning (left end) of this l line of image information. Embedded in advance. The GCPU 112 is
By reading information line by line from the left end of the RAM 114 and sending it to the liquid crystal display device 101, a data format of image information having scanning line address information is realized.

FIG. 9 shows a partial rewriting algorithm of the present invention.

Display information that requires partial rewriting for the ferroelectric liquid crystal display device 101 (pointing device, pop-up menu, etc.) is registered in advance in the GCPU 112, and when it is determined that partial rewriting is necessary for information from the host CPU 113, the display information (pointing device, pop-up menu, etc.) is partially rewritten. Move on to the rewriting routine. In the partial rewrite routine, first of all, as information for returning to the normal refresh routine after the partial rewrite routine is finished,
The scanning line address and number of scanning lines immediately before the branch are sent to the GCPU11.
2 to a pre-prepared register. Next, image information associated with partial rewriting is stored in the VRAM 114, but the host CPU 113 only uses the VRAM 112 via the GCPU 112.
Since access to RAM 114 is allowed,
The GCPU 112 manages the storage start address and storage area of image information on the VRAM 114 due to partial rewriting.

Immediately after storing the image information in the VRAM 114, access to the VRAM 114 is prohibited and transfer of the image information to the liquid crystal display device 101 is started. Liquid crystal display device 1
Transfer to 01 is done in VR in accordance with the above signal transfer method.
The GCPU 112 constantly monitors the scanning line address information mapped on AM1lJ, line by line, and the GCPU 112 updates new image information until all the image information associated with one partial rewriting has been transferred to the liquid crystal display device 101. (7) Storage to VRAM 114 is not permitted.

At this time, so that the application software side of the host CPU 113 can always issue a rewrite request to the GCPU 112 at its own timing without being aware that access to the VRAM 114 is prohibited, the GCPU 112 side requests the host CPU 113 from the application software side. However, no status signal line is provided that prohibits such processing. That is, the GCPU 112 is the host CPU 11
3, it is always passive, and the series of algorithms J that synchronizes the partial rewriting scan of the display device 101 and the storage of image information in the VRAM 114 are all performed by the GC.
It is processed within the PU 112.

In addition, for each line transfer, the occurrence of a partial rewriting request with a higher display priority than the partial rewriting image information currently being processed is checked, but only when a partial rewriting request with a higher display priority of image information occurs, the Information VRAM11
Allow storage to 4. In this way, if there is a higher level partial rewrite request during processing of a certain partial rewrite scan, storage in the VRAM 114 is prohibited only during the period of partial rewrite processing for image information with the highest display priority at that time. do.

FIG. 11 shows a multi-window display screen 1 according to the present invention.
This is an example of 10. Window l is a screen that expresses a certain tabulation result as a pie chart. Window 2 is a screen that displays the tabulated results of Window 1. Window 3 is a screen that expresses the tally results of window 1 as a bar graph. window 4
is the screen during document creation. and 5 is a pointing device mouse.

Now, windows 1 to 3 are in a stationary state, and if you are performing document editing tasks such as smooth scrolling, inserting and deleting words and phrases, and moving areas in window 4, and the mouse 5 is moved, suppose that the smooth scrolling and Mouse movement provides image information for the ferroelectric liquid crystal display device 101 that requires partial rewriting and scanning. By the way, if the entire screen is scanned with 1120 lines at -horizontal scanning time = 80 μs, the frame frequency will be about 10 Hz, which is equivalent to normal mouse movement (
≧30Hz). By applying the algorithm of the present invention and setting the priority of partial rewriting by mouse movement higher than document editing work in window 4, even if the mouse moves during scrolling, the part of the mouse is immediately rewritten. A branch can be made to the rewrite routine and a mouse write operation can be entered. At this time, the time required to branch to the mouse partial rewriting routine is at most one horizontal scanning time. For example, the above equation (1
), change the mouse font size to 32X
Assuming 32 dots, the time required to write with the mouse on the display panel 103 is 3.2 msec, and the scrolling operation is stopped during this time.
It is sufficiently short in time and has almost no effect on scrolling speed. After writing with the mouse, the process returns to the partial rewriting scan of the window 4, but if the mouse moves again, the process immediately branches to the mouse partial rewriting routine and starts the mouse writing operation. In this way, in a low frame frequency drive display with memory properties, such as the ferroelectric liquid crystal display device 101, it is possible to set the priority of partial rewriting in a manner that gives the most importance to the movement of the pointing device (mouse). Multi-window
It becomes possible to realize display functions such as multitasking.

FIG. 5 is a block diagram of the graphics controller 102, FIG. 6 is a block diagram of the digital interface, and FIGS. 7 and 8 are timing charts of information transfer.

The major difference between the graphics controller 102 used in the present invention and the conventional one is that the graphics processor 501 has its own system memory 502 and is capable of not only managing RAM 503 and ROM 504, but also managing RAM 503 and ROM 504.
In addition to executing and managing drawing commands to the RAM 503, it is possible to independently program information transfer from the digital interface 505 to the FLCD controller, management of the FLCD driving method, etc.

First, the digital interface 505 in FIG.
H, which is an external synchronization signal from the LCD controller 11
Drive circuit 1 of display panel 103 by 3YN/n
While synchronizing with 04 and 105, the final stage is 4bi
ts/clock (clock=data transfer lock) and information in the VRAM is sent.

FIG. 7 shows the timing when the FLCD rewrites the entire screen, and the parameters in the diagram are the same as the timing chart at the time of information transfer in FIG. First, the transfer of image information for one line starts after the Wf switch in FIG. 8 becomes active (low level in this case). H3YNC
It is the FLCD controller 111 that sets LOW to indicate an information request from the panel 103 side. This information request on the panel 103 side is sent to the graphics processor 501 in FIG.
is received and internally processed at the timing shown in FIG. In the timing chart of FIG. 8, H3YNC of the information request from the panel 103 side is sampled for one period of the external video clock (CLKOUT) (from another perspective, the low period of VCLK). In this case, this VCLK is actually input to the graphics processor 501, and this processor 50 is designed to sample during the 1-month OW period).
Then, after VCLK2.5 clocks, processor 501
The internal horizontal counter HCOUNT is cleared and the seventh
By programming the parameters HESYNCXHEBLNK shown in Figure 7, I (just before COUNT=1).

HBLNK in Figure 8 is disabled (high), and in the circuit of Figure 6, VCLK is then disabled as shown in Figure 8.
DATEN becomes active (high) after half a clock of
Every 4 bits from RAM, FLCD controller 111
will be forwarded to.

Now, in the line information to be transferred in this case, as shown in the lower right corner of FIG. One line of display information is sent. In this case, the FLCD controller 111 uses the AH/DL signal to identify the scanning line address information and image information.
When the /DL signal is high, it indicates scanning line address information, and when it is low, it recognizes display information. Therefore, FLC
Scanning lines are selected and display information is written in D according to this scanning line address information, so when the scanning line address information from the graphic controller in FIG. FLC is used for interlacing when increasing every third, and for m multi-interlacing when increasing every m.
D will be driven. Therefore, it is possible to control the display driving method.

The driving time for one scanning line of FLCD is usually 100 μsec.
Around c is necessary. Assuming that the drive time for one scanning line is 100 μsec and the minimum frequency at which flicker does not occur is 30 Hz, in this FLCD non-interlace drive system, [Formula 3] (1/30 Hz)/100 usec = 33
3 In the (line) interlace drive method, [Formula 4] % expression % () For m-line multi-interlace, [Formula 5] % expression % () Even if you scan (scan and drive) the scanning line, it will not be a still image. Does not cause flicker. According to the inventor's experiments, m=
It was confirmed that flicker did not occur even with 32. In other words, the display panel 103 having the scanning line of [Formula 6] %Formula %() can be displayed without flickering, and it is numerically possible to achieve high definition that has never been seen before as a flat display panel. That's why.

In addition, r74As161AJ, r74AS74 in Fig. 6
J, r74ALs257J, r74ALS878J and r74As257J each represent an IC number,
Each number in the figure represents a pin number.

FIG. 12 is a drive waveform example of the multi-interlace drive method used in the present invention.

Figure 12 shows (4M-3) field F 4M-3, (
4M-2) Field F4M-2, (4M-1) Field F4M-1 and 4M field F4M (here, 1 field means 1 vertical scanning period. M=1.
2゜3...) Scan selection signal S applied to the 4n-3rd scan electrode 4n-3 (n = 1, 2
, 3-), 4n-scan selection signal S applied to the second scan electrode 411-2, 4n-scan selection signal S applied to the n-1st scan electrode 4n-+ and 4n
A scan selection signal S4n applied to the th scan electrode is shown. According to FIG. 12, the scanning selection signal 54n-3 includes (4M-3) fields F 4M-3 and (4M-1
) The voltage polarities (voltage polarities based on the voltage of the scan non-selection signal) in the same phase of field F4M-1 (M=1.2.3...) are opposite to each other, and (4M- 2) Field F4M-2 and 4M field F4M are not scanned, and the same applies to the scan selection signal 54n-1. Furthermore, the scan selection signals S 4n-3 and 34n-1 applied within the 1-field period have different voltage waveforms, and the voltage polarities of the same phase are opposite to each other.

Similarly, in the scan selection signal S 4n-2, the voltage polarities (voltage polarities based on the voltage of the scan non-selection signal) in the same phase of the (4M-2) field F 4M-2 and the 4M field F4M are opposite to each other. and (4M3
) field F 4M-3 and (4M-1) field F
4M-1 does not scan, and the same applies to the scan selection signal S4n. Further, the scan selection signals 54n-2 and S4n applied within the 1-field period have different voltage waveforms, and the voltage polarities of the same phase are opposite to each other.

In the example of the scan drive waveform shown in FIG. 12, the third phase is provided for stopping the screen all at once (for example, applying voltage O to all pixels constituting the screen at the same time), and the scan selection signal is The third phase is set to voltage 0 (same level as the voltage of the scan non-selection signal).

Also, according to FIG. 12, the information signal applied to the signal electrode in the (4M-3)th field F 4M-3 is as follows:
A white signal (by combination with the scan selection signal 54M-3, a voltage 3vo exceeding the threshold voltage of the ferroelectric liquid crystal in the second phase is applied to the scan selection signal 54n-3 to form a white pixel. ) and a hold signal (by combining with the scan selection signal 54n-3, a voltage ±vo smaller than the threshold voltage of the ferroelectric liquid crystal is applied to the pixel) are selectively applied, and the scan selection signal 54n-1 is a black signal (by combining with the scanning selection signal 5an-+, a voltage -3Vo exceeding the threshold voltage of the ferroelectric liquid crystal is applied in the second phase to form a black pixel) and a holding signal. (By combining with the scan selection signal 54n-1, a voltage ±v smaller than that of the ferroelectric liquid crystal is applied to the pixel.
o is applied) are selectively applied. and,(
Since the scan non-selection signal is applied to the 4n-2)th and (4n)th scan electrodes, the information signal is applied as is.

Following the writing of the above-mentioned (4M-3) field F 4M-3, the information signal applied to the signal electrode in (4M-2) field F 4M-2 is the scanning selection signal 54n-2.
For the scanning selection signal S4n, the same black signal and holding signal as described above are selectively applied, and for the scanning selection signal S4n, the same white signal and holding signal as described above are selectively applied. Since the scan non-selection signal is applied to the (4n-3)th and (4n-1)th scan electrodes, the information signal is applied as is.

Also, (4M-2) Field F Following 4M-2 ((4M
-1) In field F4M-1, as information signals applied to the signal electrodes, a black signal and a hold signal similar to those described above are selectively applied to the scan selection signal 54n-3, and the scan selection signal 54n -+, the same white signal and holding signal as described above are selectively applied. and (4n-2
Since the scan non-selection signal is applied to the )-th and 4n-th scan electrodes, the information signal is applied as is.

(4M-1) Following field F4M-1, the information signals applied to the signal electrodes in <4M field F4M include the same black signal and hold signal as described above for scanning selection signal 54n-2. The same white signal and holding signal as described above are selectively applied to the scanning selection signal S4n. and (4n-3)th and (4n-1)
Since the scan non-selection signal is applied to the )th scan electrode, the information signal is applied as is.

13(A), (B) and (C) show timing charts when the display state shown in FIG. 13(D) is written using the drive waveform shown in FIG. 12. 13th
In the figure (D), ◯ indicates a white pixel, and ◯ indicates a black pixel. 1S1 in FIG. 13(B) is a time series waveform of the voltage applied to the intersection of the scanning electrode S and the signal electrode 11. I2-3. is a time-series waveform of the voltage applied to the intersection of scanning electrode S1 and signal electrode I2. Similarly 1. −
82 is a time series waveform of the voltage applied to the intersection of the scanning electrode S2 and the signal electrode 11. I2-82 is scanning electrode S2
This is a time-series waveform of the voltage applied to the intersection of the signal electrode I2 and the signal electrode I2.

Further, the present invention is not limited to the above-mentioned driving waveform examples, but for example, the driving waveforms are set every four scanning lines, every fifth scanning line, every sixth scanning line, every seventh scanning line, etc.
It is possible to scan every other book, preferably every 8 or more books. Further, the scanning selection signal may have a waveform whose polarity is inverted for each field as shown in FIG. 12, or may have the same waveform for each field.

FIG. 14 schematically depicts an example of a ferroelectric liquid crystal cell. 141a and 141b are In203.

SnO2 and ITO (indium tin oxide)
It is a substrate (glass plate) coated with transparent electrodes such as
In between, an S m C aqueous phase liquid crystal with a liquid crystal molecular layer 142 oriented perpendicular to the glass surface is sealed. A thick line 143 represents a liquid crystal molecule, and this liquid crystal molecule 143 has a dipole moment (P) 144 in a direction perpendicular to the molecule. Substrates 141a and 14
When a voltage above a certain threshold is applied between the electrodes on 1b,
The orientation direction of the liquid crystal molecules 143 can be changed so that the helical structure of the liquid crystal molecules 143 is unraveled and all of the dipole moments (on P) 144 are oriented in the direction of the electric field. liquid crystal molecule 1
43 has an elongated shape and exhibits refractive index anisotropy in the long axis direction and the short axis direction. Therefore, if polarizers are placed above and below the glass surface in a crossed nicol positional relationship, voltage can be applied. It is easily understood that the liquid crystal optical modulator is a liquid crystal optical modulator whose optical characteristics change depending on the polarity. Furthermore, when the thickness of the liquid crystal cell is made sufficiently thin (for example, 1μ),
As shown in Figure 15, the helical structure of liquid crystal molecules unravels even when no electric field is applied, and its dipole moment P
a or pb points upward (154a) or downward (154b
). In such a cell, the 15th
As shown in the figure, when an electric field Ea or Eb with a different polarity greater than a certain threshold value is applied for a predetermined period of time, the dipole moment changes its direction to an upward direction 154a or a downward direction 154b with respect to the electric field vector of the electric field Ea or Eb, and accordingly the liquid crystal The molecule is either in the first stable state 153a or in the second stable state 1
53b.

There are two advantages to using such a ferroelectric liquid crystal as an optical modulation element. Firstly, the response speed is extremely fast, and secondly, the alignment of liquid crystal molecules has a bistable state. To explain the second point with reference to FIG. 15, for example, when the electric field Ea is applied, the liquid crystal molecules enter the first stable state 153a.
This state is stable even when the electric field is turned off.

Furthermore, when an electric field Eb in the opposite direction is applied, the liquid crystal molecules are oriented to a second stable state 153b and change their orientation, but they remain in this state even after the electric field is turned off. Further, as long as the applied electric field Ea does not exceed a certain threshold value, each orientation state is maintained. In order to effectively realize such fast response speed and bistability, it is preferable for the cell to be as thin as possible, and generally from 0.5μ to
20μ, especially 1μ to 5μ is suitable.

〔Effect of the invention〕

As explained above, in partial rewriting scanning for a display device with memory such as a ferroelectric liquid crystal display device, a means is provided to prohibit storage of image information in VRAM during the partial rewriting scanning period of the display panel. By synchronizing the partial rewriting scan of the panel and the storage of image information in VRAM, high-speed display applications such as cursor movement and mouse movement from a pointing device can be performed using a ferroelectric liquid crystal display device. It can be applied to a display device driven by a low frame frequency, and as a result, it has become possible to realize smooth moving display.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a liquid crystal display device and a graphics controller, and FIG. 2 is a timing chart for communicating image information between the liquid crystal display device and the graphics controller. FIG. 3 is a display screen diagram schematically showing a plurality of graphic events. FIG. 4 is a block diagram of a display control program used in the present invention. Fifth
The figure is a block diagram of the graphics controller used in the present invention, and FIG. 6 is a block diagram of the digital interface. FIG. 7 is an interface timing chart diagram for the display driving device used in the present invention.
FIG. 8 is an interface timing chart diagram for the FLCD controller. FIG. 9 is a sequence diagram showing an algorithm for partial rewriting used in the present invention. FIG. 1O is an explanatory diagram showing data mapping of scanning line address information and display information on the VRAM used in the present invention. FIG. 11 is a diagram of a multi-window display screen in this embodiment. Figures 12 (A) and CB) are drive waveform diagrams used in the present invention, and Figures 13 (A) to (C)
is a timing chart thereof, and FIG. 13(D) is a schematic diagram showing the display state of pixels at that time. FIGS. 14 and 15 are perspective views of the ferroelectric liquid crystal cell used in the present invention.

Claims (13)

[Claims] (1) a. Means for controlling the image information storage memory so as to store the received image information in the image information storage memory, and b. Image information of the image information during the partial rewriting scan period of the display panel. An information processing device comprising means for controlling an image information storage memory so as to prohibit storage into the storage memory. (2) Serially receives scan line address information for specifying the scan electrode to be selected from the image information storage memory and display information for controlling the display information signal to be added to the information electrode on the selected scan electrode. 2. The information processing apparatus according to claim 1, further comprising means for transmitting the information to the drive control means. (3) The information processing apparatus according to claim 2, further comprising means for storing the scanning line address information. (4) Claim 2 further comprising means for controlling the drive control means to distribute the scanning line address information and display information.
information processing equipment. (5) The information processing apparatus according to claim 4, further comprising means for synchronizing with said drive control means. (6) The information processing apparatus according to claim 2, wherein the scanning line address information is information for specifying each scanning electrode on which partial rewriting scanning is performed. (7) The information processing apparatus according to claim 2, wherein the scanning line address information is information for specifying each scanning electrode for scanning one frame. (8) a. Means for receiving image information having a plurality of graphic events; b. Received image information in the order of display priority based on a pre-specified display priority of graphic events; c. a second graphic event having a higher display priority than the first graphic event stored in the image information storage memory; An information processing apparatus comprising means for controlling an image information storage memory so that image information of a first graphic event is output within a period until the image information of the first graphic event starts being stored in the image information storage memory. (9) After the output of the image information of the second graphic event stored in the image information storage memory is completed, the first
9. The information processing apparatus according to claim 8, further comprising means for controlling an image information storage memory to start outputting image information of a graphic event. (10) a. means for receiving image information having first and second graphic events; b. first graphic events having higher display priorities in descending order of display priority based on display priorities of graphic events specified in advance; and (c) means for controlling an image information storage memory to store the received image information in the image information storage memory in the order of the first graphic event and the second graphic event, and c. An information processing apparatus comprising: means for controlling the memory so as to prohibit storage of image information of the second graphic event in the memory within a period during which image information of the second graphic event is being output from the memory. (11) The stored image information includes scanning line address information for specifying a scanning line to be selected and display information for controlling a display information signal applied to an information electrode on the scanning electrode to be selected. 11. The information processing apparatus according to claim 10, further comprising means for serially transferring the image information. (12) The information processing apparatus according to claim 11, further comprising means for storing the outputted scanning line address information. (13) The information processing apparatus according to claim 10, wherein among the display priorities of the graphic events, the highest priority display is a moving display.