JPH0310117B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a pulse counting method that allows smooth digital display. When the difference between the latest counted value and the displayed value is less than a predetermined value, the displayed value is held; when it exceeds the predetermined value, the latest counted value is updated and displayed as the displayed value; A pulse counting method is known that updates and displays the latest counted value as a display value when the change continues a predetermined number of times. Figure 1 shows a block diagram of this pulse counting method.
The pulse signal inputted from the counter 2 is counted at a gate period, updated and held in a latch circuit 3, and digitally displayed on a display 5 via a decoder driver 4. Further, the difference between the latest count value counted by the counter 2 and the display value of the latch circuit 3 is determined by the digital comparator 6, and if the difference is a value corresponding to "1" of the display unit, the sign of the value is A signal is output from the comparator 6 to the counters 7 and 7' in response to the signal, and the number of consecutive signals is counted. When the number of consecutive signals exceeds a predetermined number set in the comparator 8, a load pulse is output from the comparator 8. output, or gate 9
The content held in the latch circuit 3 is updated to the latest count value via the latch circuit 3, and the change is immediately digitally displayed on the display 5. When the difference is greater than a predetermined value, that is, "2" in the display unit, a load pulse is output from the comparator 6, the contents of the latch circuit 3 are updated to the latest count value, and the change is digitally recorded on the display 5. indicate.

[Table] For example, in the case of A in Table 1, the count value at counter 2 exhibits an intermittent fluctuation of +1, so
When the count value is "6", that is, when counting every other time, a signal is output from the comparator 6 and counted by the counter 7, but the counter 7 is reset when the output signal from the comparator 6 is interrupted. Therefore, the count value is set in advance to the comparator 8 for a predetermined number of consecutive times (in this example, the number of consecutive times is 3).
Since the load pulse is not output from the comparator 8, the content of the latch circuit 3 remains at "5", and the displayed value on the display 5 does not change, thus preventing flickering. . Incidentally, when the count value exhibits a fluctuation of -1, a signal is outputted to the counter 7', and the determination of the consecutive number of times is performed in the same manner as described above. Next, in the case of B in Table 1, the change in the count value is +
Since it is stable at 1, the difference signal is continuously output from the comparator 6 and counted by the counter 7.
When the count value of the counter 7 reaches three consecutive times, a load pulse is output from the comparator 8, and the OR gate 9
is applied to the latch circuit 3 via the latch circuit 3, the held contents are updated, and the change is immediately digitally displayed on the display 5. Furthermore, in the case of C in Table 1, since the difference between the counted value and the displayed value is more than the display unit "2", a load pulse is output from the comparator 6, and the load pulse is outputted via the OR gate 9 to the latch circuit 3. The contents held are updated, and the change is immediately digitally displayed on the display 5. However, in the case of D in Table 1, the count value smoothly increases by the display unit "1" at each gate period, but the difference between the count value and the display value at the gate period _T2 is the display unit "1". 1'', and the contents of the latch circuit 3 are not updated. However, the gate period
At _T3 , the difference between the count value and the display value is "2" in display units, so a load pulse is output from the comparator 6, and the contents of the latch circuit 3 are updated at this stage. Furthermore, since the display unit is increased by "2" every two gate periods thereafter, there is a drawback that the display is displayed with a jump in contrast to the smooth change in the count value. Note that even when the count value smoothly decreases by "1" in the display unit in each gate period, the display is similarly decreased by "2" in the display unit in two gate periods. Therefore, if this conventional pulse counting method is used to digitally display the running speed of a vehicle, for example, and it can be displayed in units of 1 km/h,
During smooth acceleration/deceleration, an increase/decrease is displayed every 2 km/h, and this has the disadvantage of interfering with smooth increase/decrease display, especially when displayed in a bar graph. In order to eliminate the drawbacks of the conventional example, the present invention provides that when the difference between the latest counted value and the displayed value within the gate time is the value of the minimum display unit, and the same positive or negative state occurs a predetermined number of times in succession. , the latest counted value is updated and displayed as the display value, and if the difference exceeds the minimum display unit and is the first set value or is greater than the first set value, the minimum display unit is added or subtracted from the latest counted value. The value is updated and displayed, and when the difference between the latest counted value and the displayed value is greater than or equal to the first set value and less than the second set value, the value of the minimum display unit is added or subtracted from the latest counted value. The value is updated and the difference is the second
When the predetermined value is exceeded, the latest counted value is updated and displayed as is, and when the difference between the latest counted value and the displayed value is the first setting value, the value obtained by adding or subtracting the minimum display unit from the latest counted value is updated and displayed, and when the difference exceeds a first set value, the latest counted value is updated and displayed.The purpose is to prevent flickering of the display and to provide smooth display without jumps. This provides a pulse counting method. Hereinafter, embodiments will be described in detail with reference to the drawings. FIG. 2 shows a block diagram of a pulse counting method according to an embodiment of the present invention. Pulses input from an input terminal 10 are counted by a counter 11 at a gate period, and passed through a gate circuit 12 to a latch circuit 13. The data is updated and held and digitally displayed on the display 15 via the decoder driver 14. The digital comparator 17 determines the difference between the latest count value of the counter 11 and the display value of the latch circuit 13, and if the difference is a value corresponding to the minimum display unit "1", the digital comparator 17 sends a signal to the counters 18, 18. A difference signal is output to the counters 18 and 18', and the number of consecutive positive or negative outputs of this difference signal is counted. A load pulse is output from
The gate circuit 12 is switched to the output side of the counter 11, and the content held in the latch circuit 13 is updated to the count value of the counter 11 through the OR gate 20. Further, when the difference between the latest count value and the display value exceeds the first set value in display units, a load pulse is output from the comparator 17, switching the gate circuit 12 to the output side of the counter 11, and switching the gate circuit 12 to the output side of the counter 11.
0, the content held in the latch circuit 13 is updated to the count value of the counter 11. Further, when the difference between the latest count value and the display value is the first set value, a signal is output from the comparator 17 to the arithmetic circuit 16, and the value obtained by adding or subtracting the value of the minimum display unit from the count of the counter 11 is obtained. That is, a value obtained by increasing or decreasing the value of the minimum display unit with respect to the display value is output to the gate circuit 12, and at the same time, the gate circuit 12 is switched to the output side of the arithmetic circuit 16 by the load pulse from the comparator 17, and the OR gate is 20, the contents held in the latch circuit 13 are updated to the output value of the arithmetic circuit 16.

[Table] Next, the operation of this embodiment will be explained with reference to Table 2. First, cases A and B in Table 2 are executed by the same process as in cases A and B in Table 1 in the conventional example of FIG. Also, if the difference between the counted value and the displayed value exceeds the first set value, for example, exceeds "2" in the display unit, the counted value is immediately updated and displayed as the displayed value, as in case C of Table 2. , follows sudden changes well. Here, if the gate period increases smoothly by the minimum display unit "1" as in case D in Table 2, the difference between the counted value and the display value will be a change including "2" in the display unit. will be presented. In other words, the difference between the count value and the display value at time T ₂ is "1" in display units.
Therefore, the contents of the latch circuit 13 are not updated, and the difference becomes "2" in display units at time _T3 . Therefore, in this embodiment, in order to prevent this jump, a control signal is output from the comparator 17 to the arithmetic circuit 16, and the arithmetic circuit 16 calculates the value obtained by subtracting "1" from the count value in display units, that is, "6". " is output at time _T3 , and the contents of the latch circuit 12 are updated and held at "6", which is incremented by "1", in display units, instead of the current display value "5". Furthermore, in the case of E in Table 2, it is an example in which the minimum display unit descends smoothly by "1" at the gate period.
In this example, as well as the example D in Table 2, the time
At T ₃ , the difference is -2 in display units, but
The difference in the comparator 17 becomes negative, and a control signal corresponding to the magnitude of the absolute value is output to the arithmetic circuit 15, and the arithmetic circuit 16 calculates the value obtained by adding "1" in display units from the counted value, that is, "9". " is output at time _T3 , and the current display value of the contents of the latch circuit 12 is changed to "10", and "1" is updated and held in display units to a value "9", which is decreased from "1". In this way, when the count value rises or falls smoothly, the display value is also increased or decreased by "1" in units of display, allowing smooth digital display without jumps. Therefore, when displaying the running speed of a vehicle digitally or as a bar graph, if it is possible to display it in display units of 1 km/h, the deviation of ±1 caused by out of synchronization with the gate pulse when driving at a constant speed. The display does not flicker due to errors, making extremely stable display possible, and smooth increase/decrease display in units of 1 km/h without jumps during smooth acceleration/deceleration. In the above embodiment, when the first set value is reached, the minimum display unit "1" is added to or subtracted from the latest counted value, and when the first set value is exceeded, the counted value of the counter 11 is latched. Although it is held and displayed by the circuit 13, when the value is greater than or equal to the first set value and less than the second set value, the display unit "1" is added (when falling) or subtracted from the counted value of the counter 11. (when rising), and if it exceeds the second set value, the counted value of the counter 11 is held by the latch circuit 13 and updated and displayed, and when there is a relatively large change, the actual measured value is displayed following. However, when the change is relatively smooth, smooth display without jumps along the display unit can be performed. That is, in FIG. 2, when the difference between the counted value of the counter 11 and the displayed value of the latch circuit 13 is ±1 in the minimum display unit, the counter 19 performs a flickering prevention operation to determine the number of consecutive times, and the counted value and If the difference in display values is more than the first set value, for example "2" or more of the display unit, and less than the second set value, for example "4" or less of the display unit, which is a relatively smooth change, the first As shown in D in the table, it is possible to follow the changes in the count value well and display smooth increases and decreases without jumps along the smooth rise or fall of the count value. When there is a relatively large change, such as when the display unit is "4" or more, the counted value can be updated and displayed as is, as in case C of Table 2. Furthermore, in the embodiment shown in FIG. 2, when the difference between the counted value and the displayed value is greater than or equal to the first set value, for example, "2" or more in display units, the smallest display unit "1" is added to the counted value.
Even if the value obtained by adding (when descending) or subtracting (when ascending) the value is displayed, smooth display without jumps can be performed.

【table】

[Table] In other words, as in case A of Table 3, when the count value at time T ₁ is "5" and the displayed value is "5", the time
When the count value reaches "7" at time T ₂ , the latch circuit 13 holds and displays the value "6" obtained by subtracting the minimum display unit from the count value "7" in the arithmetic circuit ₁₆ . When becomes "10", arithmetic circuit 1
6, the display value is changed to "9", and if the count value changes from "15" to "8", the count value becomes "8".
The value ``9'' is displayed by adding the minimum display unit ``1'' to . In addition, even when there is a smooth rise or fall as shown in B (ascending) or C (descending) in Table 3, the arithmetic circuit uses a control signal corresponding to the positive/negative difference from the comparator 17 in Fig. 2. 16 similarly adds or subtracts the minimum display unit "1" and transfers the value to the latch circuit 13, thereby making it possible to smoothly display an increase or decrease. In the above description of the embodiment, only one counter 11 for counting input pulses is provided, so the gate time is T, and during rapid acceleration/deceleration, C in Table 2 and C in Table 3 are used. The display jumps as shown in A, but the counting mechanism is 4 as shown in Figure 3.
shift registers 21 ₁ , 21 ₂ , 21 ₃ , 21 ₄
If the total sum is taken as the count value of gate time T, the update period will be t/4, and smoother increase/decrease display will be possible. As explained above, according to the present invention, when there is a sudden change, the counted value is displayed as is, when there is a smooth change, the minimum display unit is added or subtracted from the counted value, and the first and second By adding or subtracting the minimum display unit from the count value or displaying the count value as it is depending on the setting value, it is possible to obtain a smooth display that closely follows changes in the count value without jumps. It has the advantage of being possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional pulse counting method, FIG. 2 is a block diagram of a pulse counting method according to an embodiment of the present invention, and FIG. 3 is a block diagram of a part of another embodiment of the present invention. It is a diagram. 10...Input terminal, 11...Counter, 12...
... Gate circuit, 13 ... Latch circuit, 14 ... Decoder driver, 15 ... Display, 16 ... Arithmetic circuit, 17 ... Comparator, 18, 18' ... Counter, 19 ... Comparator, 20 ... ...Orgate, 21
...Shift register.

Claims (1)

[Claims] 1 Count the pulse signals generated within a predetermined period,
Calculate the difference between the latest counted value and the displayed value, and if this difference is the value of the minimum display unit and the same positive or negative state occurs a predetermined number of times in succession, the displayed value is updated and displayed as the latest counted value. , if the latest counted value is larger than the displayed value, the value obtained by subtracting the value of the minimum display unit from the latest counted value is updated as the displayed value, and if the latest counted value is smaller than the displayed value, the latest counted value is updated to the minimum value. A pulse counting method characterized by updating the display value by adding the value of the display unit.