JPH03101267A - Thin film image sensor and its manufacture - Google Patents

Thin film image sensor and its manufacture

Info

Publication number
JPH03101267A
JPH03101267A JP1238533A JP23853389A JPH03101267A JP H03101267 A JPH03101267 A JP H03101267A JP 1238533 A JP1238533 A JP 1238533A JP 23853389 A JP23853389 A JP 23853389A JP H03101267 A JPH03101267 A JP H03101267A
Authority
JP
Japan
Prior art keywords
type
amorphous semiconductor
layer
semiconductor layer
image sensor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1238533A
Other languages
Japanese (ja)
Inventor
Tadashi Morimoto
廉 森本
Tetsuhisa Yoshida
哲久 吉田
Takashi Hirao
孝 平尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1238533A priority Critical patent/JPH03101267A/en
Publication of JPH03101267A publication Critical patent/JPH03101267A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は非晶質半導体を用いた薄膜イメージセンサ及び
その製造方法に関するものであム従来の技術 非晶質半導体(よ 結晶半導体と比べて高いバルク比抵
抗を有するた八 顕著な光電特性を示すものが多(〜 
光電変換素子のう板 人間の感覚とほぼ同程度の応答速
度があればよい分野においてζよ大面積化の容易さや高
解像力といった特徴をいかして非晶質半導体が広く使用
、されていも近爪 水素化非晶質シリコン(a−3i:
H)を光電変換部に使用した薄膜イメージセンサの開発
が盛んに行われていも この理由(表 上述の非晶質半
導体の特徴に加え 非晶質シリコンの光波長分光感度領
域力(可視光領域とほぼ一致しているからであも a−3i:Hを用いた光電変換素子の代表的なものに第
3図に示すサンドウィッチ型フォトダイオード素子があ
翫 第3図(a)はプラズマCVD法によるa−3i:
H複数層5a、イオンドーピング法によるa−8i:H
の9層52(p)、及び絶縁層53のみを示す上面図で
あも 第3図(b)は第3図(a)に示すX−X線によ
って切断した断面図であa 従来のフォトダイオード素
子の製造工程としては第3図(b)に示すようく 個別
電極51上にプラズマCVD法によりa−3i:Hの1
層52(n)及び1層52(i)を堆積 パターン形成
した微 絶縁層53を形成し コンタクト用の窓54を
エツチングにてあ(す、絶縁層53をマスクとしてイオ
ンドーピング方法によりa−3i:Hの9層52(P)
を形成しその後共通電極55を形成しフ第1・ダイオー
ドを作製すa 以上のよう囮 共通電極55との接触層
となる不純物層52(p)をイオンドーピング方法によ
り形成し 個別電極51との接触層である不純物層52
(n)は従来のプラズマCVD法により形成する方法が
発明者の一人により特願平1−45992で出願されて
いも 発明が解決しようとする課題 しかし 従来のイオンドーピングにより、共通電極55
との接触層となる不純物層52(p)を選択的に形成す
る方法でζ友 個別電極51との接触層52(n)がパ
ターン形成されていないため凶 第4図(a)(第4図
(a)は第3図(a)に示すY・−Ys線によって切断
した断面図であa )に示したように素子の集積度が上
がると隣接する素子間のクロストークが問題になってく
ム また a−8i:  H52(n)と共通電極55
との短絡を防止するた&5iNX等の絶縁層53を必要
とすム 本発明ζ上 素子分離用の絶縁層形成工程を必要としな
いで、個別電極及び共通電極との接触層である低抵抗の
不純物層が素子間で絶縁分離できる従来より簡単で高性
能な薄膜イメージセンサ及びその製造方法を提供するこ
とを目的とすム課題を解決するための手段 本発明は上述の課題を解決するた八 基板上に順次積層
された個別電機 非晶質半導体薄風 共通電極から少な
くとも構成された光電変換素子を複数個配列した構成に
おいて、それぞれの前記個別電極との接触層及びそれぞ
れの前記共通電極との接触層を何れもi型またはi型に
近い非晶質半導体により分離する薄膜イメージセンサで
あム作用 本発明は上述の構成により、個別電極との接触層および
共通電極との接触層がいずれも選択的に形成され しか
も抵抗の高いi型またはi型に近い非晶質半導体により
接触層が絶縁分離されるた八 従来の個別電極との接触
層のみをイオンドーピング方法で選択的に形成する方法
と比べて、素子間のクロストークが大幅に低減でき、更
に新たな素子分離用の絶縁膜形成工程を必要とせず工程
が簡略化されも 実施例 第1図は本発明に係る薄膜イメージセンサの要部の製造
方法を示した工程図であ翫 第1図(b)+i第1図(
a)のa−8i:H層12(n)、 12(il)だけ
を取り出した上面図であも また同様へ 第1図(d)
は第1図(C)のa−3i:H複数層14のみの上面図
であり、第1図(f)は第1図(e)のa−3i:H複
数層14のみの上面図であも 以下、薄膜イメージセンサの要部の製造方法を説明すも
 まず、パイレックスガラス 石英等の絶縁性基板10
上にCr、AI等の個別電極11をパターン形成し プ
ラズマCVD法により第1のi型非晶質半導体12(i
t)を堆積させた徴a−3i:Hの0層12(n)形成
のため第1のi型非晶質半導体12(it)上にレジス
ト等のマスク13を形成すム次にこの試料212を第2
図に示したプラズマ処理装置の基板台211上に設置し
 ガスボンベ201の族元素を含む気体として、ホスフ
ィン(PHs)、五弗化燐(PFI)、アルシン(As
Hs)等の純ガスの内の1種類からなるドーピングガス
を、ガスボンベ202のヘリウムまたは水素の希釈ガス
で希釈した混合ガスを、流量制御装置213にて流量を
調整して放電室203ヘガス導入管204から導入すa
この混合ガスを高周波電極205によって供給する高周
波電力によって放電分解すも そして第1の電極20&
 第2の電極207に印加される直流電圧によって、放
電分解により生じた高励起のプラズマ中のイオンを開口
部208から引出し加速すム そしてイオン流209を
基板室210内の基板台211上の試料212に照射し
て、注入 ドーピングを行い0層12(n)を選択的に
形成すも 希釈ガスとしてヘリウムを用いた場合、水素
イオン等によるイオンダメージが低減される(第1図(
a)、(b))。その徽 第1の1層12(il)及び
0層12(n)上に再びプラズマ処理装置により第2の
i層を堆積し 前述のイオンドーピング方法でp型層1
2(p)を選択的に形成すも この場へ 例えばドーピ
ングガスとして(よ  族元素を含む気体として、ジボ
ラン(B*H*)、三弗化はう素(BFs)等を用いも
 第1図(c)では第1の1層12(il)と第2のi
層を合わせてa−3i:Hの1層12(i)としてあ、
5a−3i:Hの1層12(i)を堆積する際圏 場合
によってはPやBの元素を微量添加する(第1図(C)
、 (d))。最後く ITOや5no2等の透明な共
通電極16を形成する(第1図(e)、(f))。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a thin film image sensor using an amorphous semiconductor and a method for manufacturing the same. Many of them have specific resistance and exhibit remarkable photoelectric properties (~
Photoelectric conversion element board In fields where a response speed roughly equivalent to that of the human sense is required, amorphous semiconductors are being widely used, taking advantage of their features such as ease of increasing the area and high resolution, and are still in the near future. Hydrogenated amorphous silicon (a-3i:
Despite the active development of thin-film image sensors using H) in the photoelectric conversion section, the reasons for this (Table 1) In addition to the characteristics of amorphous semiconductors mentioned above, The sandwich-type photodiode shown in Figure 3 is a typical example of a photoelectric conversion element using a-3i:H. Figure 3 (a) shows the plasma CVD method. According to a-3i:
H multiple layer 5a, a-8i by ion doping method: H
Although it is a top view showing only the nine layers 52(p) and the insulating layer 53, FIG. 3(b) is a cross-sectional view taken along the line X-X shown in FIG. As shown in FIG. 3(b), the manufacturing process of the diode element is as shown in FIG. 3(b).
A layer 52(n) and a layer 52(i) are deposited, a patterned fine insulating layer 53 is formed, and a contact window 54 is etched. :H 9 layers 52 (P)
After that, a common electrode 55 is formed to fabricate the first diode. As described above, an impurity layer 52 (p) which becomes a contact layer with the common electrode 55 is formed by an ion doping method. Impurity layer 52 which is a contact layer
(n) is a problem to be solved by the invention even though a method for forming the common electrode 55 by the conventional plasma CVD method was filed in Japanese Patent Application No. 1-45992 by one of the inventors.
The method of selectively forming the impurity layer 52(p) which becomes the contact layer with the Figure (a) is a cross-sectional view taken along the Y/-Ys line shown in Figure 3 (a). As shown in Figure 3 (a), as the degree of integration of elements increases, crosstalk between adjacent elements becomes a problem. Tekumu also a-8i: H52(n) and common electrode 55
In order to prevent short circuits with the An object of the present invention is to provide a thin film image sensor that is simpler and has higher performance than the conventional art, in which impurity layers can be insulated and separated between elements, and a method for manufacturing the same. In a configuration in which a plurality of photoelectric conversion elements each including at least a common electrode are arranged, a contact layer with each of the individual electrodes and a contact layer with each of the common electrodes are arranged. The present invention is a thin film image sensor in which the contact layers are separated by an i-type or nearly i-type amorphous semiconductor.The present invention has the above-described structure, so that both the contact layer with the individual electrodes and the contact layer with the common electrode are The contact layer is insulated and separated by an i-type or near-i-type amorphous semiconductor that is selectively formed and has high resistance.8 A method in which only the contact layer with the conventional individual electrode is selectively formed using an ion doping method. Embodiment Figure 1 shows a thin film image sensor according to the present invention. This is a process diagram showing the manufacturing method of the main parts.
a-8i of a): A top view with only the H layers 12(n) and 12(il) taken out; the same goes for Figure 1(d)
is a top view of only the a-3i:H multiple layer 14 in FIG. 1(C), and FIG. 1(f) is a top view of only the a-3i:H multiple layer 14 in FIG. 1(e). Below, we will explain how to manufacture the main parts of a thin film image sensor. First, we will start with an insulating substrate 10 made of Pyrex glass, quartz, etc.
A first i-type amorphous semiconductor 12 (i
A-3i: A mask 13 such as a resist is formed on the first i-type amorphous semiconductor 12 (it) to form a 0 layer 12 (n) of H. 212 as the second
A gas cylinder 201 is installed on the substrate table 211 of the plasma processing apparatus shown in the figure, and contains phosphine (PHs), phosphorus pentafluoride (PFI), arsine (As) as a gas containing group elements.
A mixed gas made by diluting a doping gas consisting of one type of pure gas such as Hs) with a diluent gas of helium or hydrogen in the gas cylinder 202 is supplied to the discharge chamber 203 through the gas introduction tube by adjusting the flow rate with the flow rate controller 213. Introduced from 204a
This mixed gas is discharged and decomposed by high frequency power supplied by the high frequency electrode 205, and the first electrode 20&
The DC voltage applied to the second electrode 207 pulls out ions in the highly excited plasma generated by discharge decomposition through the opening 208 and accelerates them. When helium is used as a diluent gas, ion damage caused by hydrogen ions, etc. is reduced (see Figure 1).
a), (b)). Then, a second i layer is deposited on the first layer 12 (il) and layer 12 (n) using the plasma processing apparatus, and then the p-type layer 1 is deposited using the above-mentioned ion doping method.
For example, diborane (B*H*), boron trifluoride (BFs), etc. may be used as a doping gas (as a gas containing a group element). In figure (c), the first layer 12 (il) and the second i
Combine the layers to form one layer 12(i) of a-3i:H,
5a-3i: When depositing one layer of H 12(i), trace amounts of elements such as P and B may be added in some cases (Fig. 1 (C)).
, (d)). Finally, a transparent common electrode 16 made of ITO, 5no2, etc. is formed (FIGS. 1(e) and 1(f)).

第4図(b)は第1図(f)のY + −Y +線によ
って切断された断面図であも 第4図(b)を見れば分
かるようく 共通電極16及び個別電極11との接触層
であるa−3i:  HI3(p)とa  Si:  
HI3(n)がいずれも選択的に形成され 個々の接触
層の周辺が全て抵抗の高いa−3i:Hの1Fif12
(i)テ絶縁分離されていることにより、素子間のクロ
ストークが大幅に低減でき、更に素子分離のための絶縁
層は特に設ける必要がな(〜 な叙 本実施例においてはITO等の透明な共通電極を
素子表面に形成した場合について示したバ 絶縁性基板
上に透明電極を設けてもよく、何れの場合も透明電極か
ら検知すべき光信号を入射すも また 本実施例ではn
ip/ITO構成を示した力<、 nip/ITOの代
わりにnin/ITO,p i p/ITo、p i 
n/IToで実施しても同様の効果を有すa 発明の効果 以上の説明から明らかなように 本発明によれζ坂 個
別電極との接触層および共通電極との接触層がいずれも
選択的に形成され しかも抵抗の高いi型またはi型に
近い非晶質半導体により接触層が絶縁分離されるた八 
従来の個別電極との接触層のみをイオンドーピング方法
で選択的に形成する方法と比べて、素子間のクロストー
クが大幅に低減でき、更に新たな素子分離用の絶縁膜形
成工程を必要とせず工程が簡略化されも
Although FIG. 4(b) is a cross-sectional view taken along the Y+-Y+ line in FIG. 1(f), it can be seen from FIG. 4(b) that the common electrode 16 and the individual electrodes 11 Contact layer a-3i: HI3(p) and aSi:
1Fif12 of a-3i:H in which all HI3(n) are selectively formed and the surroundings of each contact layer are all high resistance.
(i) Crosstalk between elements can be significantly reduced by insulation isolation, and there is no need to provide an insulation layer for element isolation (in this example, a transparent material such as ITO is used). A transparent electrode may be provided on an insulating substrate, and in either case, the optical signal to be detected is incident from the transparent electrode.
Force showing ip/ITO configuration <, nin/ITO instead of nip/ITO, p i p/ITo, p i
Effects of the Invention As is clear from the above explanation, the present invention provides a ζ slope in which both the contact layer with the individual electrodes and the contact layer with the common electrode are selective. In addition, the contact layer can be insulated and separated by an i-type or near-i-type amorphous semiconductor with high resistance.
Compared to the conventional method of selectively forming only the contact layer with individual electrodes using ion doping, crosstalk between elements can be significantly reduced, and there is no need for a new insulating film formation process for element isolation. Even if the process is simplified

【図面の簡単な説明】[Brief explanation of drawings]

Claims (2)

【特許請求の範囲】[Claims] (1)基板上に形成した第1の電極上に非晶質半導体で
ある第1の不純物層、i型またはi型に近い非晶質半導
体、非晶質半導体である第2の不純物層、第2の電極を
順次形成した光電変換素子を複数個ライン状に配列した
構成において、隣接する前記光電変換素子のそれぞれの
前記第1の不純物層及び第2の不純物層が前記i型また
はi型に近い非晶質半導体により分離された構造を有す
ることを特徴とする薄膜イメージセンサ。
(1) A first impurity layer that is an amorphous semiconductor on a first electrode formed on a substrate, an i-type or near-i-type amorphous semiconductor, a second impurity layer that is an amorphous semiconductor, In a configuration in which a plurality of photoelectric conversion elements in which second electrodes are sequentially formed are arranged in a line, each of the first impurity layer and the second impurity layer of the adjacent photoelectric conversion elements is of the i-type or the i-type. A thin film image sensor characterized by having a structure separated by an amorphous semiconductor close to .
(2)基板上に下部の電極パターンを形成する工程と、
前記下部の電極パターン上に第1のi型またはi型に近
い非晶質半導体層を形成する工程と、イオンドーピング
方法により前記第1のi型またはi型に近い非晶質半導
体層表面上に形成したマスクを用いて選択的に不純物を
有する第1の非晶質半導体層を形成して前記第1のi型
またはi型に近い非晶質半導体層を分離し、前記第1の
i型またはi型に近い非晶質半導体層に前記下部の電極
パターンとの第1の接触層を形成する工程と、その後前
記基板上に第2のi型またはi型に近い非晶質半導体層
を形成する工程と、イオンドーピング方法により前記第
2のi型またはi型に近い非晶質半導体層表面上に選択
的に不純物を有する第2の非晶質半導体層を形成する工
程と、前記第2のi型またはi型に近い非晶質半導体層
の表面上に上部の電極パターンを形成し、前記第2の非
晶質半導体層を前記上部の電極パターンとの第2の接触
層とする工程とを備えた薄膜イメージセンサの製造方法
(2) forming a lower electrode pattern on the substrate;
forming a first i-type or nearly i-type amorphous semiconductor layer on the lower electrode pattern; and forming a first i-type or nearly i-type amorphous semiconductor layer on the surface of the first i-type or nearly i-type amorphous semiconductor layer by an ion doping method. A first amorphous semiconductor layer having an impurity is selectively formed using a mask formed to separate the first i-type or near-i-type amorphous semiconductor layer, and a step of forming a first contact layer with the lower electrode pattern on an amorphous semiconductor layer of type or near i-type, and then a second amorphous semiconductor layer of type or near i-type on the substrate; forming a second amorphous semiconductor layer having impurities selectively on the surface of the second i-type or near-i-type amorphous semiconductor layer by an ion doping method; An upper electrode pattern is formed on the surface of a second i-type or nearly i-type amorphous semiconductor layer, and the second amorphous semiconductor layer is used as a second contact layer with the upper electrode pattern. A method for manufacturing a thin film image sensor comprising a process of
JP1238533A 1989-09-14 1989-09-14 Thin film image sensor and its manufacture Pending JPH03101267A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1238533A JPH03101267A (en) 1989-09-14 1989-09-14 Thin film image sensor and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1238533A JPH03101267A (en) 1989-09-14 1989-09-14 Thin film image sensor and its manufacture

Publications (1)

Publication Number Publication Date
JPH03101267A true JPH03101267A (en) 1991-04-26

Family

ID=17031665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1238533A Pending JPH03101267A (en) 1989-09-14 1989-09-14 Thin film image sensor and its manufacture

Country Status (1)

Country Link
JP (1) JPH03101267A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008270715A (en) * 2007-04-23 2008-11-06 Dongbu Hitek Co Ltd Image sensor and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008270715A (en) * 2007-04-23 2008-11-06 Dongbu Hitek Co Ltd Image sensor and manufacturing method thereof

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