JPH03105034U - - Google Patents

Info

Publication number
JPH03105034U
JPH03105034U JP1394590U JP1394590U JPH03105034U JP H03105034 U JPH03105034 U JP H03105034U JP 1394590 U JP1394590 U JP 1394590U JP 1394590 U JP1394590 U JP 1394590U JP H03105034 U JPH03105034 U JP H03105034U
Authority
JP
Japan
Prior art keywords
source
photodiode array
gate
parallel
impedance state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1394590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1394590U priority Critical patent/JPH03105034U/ja
Publication of JPH03105034U publication Critical patent/JPH03105034U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の回路図である。 1〜4はダイオード、5はMOSFET、6,
7は出力端子、8は制御回路、9はフオトダイオ
ードアレイ、10は発光素子、11,12は入力
端子である。
FIG. 1 is a circuit diagram of an embodiment of the present invention. 1 to 4 are diodes, 5 is MOSFET, 6,
7 is an output terminal, 8 is a control circuit, 9 is a photodiode array, 10 is a light emitting element, and 11 and 12 are input terminals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 1組のダイオードブリツジと、前記ダイオード
ブリツジの直流側端子間にドレイン・ソース間を
接続された出力用MOSFETと、前記MOSF
ETのゲート・ソース間に並列的に接続されたフ
オトダイオードアレイと、前記フオトダイオード
アレイに光学的に結合された発光素子と、前記M
OSFETのゲート・ソース間に並列的に接続さ
れ、前記フオトダイオードアレイの光起電力の発
生時に高インピーダンス状態となり、前記光起電
力の消失時に低インピーダンス状態となる制御回
路とを備えることを特徴とする交流用半導体スイ
ツチ。
a pair of diode bridges, an output MOSFET whose drain and source are connected between the DC side terminals of the diode bridge, and the MOSFET.
a photodiode array connected in parallel between the gate and source of the ET; a light emitting element optically coupled to the photodiode array;
The control circuit is connected in parallel between the gate and source of the OSFET, and is in a high impedance state when the photovoltaic force of the photodiode array is generated, and is in a low impedance state when the photovoltaic force disappears. AC semiconductor switch.
JP1394590U 1990-02-15 1990-02-15 Pending JPH03105034U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1394590U JPH03105034U (en) 1990-02-15 1990-02-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1394590U JPH03105034U (en) 1990-02-15 1990-02-15

Publications (1)

Publication Number Publication Date
JPH03105034U true JPH03105034U (en) 1991-10-31

Family

ID=31517332

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1394590U Pending JPH03105034U (en) 1990-02-15 1990-02-15

Country Status (1)

Country Link
JP (1) JPH03105034U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006230440A (en) * 2005-02-22 2006-09-07 Yukioo:Kk Sticking device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006230440A (en) * 2005-02-22 2006-09-07 Yukioo:Kk Sticking device

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