JPH0310526A - Frequency display device in radio communication equipment - Google Patents

Abstract

PURPOSE:To simply recognize the operating state even at the time of operating split by displaying a storage means name selected by a sub display means and displaying whether each of the selected storage means is for the sender side or the receiver side. CONSTITUTION:When keys 21, 24 are depressed, the frequency with respect to the storage content of a memory area A is displayed onto 1st and 2nd display sections 101, 102 and an A display 1031 and an arrow display 1041 are lighted. When keys 21, 25 are depressed, it means the split operation, the frequency display is supplied to the 1st display section 101 corresponding to the storage content of the memory area A and supplied to the 2nd display section 102 corresponding to the storage content of the memory area B, the A display 1031 and the B display 1032 are lighted and arrow displays 1041, 1052 are lighted. Thus, the split screen state at the time of operating a split mode is simply recognized.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a frequency display device in a wireless communication device.

(Prior Art) In a wireless communication device, various settings such as a reception frequency, a transmission frequency, a memory channel frequency, and a repeater tone frequency are made, but the frequency display is used by switching one frequency display section.

(Problem to be Solved by the Invention) However, since the conventional frequency display device as described above uses one frequency display section by switching, there is a problem that display must be performed in a complicated procedure. There was a problem in that the frequency could not be confirmed unless it was set in a state where the display was made.

Furthermore, for example, during sprint operation, the receiving frequency, the fact that it is sprint operation, and the name of the storage device used are displayed during reception, and the transmitting frequency, the fact that it is sprint operation, and the name of the storage device used are displayed during transmission as well. During reception, only the display for reception is displayed, and during transmission, only the display for transmission is displayed, and there is a problem in that it is not possible to know the information for transmission during reception.

This invention provides a single display device with a plurality of display sections, selectively uses any one of the plurality of display sections according to the setting state, and provides an auxiliary display to make the plurality of displays easy to see. It is an object of the present invention to provide a frequency display device that makes it easy to judge the setting state.

(Means for Solving the Problems) As shown in FIG. 1, the frequency display device of the present invention includes three or more storage means lots for storing frequency information, and a frequency information updating means for updating the frequency information in the storage means 101. 1
02, and a first selection means 1 for selectively supplying updated frequency information from the frequency information update means 102 to the storage means 101.
03, and a second selection means 106 which selects two storage means in the storage means 101 and supplies stored frequency information to the transmitting side local oscillator 104 and the receiving side local oscillator 105, respectively.
A frequency display device in a wireless communication device, comprising:
Selection instruction means 10 for instructing selection of second selection means 106
7, first and second converting means 108 and 109 for respectively converting the frequency information in the selected storage means into data for frequency display, and receiving the data converted by the first and second converting means, respectively. The first frequency display means 110 displays the reception frequency, the second frequency display means 111 displays the transmission frequency, and the name of the storage means selected by the selection instruction means 107 is displayed. The device is characterized by comprising a sub-display means 112 which displays whether the frequency display is on the transmitting side or the receiving side and is provided between the first and second frequency display means 110 and 111.

(Operation) According to the present invention configured as described above, the selection instruction means 10
7, two storage means in the storage means 101 are selected, and the frequency information stored in the second storage means is supplied to the receiving local oscillator 105, and the frequency information corresponding to the supplied frequency information is supplied to the receiving local oscillator 105. A signal at the receiving frequency is received, and the frequency information stored in the other storage means is supplied to the transmitting side local oscillator 104, and transmission is performed at the transmitting frequency corresponding to the supplied frequency information. Receiving side local oscillator 10
The frequency information supplied to the first frequency display means 108 is converted into frequency display data by the first conversion means 108.
The reception frequency is displayed at 10. Further, the frequency information supplied to the transmitting side local oscillator 104 is transferred to the second converting means 109.
is converted into frequency display data, and the transmission frequency is displayed on the second frequency display means 111.

Furthermore, the name of the storage means selected by the selection instruction means 107 is displayed on the sub-display means 112, and the sub-display means 112 displays whether each of the selected storage means is on the sending side or on the receiving side. Therefore, during split operation, the operation status can be easily known from the display on the sub-display means 112. be able to.

(Example) This invention will be explained below with reference to Examples.

FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention.

The output from the encoder 14 for setting the frequency for transmission and reception as well as specifying the memory channel number for storing frequency data is supplied to the counter 13 for counting, and the counting output of the counter 13 is sent to the microcomputer 1.
Supply to 2. On the other hand, the microcomputer 12 has
Local oscillator (hereinafter referred to as VFO) for setting the transmission frequency
,) and the local oscillator (hereinafter referred to as VFOR) for setting the receiving frequency, the output from the switch group 20 for specifying the operation mode and the frequency setting data to the memory channel specified by the memory channel number. The output of the write instruction key 31, which instructs writing, and the output of the transmission instruction key 30, which instructs transmission or reception, are supplied.

The switch group 20 includes keys 21 and 24 for instructing that memory area A is the memory area that provides frequency setting data to VFOR1VFOX separately, and keys 24 for specifying that memory area B is the memory area that provides frequency setting data. Keys 22 and 25 are provided for specifying the frequency setting data, and keys 23 and 26 are provided for specifying that the memory area to which frequency setting data is given is a memory channel. Here, keys 21, 22, and 23 are for the receiving side (RX), and keys 24, 25, and 26 are for the transmitting side (T,).

The microcomputer 12, which has read the output from the counter 13, switch group 20, transmission instruction key 30, and write instruction key 31, stores the frequency setting data and sets the frequency setting data according to the read information, and oscillates the V F Ox. It controls the frequency and the oscillation frequency of V F Oa, and also drives the display device IO via the driver 11 .

The display device 10 includes a first display section 101 which is made up of a plurality of 7-segment display tubes and displays the reception frequency, and a second display section 10 which is made up of a plurality of 7-segment display tubes and which displays the transmission frequency.
z, display section 101 showing memory areas A, B and memory channels, indicating whether the contents of the memory area in which the reception frequency is set are the contents of memory area A, the contents of memory area B, or the contents of the memory channel. Arrow display section 10. , an arrow display section 1 indicating whether the contents of the memory area in which the transmission wave number is set are the contents of memory area A, the contents of memory area B, or the contents of the memory channel.
0. It is equipped with

The display section toi is A display 10 corresponding to memory area A.
39, B display 10az corresponds to memory area B, M display 103 corresponds to 1 memory channel, and arrow display sections 104 and 10 similarly have arrow displays 1041, 105 corresponding to memory area A. Arrow display 104z, 10st, corresponding to memory area B
Arrow display corresponding to memory channel contradiction 10.3. 1
It is equipped with os:+.

The operation of this embodiment configured as described above will be explained with reference to the flowchart of FIG.

When the program starts, it is checked which key among the keys of the switch group 20 is pressed and the status of the instruction by the transmission instruction key 30 and the instruction by the write instruction key 31 (steps S1 to SS). , a flag is set for the key in the switch group 20 that is pressed. For keys that are not pressed, the flag for that key is reset. Here, the key 21 is designated by the symbol RXA, the key 22 is designated by the symbol R1, the key 23 is designated by the symbol RXM, the key 24 is designated by the symbol TXA, and the key 25 is designated by the symbol TXl. However, for the key 26, the symbols T, 1 . is the corresponding one. Further, when a transmission instruction is given by the transmission instruction key 30, the TX flag is set, and when no instruction is given, the TX flag is reset. Here, the symbols Tx/Rx correspond to the transmission instruction key 30.

Further, when a write instruction is issued by the write instruction key 31, the MIN flag is set, and when no instruction is issued, the MIN flag is reset.

Following step S, the RXA flag, the RX11 flag,
RXM flag, TXA flag, TXl+flag, TID
The contents of the I flag are checked (steps S9 to S51).
4).

When it is determined that the RXA flag is set, the A display 10,1 and the arrow display 1041 are lit, and the contents stored in the memory area A are converted to data for frequency display, and the frequency is displayed on the first display section 10I. will be done. Next, the contents stored in memory area A are converted to frequency division ratio data,
The frequency division ratio of the VFOR programmable counter is set. (Step S9,). Therefore, a frequency corresponding to the contents stored in memory area A is received and the frequency is displayed. Then the RA flag is sent, R,
4 flag is reset, the RXA flag is reset, and step SIS described later is executed (step 59
2) - Similarly, if it is determined that the RXI flag is set, B display 103□ and arrow display 10. □ is lit, the contents stored in the memory area B are converted to data for frequency display, and the frequency is displayed on the first display portion IL. Next, the contents stored in memory area B are converted to frequency division ratio data, and the frequency division ratio of the VFOa programmer counter is set. (Step S1°l), therefore, a frequency corresponding to the contents stored in memory area B is received and the frequency is displayed. Next is the RA flag. The RM flag and RXI flag are reset (step 5102);
Step SI5 described later is executed.

Similarly, if it is determined that the R eff flag is sent, M
Display 1033 and arrow display 10. , is lit, and the stored contents of the memory channel designated by the channel number are converted to data for frequency display and displayed on the first display section 10. The frequency will be displayed. Next, the stored contents of the memory channel are converted to frequency division ratio data, and the VFO,
The division ratio of the program counter is set. (Step S+z). Therefore, a frequency corresponding to the contents stored in the memory channel is received and the frequency is displayed. Subsequently, the R7 flag is set and the RXM flag is read (step 5112).

Subsequently, step SIS is executed.

As is clear from the above, the frequency displayed on the first display part IL, that is, the reception frequency, is the frequency corresponding to the memory content of memory area A, the frequency corresponding to the memory content of memory area B, or the frequency of the memory channel. The display section 103 indicates whether the frequency corresponds to the stored content, and the arrow display section 104 indicates that it is the reception frequency.

When it is determined that the TXA flag is sent, the RA
It is checked whether the flag is sent or the RA flag is set. When the RH flag is set, or when the RM flag is not set and the RA flag is not set, A display 10
, 1 are turned on, and the contents of memory area A are converted into data for frequency display and displayed on the second display section
□ (Step S1 □1). When the R flag is not set and the RA flag is set, and the second display section 10. When the frequency is displayed (i.e., when step Sl!+ is executed)
, arrow displays 10 and 1 are lit, and the contents of memory area A are converted to division ratio data.Then, the contents of memory area A are converted to division ratio data of the VFOX programmable counter, and the division ratio of the VFOX programmable counter is set. (Step S1°).

Therefore, the frequency corresponding to the contents stored in memory area A is transmitted. Subsequently, the TXA flag is reset, the TA flag is set, and step 315 is executed (step S1□). Here, when R or the flag is set, or when the RM flag is not set and the RA flag is not set, it is a split operation, and the transmission frequency is displayed and the transmission frequency is not set. It is. In addition, when the R flag is not set and the RA flag is set, it is simplex operation, and the transmitting frequency is the same as the receiving frequency, and the receiving frequency is the step S in this case.
If the R8 flag is set in , the transmission frequency is not displayed because it has already been displayed.

However, the transmission frequency needs to be set to a frequency corresponding to the storage contents of memory area A, and the transmission frequency is set to a frequency corresponding to the storage contents of memory area A. As a result, the receiving frequency and the transmitting frequency match, and the receiving frequency is displayed.

If it is determined that the TXI flag is set, R,
It is checked whether the flag has been sent or whether the R flag is set. When the Rs flag is set, or when the R flag is not set and the RA flag is set, B display 10iz
is lit, and the contents stored in the memory area B are converted into data for frequency display and displayed on the second display section 10□ (steps S+, +). When the R flag is not set and the RA flag is not set, and when step S Ill is executed, arrow displays 10 and 2 are lit, and the contents stored in memory area B are changed to division ratio data. After the conversion, the frequency division ratio of the VFOX programmable counter is set (step 5132).

Therefore, the frequency corresponding to the contents stored in memory B is transmitted. Subsequently, the TXIl flag and the TA flag are reset (step 51:13), and step S
IS is executed. Step S +31 and S+zz
is executed, steps S+Z+ and S l! This is the case in split operation as well as when
The case where step 5131 is not executed and step 5I32 is executed is the case of simplex operation.

If it is determined that the TXM flag is set, R,
It is checked whether the flag is set. R
, When the flag is not set, the M display 1033 is lit, and the memory contents of the memory channel specified by the channel number are converted to data for frequency display and displayed on the second display section 10□. (Step S+a+).

When the RPl flag is set, or following step S14+, the arrow display 102. is lit, the memory contents of the memory channel specified by the channel number are converted to frequency division ratio data, and the frequency division ratio of the VFOX programmable counter is set (step 514).
2). Therefore, the frequency corresponding to the stored content of the memory channel designated by the channel number is transmitted. Subsequently, the TI flag is reset (step St
-:+), step SI5 is executed. Step 51
When step S41 and S14□ are executed, it is a case of split operation, and when step S11 is executed without step S+41, it is a case of simplex operation. These are steps S121 and SI2□,
Step S 1ffl and S13! The relationship is similar to that of

The count value of the counter 13 is cleared when reading is completed. In step S15, it is checked whether the count value of the counter 13 is zero or not, and if the count value is determined to be zero, M
1. It is checked whether the N flag is set (step 516), and if it is determined that the MIN flag is not set, step S1 is executed again following step S4. That is, in this case, if it is determined that the rotary encoder 14 is not turned and the MIN flag is set at the write instruction key step SI6, the state of the flag is T, and the state of the flag is R.

The state of the flag is checked (step S1?).

5ea). RX flag is not sent and R,
If the flag is not set, the RA flag is checked (step 519). When the TX flag is set, that is, a transmission instruction, or when it is determined that the R8 flag is set, step S1 is executed. When a reception instruction is given and the frequency setting and display corresponding to the memory contents of the memory channel are not set, the R
If it is determined that the A flag is set, the contents of memory area A are read out (step S2゜), and the R flag is set.
If it is determined that the A flag is not set, the contents of memory area B are read out (step Szo,
Sz+). The stored contents of memory areas A and B in steps S2° and S□ are those set as the receiving side.

Step S! e+S! Following I, it is checked whether the TA flag is set, and when it is determined that the TA flag is set, the contents of memory area A are read out, and it is determined that the TA flag has not been sent. Then, the stored contents of memory area B are read out (step S21 Sza).

When the stored contents are read out in step S2°, the stored contents are also read out in step 524. Also, step S
When the stored contents are read out in step S23, the stored contents are also read out in step S23.

Step SZ! + Memory area A follows SZ4.

The memory contents of B are written to the memory channel of the specified channel number (step 525), and then step S
1 is executed. Of course, step SZS is differentiated between the sending side and the receiving side.

When it is determined in step SI5 that the count value of the counter 13 is not zero, the R flag is checked (step 5zi), and when it is determined that the R flag is not set, it is determined whether the T flag is set. (step s2.).

If it is determined in step 5Zff that the T8 flag is not set, the RA flag is checked (step S2!1), and if the Ra flag is set, the stored contents of memory area A are read out (step Sz
w), the count value of the counter 13 is added or subtracted (
Step S: lO). When the signals are added, the encoder 14 is driven in the direction of increasing the frequency.
Subtraction occurs when the encoder 14 is driven in the direction of decreasing the frequency, and is hereinafter referred to as addition or subtraction.

The calculation result in step S3° is stored in memory area A (step S:11). Step St9 is executed in the case of reception, and in the case that the key 21 is pressed. The stored contents in step 531 are converted into data for frequency display, and the first display section 10. The stored content in step SK+ is converted into frequency division ratio data, and the frequency division ratio of the programmable counter of VFO+ is set (step 53z), and step 516 is executed following step SaZ. Therefore, by executing steps S1 to S3t, the counter 1
The reception frequency and reception frequency display are changed in accordance with the count value of 3.

When it is determined in step 5ell that the RA flag is not set, the storage contents of memory area B are read out, the count value of the counter 13 is added or subtracted, and the calculation result is stored in memory area B (step 53ff).
~S3. ), step Szz is executed. Therefore, in this case, the receiving frequency is set to correspond to the content stored in memory area B, the receiving frequency is displayed, and this value is changed in accordance with the count value of the counter 13.

Step S! ? If it is determined that the T8 flag is set, it is checked whether the TA flag is set (step S, 6), and if it is determined that the TA flag is set, steps 529 to S3 are performed.
Steps similar to 1 are executed (steps S37 to
539) - Following step S29, it is checked whether the RA flag is set (step S4°),
If it is determined that the RA flag is not set, the contents stored in the memory area A are converted to data for frequency display and displayed on the second display section lO□ (step S, 1
).

Following step S41, the stored contents of memory area A are converted to frequency division ratio data, the frequency division ratio of the VFOX programmable counter is set (step 5 = 2), and step S is executed following step S4□. Ru. If it is determined in step S4° that the R^ flag is set, steps S4□ are executed from step S4°. The relationship between the case where step 342 is executed via step S41 and the case where step S4□ is executed without passing through step S41 is that the former case is for subrift, and the latter is for simplex. Step 33
By executing steps 6 to S4□, the transmission frequency and the transmission frequency display or the transmission frequency are changed in accordance with the count value of the counter 13.

Step S. If it is determined that the TA flag is not set in , steps similar to steps S33 to s3s are executed (steps 343 to S4), and following step 34%, step S46, which is similar to step S4.
is executed, and step S41 and step S4□ or step S4□ are executed. Therefore, in this case as well, the transmission frequency and the transmission frequency display or the transmission frequency are changed in accordance with the count value of the counter 13.

If it is determined in step 32& that the R flag is set, it is checked whether the Tx flag is set (step S4).

If it is determined in step S47 that the TX flag is sent, step S4? Subsequently, step S is executed. If it is determined in step 30 that the TX flag is not sent, the channel number is read (step S4.l+) - step S4. Subsequently, the count value of the counter 13 is added to or subtracted from the channel number read out in step S41 (step S4).
, the calculation result is written into the channel number storage area (step S,.) Following step 5S11, step S. The stored contents are read out from the memory channel designated by the new channel number of the calculation result written in, converted into data for frequency display, and displayed on the first display section 10. The frequency is displayed (step Ss+)
. Following step SSI, the above memory contents are converted to frequency division ratio data, and the frequency division ratios of the programmable counters of VFOX and VFO++ are set (step 5sz),
'frjt, and step S0 is executed.

Therefore, the display in the above embodiment is as follows.

When the key 21 and the key 24 are pressed, simplex operation is performed, and the first and second display sections 10. and 10□, the frequency corresponding to the content stored in the memory area is displayed, and A display 10. .

and arrow display 104. is lit.

Similarly, when the keys 22 and 25 are pressed, the simplex operation is performed, and the first and second display sections 101 and 10g display the frequency corresponding to the stored content of memory area B, and the B display 1Osz and the arrow display. LOa
z is lit.

Similarly, when the keys 23 and 26 are pressed, simplex operation is also performed, and the first and second display sections 10. and 102 are frequency displays corresponding to the memory contents of the memory channel, M display 103: I and arrow display 1
0.3 is lit.

When the key 21 and the key 25 are pressed, split operation is in effect, and the first display section 10. A frequency display corresponding to the contents stored in the memory area A is displayed on the second display section 10. A frequency display corresponding to the stored content of memory area B is displayed, A display 1Offl and B display 103K are lit, and arrow displays 1041 and 1052 are lit.

When the key 21 and the key 26 are pressed, split operation is in effect, and the first display section 10. A frequency display corresponding to the stored contents of the memory area A is displayed on the second display section 102, a frequency display corresponding to the stored contents of the memory channel is displayed on the second display section 102, A display 103°, M display 1033, arrow displays 104I and 10. .

is lit.

Furthermore, when the keys 23 and 25 are pressed, it is a split operation, and the first display section 10° shows the frequency display corresponding to the memory contents of the memory channel, and the second display section lO2 shows the frequency display of the memory area B. Frequency displays corresponding to the stored contents are displayed, including B display 10 2 and M display 1033.
Arrow display 104. and 10S2 are lit.

It can be easily inferred that other settings may be in place.

As mentioned above, the display section 10. and arrow display section 104°10
, so you can easily know the sprint status during split operation.

(Effects of the Invention) As explained above, according to the present invention, the sub-display means displays the name of the selected storage means, and also displays whether each of the selected storage means is the sending side or the receiving side. By providing the sub-display means, it is possible to easily know the operating status even during split operation.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the present invention. FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 3 is a flowchart for explaining the operation of one embodiment of the present invention. 101... Storage means, 102... Frequency information updating means, 103... First selection means, 104... Transmitting side local oscillator, 105... Receiving side local oscillator, 106...
- Second selection means, 107... Selection instruction means, 108 and 109... First and second conversion means, 110 and 111... First and second frequency display means, 112
...Sub display means.

Claims (1)

[Claims] three or more storage means for storing frequency information; a frequency information updating means for updating frequency information in the storage means; and a first selection means for selectively supplying updated frequency information from the frequency information updating means to the storage means. , a frequency display device for a wireless communication device, comprising a second selection means for selecting two storage means in the storage means and supplying stored frequency information to a transmitting side local oscillator and a receiving side local oscillator, respectively, , second
selection instructing means for instructing the selection of the selection means; first and second converting means for respectively converting the frequency information in the selected storage means into data for displaying the frequency; a first frequency display means for displaying the received frequency and a second frequency display means for displaying the transmission frequency; A frequency display device comprising: a sub-display means for displaying whether each of the frequency display means is a transmitting side or a receiving side, and provided between the first and second frequency display means.