JPH03107706U - - Google Patents

Info

Publication number
JPH03107706U
JPH03107706U JP1533190U JP1533190U JPH03107706U JP H03107706 U JPH03107706 U JP H03107706U JP 1533190 U JP1533190 U JP 1533190U JP 1533190 U JP1533190 U JP 1533190U JP H03107706 U JPH03107706 U JP H03107706U
Authority
JP
Japan
Prior art keywords
ladder
keyboard
input
accepted
controls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1533190U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1533190U priority Critical patent/JPH03107706U/ja
Publication of JPH03107706U publication Critical patent/JPH03107706U/ja
Pending legal-status Critical Current

Links

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  • Programmable Controllers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第16図はこの考案の一実施例による
PCのプログラミング装置を示し、第1図はラダ
ープログラム作成時のシステムプログラムの処理
内容を示したフローチヤート、第2図はキーボー
ドの配置を示す図、第3図〜第15図は第1図の
各処理後の表示器の表示内容を示した図、第16
図はキヤラクタメモリの内容を示す図、第17図
〜第24図は従来のPCのプログラミング装置を
示し、第17図はラダープログラム作成時のシス
テムプログラムの処理内容を示したフローチヤー
ト、第18図はハードウエア構成を示すブロツク
図、第19図はキーボードの配置図を示す図、第
20図〜第24図は第17図の各処理後の表示器
の表示内容を示した図である。 図において8,9,10,11,12……ラダ
ーシンボルデータ、14,15,16,17,1
8……デバイスデータ、29……ラダーシンボル
キー、30……デバイスキー、31……ラダーシ
ンボル/デバイスデータ切り替えキーである。な
お、図中、同一符号は同一、又は相当部分を示す
Figures 1 to 16 show a PC programming device according to an embodiment of this invention, Figure 1 is a flowchart showing the processing contents of the system program when creating a ladder program, and Figure 2 shows the layout of the keyboard. Figures 3 to 15 are diagrams showing the display contents of the display after each process in Figure 1.
Figure 17 shows the contents of the character memory, Figures 17 to 24 show a conventional PC programming device, Figure 17 is a flowchart showing the processing contents of the system program when creating a ladder program, and Figure 18 shows the content of the system program when creating a ladder program. 19 is a block diagram showing the hardware configuration, FIG. 19 is a diagram showing the layout of the keyboard, and FIGS. 20 to 24 are diagrams showing the contents displayed on the display after each process in FIG. 17. In the figure, 8, 9, 10, 11, 12...Ladder symbol data, 14, 15, 16, 17, 1
8...Device data, 29...Ladder symbol key, 30...Device key, 31...Ladder symbol/device data switching key. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロコンピユータと、表示器を制御する表
示制御部と、ラダープログラム入力用のキーを備
えるキーボードを制御するキーボード制御部と、
前記キーボードより入力されたデータを一時的に
記憶しておくキヤラクタメモリとユーザープログ
ラムエリアと、前記マイクロコンピユータと前記
表示制御部と前記キーボード制御部とをコントロ
ールし、キーボードより入力される内容により処
理が異なるシステムプログラムより成るプログラ
マブルコントローラ(以下PCと略す)のプログ
ラミング装置において、PCのラダープログラム
作成時に、ラダー図の結線のみをするためにラダ
ーシンボルのみの入力を受け付ける状態と、先に
入力したラダーシンボルに従つてデバイスデータ
のみ受け付ける状態の2つに分割するようにソフ
トウエアに、ラダーシンボルとデバイスデータ分
割入力モードを設けたことを特徴とするPCのプ
ログラミング装置。
a microcomputer, a display control unit that controls a display, a keyboard control unit that controls a keyboard that includes keys for inputting a ladder program;
Controls a character memory and a user program area for temporarily storing data input from the keyboard, the microcomputer, the display control section, and the keyboard control section, and processes according to the contents input from the keyboard. In a programming device for a programmable controller (hereinafter referred to as PC), which consists of different system programs, when creating a ladder program for the PC, there is a state in which only input of ladder symbols is accepted in order to connect only the connections in the ladder diagram, and a state in which only the input of ladder symbols is accepted in order to connect only the connections in the ladder diagram. A PC programming device characterized in that the software is provided with a ladder symbol and device data division input mode so as to divide the software into two states according to symbols, one in which only device data is accepted.
JP1533190U 1990-02-19 1990-02-19 Pending JPH03107706U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1533190U JPH03107706U (en) 1990-02-19 1990-02-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1533190U JPH03107706U (en) 1990-02-19 1990-02-19

Publications (1)

Publication Number Publication Date
JPH03107706U true JPH03107706U (en) 1991-11-06

Family

ID=31518642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1533190U Pending JPH03107706U (en) 1990-02-19 1990-02-19

Country Status (1)

Country Link
JP (1) JPH03107706U (en)

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