JPH0311752A - Semiconductor integrated circuit in high-frequency band - Google Patents
Semiconductor integrated circuit in high-frequency bandInfo
- Publication number
- JPH0311752A JPH0311752A JP1145430A JP14543089A JPH0311752A JP H0311752 A JPH0311752 A JP H0311752A JP 1145430 A JP1145430 A JP 1145430A JP 14543089 A JP14543089 A JP 14543089A JP H0311752 A JPH0311752 A JP H0311752A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- dielectric layer
- dielectric constant
- semiconductor substrate
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 239000002184 metal Substances 0.000 claims abstract description 23
- 229910052751 metal Inorganic materials 0.000 claims abstract description 23
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 9
- 230000000694 effects Effects 0.000 abstract description 4
- 230000001681 protective effect Effects 0.000 abstract description 3
- 239000007767 bonding agent Substances 0.000 abstract 1
- 239000003989 dielectric material Substances 0.000 description 11
- 239000000853 adhesive Substances 0.000 description 8
- 230000001070 adhesive effect Effects 0.000 description 8
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910016063 BaPb Inorganic materials 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N titanium dioxide Inorganic materials O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Junction Field-Effect Transistors (AREA)
- Waveguides (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、マイクロ波帯、ミリ波帯等の高周波帯におい
て使用する半導体集積回路に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor integrated circuit used in high frequency bands such as microwave bands and millimeter wave bands.
（従来の技術）
近年、情報通信網の広がりによりＣＡＴＶ、衛星放送ま
たは衛星通信などニューメディアに関心が高くなってお
り、それに使用される通信機器回路は小形化のためのＩ
Ｃ化が進んでいる。(Prior Art) In recent years, with the expansion of information and communication networks, interest in new media such as CATV, satellite broadcasting, and satellite communications has increased, and the communication equipment circuits used in them are
The shift to C is progressing.
従来のマイクロ波帯やミリ波帯の高周波帯において用い
る分布定数回路は、マイクロストリップラインやコプレ
ーナウニイブガイド、あるいはスロットライン等の線路
により構成され、その分布定数回路と能動素子等を半導
体基板上に集積化した高周波集積回路はモノリシックマ
イクロ波ＩＣ（以下、ＭＭＩＣという）と呼ばれ、半導
体基板は主としてＧａＡｓを使用しており、ＵＨＦ帯で
はＳＬが、あるいは特殊な用途ではＩｎＰが用いられる
。Conventional distributed constant circuits used in high frequency bands such as microwave bands and millimeter wave bands are composed of lines such as microstrip lines, coplanar wave guides, or slot lines, and the distributed constant circuits and active elements are mounted on a semiconductor substrate. A high-frequency integrated circuit integrated into a semiconductor device is called a monolithic microwave IC (hereinafter referred to as MMIC), and the semiconductor substrate mainly uses GaAs, and SL is used in the UHF band, or InP is used for special purposes.
第５図は従来のＭＭＩＣの断面を示す図であり、１は半
導体基板、２は配線金属、３は電界効果トランジスタＣ
ＦＥＴ）等の能動素子、４はワイヤポンディングパッド
、そして５は裏面金属の層である。FIG. 5 is a diagram showing a cross section of a conventional MMIC, in which 1 is a semiconductor substrate, 2 is a wiring metal, and 3 is a field effect transistor C.
4 is a wire bonding pad, and 5 is a backside metal layer.
マイクロ波帯で用いるＭＭＩＣでは、半導体基板１は一
般にＧａＡｓが使用されるから、能動素子３はショット
キーダイオードを用いたＭＥＳＦＥＴや、 ＨＥ Ｍ
Ｔ （Ｈｉｇｈ Ｅｌｅｃｔｒｏｎ Ｍｏｂｉｌｉｔｙ
Ｔｒａｎｓｉｓ−ｔｏｒ）、 ＨＢ Ｔ （ｔ（ｅｔ
ｅｒｏ Ｂｉｐｏｌｏｒ Ｔｒａｎｓｉｓｔｏｒ）、あ
るいはその他のダイオードが使用される。また配線金属
２には通常、Ｔｉ／ＡｕやＴｉ ／ Ｐｔ ／ Ａｕが
用いられマイクロ波帯の分布定数回路を形成している。In MMICs used in the microwave band, the semiconductor substrate 1 is generally made of GaAs, so the active element 3 is a MESFET using a Schottky diode or a HEM.
T (High Electron Mobility
Transis-tor), HB T (t(et
ero Bipolar Transistor) or other diodes are used. Further, Ti/Au or Ti/Pt/Au is usually used for the wiring metal 2 to form a distributed constant circuit in the microwave band.
そのような配線金属２の上面、または下面には絶縁膜あ
るいは保護膜として、誘電体のＳｉ、 Ｎ４や５ｉｎ２
が設けられる。その比誘電率はＳｉｎ、では４、Ｓｉ、
Ｎ４では７であり半導体基板１のＧａＡｓの誘電率１
２．６よりも小さい。しかも、上記の誘電体の厚さは１
μｍ以下で極めて薄く、したがってマイクロ波帯の分布
定数回路の電気長が決まる実効誘電率は、はぼ半導体基
板１を構成する比誘電体ＧａＡｓの厚さによって決定さ
れる。A dielectric material such as Si, N4 or 5in2 is used as an insulating film or a protective film on the upper or lower surface of such wiring metal 2.
will be provided. Its relative permittivity is 4 for Sin, Si,
For N4, it is 7, and the dielectric constant of GaAs of the semiconductor substrate 1 is 1.
Less than 2.6. Moreover, the thickness of the above dielectric is 1
The effective dielectric constant, which is extremely thin (μm or less) and therefore determines the electrical length of a distributed constant circuit in the microwave band, is determined by the thickness of the dielectric material GaAs constituting the semiconductor substrate 1.
しかしながら、１２ＧＨｚ帯の衛星放送用の低雑音増幅
器としてＭＭＩＣを構成すると、そのチップサイズは２
ｍないし３ｍ角以上、面積で４ｏｎ”ないし９ｍｍ”に
もなって、チップコストが極めて高くつき、そのため従
来、高周波帯のＭＭＩＣは実用化されてなかった。However, when an MMIC is configured as a low-noise amplifier for satellite broadcasting in the 12 GHz band, the chip size is 2.
The chip cost is extremely high since the chip size is more than 3 m or 3 m square, and the area is 4 on" to 9 mm, so high-frequency band MMICs have not been put to practical use in the past.
（発明が解決しようとする課題）
以上のように従来のＭＭ Ｉ Ｃは、チップサイズが大
きくなる実用化を阻害する欠点を有していた。(Problems to be Solved by the Invention) As described above, the conventional MMIC has a drawback that the chip size becomes large, which hinders its practical use.
本発明は上述の従来の欠点を排除した小面積のチップサ
イズで形成可能なＭＭＩＣの提供を目的とする。An object of the present invention is to provide an MMIC which eliminates the above-mentioned conventional drawbacks and can be formed with a small chip size.
（課題を解決するための手段）
本発明は上記の目的を、半導体基板上の回路を構成する
配線金属上に、比誘電率が上記半導体基板より大きい誘
電体層を形成したＭＭＩＣとして達成する。(Means for Solving the Problems) The present invention achieves the above object as an MMIC in which a dielectric layer having a relative permittivity larger than that of the semiconductor substrate is formed on a wiring metal constituting a circuit on a semiconductor substrate.
（作 用）
上記のように構成する本発明のＭＭＩＣは、配線金属に
よって形成される分布定数回路上の実効電気長が短縮さ
れるので、チップサイズは従来の１／ＩＯ程度以下で足
り、したがって高周波帯のＭＭＩＣの実用化が可能にな
る。(Function) In the MMIC of the present invention configured as described above, the effective electrical length on the distributed constant circuit formed by the wiring metal is shortened, so the chip size can be reduced to about 1/IO or less of the conventional one. It becomes possible to put MMICs in high frequency bands into practical use.
（実施例） 以下、本発明を図面を用いて実施例により説明する。(Example) Hereinafter, the present invention will be explained by examples using the drawings.
第１図は本発明の第１の実施例の高周波帯のＭＭＩＣの
断面を示す図で、第５図と同じ、または同一機能のもの
は同一符号によって示している。FIG. 1 is a diagram showing a cross section of a high frequency band MMIC according to a first embodiment of the present invention, and parts that are the same as those in FIG. 5 or have the same functions are designated by the same reference numerals.
本発明のＭＭＩＣは半導体基板１上に配線金属２を形成
し、通常、半導体基板１と配線金属２との間には絶縁膜
を設け、配線金属２の上に保護膜を形成する。In the MMIC of the present invention, a metal wiring 2 is formed on a semiconductor substrate 1, an insulating film is usually provided between the semiconductor substrate 1 and the metal wiring 2, and a protective film is formed on the metal wiring 2.
このように形成したＭ−Ｍ Ｉ Ｃ上に、半導体基板１
の比誘電率よりも大きい比誘電率の誘電体６が接着剤７
によって張合わされている。接着剤７はエポキシ系樹脂
が好ましく、これは約１５０℃で硬化する。なお、他の
有機質または無機質の絶縁体を接着剤７に用いることも
可能である。半導体基板１がＳｉで形成されておれば能
動素子３にはＭＯＳＦＥＴや、バイポーラトランジスタ
が用いられ、通常、マイクロ波に用いるＧａＡｓであれ
ばＭＥＳＦＥＴや、ＨＥＭＴ、ＨＢＴあるいはダイオー
ドを能動素子として用いる。ＨＥＭＴやＨＢＴでは半導
体基板１はＡＯＧａＡｓ／ＧａＡｓのへテロ接合基板が
使用されるが、半導体基板１をＩｎＰにより形成するこ
とにより、さらに電子の移動度を高め高速動作させるこ
とが可能である。A semiconductor substrate 1 is placed on the M-MIC formed in this manner.
The dielectric material 6 having a relative permittivity larger than the relative permittivity of the adhesive 7
It is tied together by The adhesive 7 is preferably an epoxy resin, which cures at about 150°C. Note that it is also possible to use other organic or inorganic insulators for the adhesive 7. If the semiconductor substrate 1 is made of Si, a MOSFET or a bipolar transistor is used as the active element 3, and if the semiconductor substrate 1 is made of GaAs used for microwaves, a MESFET, HEMT, HBT, or diode is used as the active element. In HEMTs and HBTs, an AOGaAs/GaAs heterojunction substrate is used as the semiconductor substrate 1, but by forming the semiconductor substrate 1 from InP, electron mobility can be further increased and high-speed operation can be achieved.
ここで誘電体６としては比誘電率が半導体基板１のそれ
より大きい誘電体を使用する。たとえば比誘電率が７０
ないし１００の、 ＢａＯ−ＰｂＯ−Ｎｄ、Ｏ，−Ｔｉ
Ｏｚ＋Ｔｉｅ、 、 Ｂａ０−Ｎｄ、０．−ＴｉＯ，、
ＢａＯ−５ｍｚ０３−ＴｉＯ，ｒ（８ａＳｒ）０−５Ｉ
ＩＩ２０．−ＴｉＯ２，あるし）はＮｄ、丁１２ ｏＴ
−（ＢａＰｂ）ＴｉＯ，−ＴｉＯ□等が使用できる。こ
のとき比誘電率εｅ’ｔｒによって、配線金属２上の電
気波長は、１／ｆ７−７倍になるからＧａＡｓの半導体
基板１の１／３程度になり、チップ面積は１／１０に縮
小することになる。なお、誘電体は張合わせによらずＭ
ＭＩＣ上にスパッタ等によって堆積させてもよい。 こ
こで、上記構成で比誘電率ε。ｆｔにより十分大きい効
果を挙げるためには、半導体基板１は１０ｐ＋ｍないし
３０μｍの可能な限りの薄さであることが必要であり、
接着剤７は１μｍないし３μｍ以下の厚さに、そして誘
電体６の厚さは２００μｍ以上が望ましくｌｎｍであっ
てもよい。半導体基板１と誘電体６の厚さの比は大きけ
れば大きい程、比誘電率εａｒｔは大きくなり、それに
つれて本発明の効果も大きくなる。なお、接着剤７の厚
さは薄くなければならないが、そのためには配線金属２
の幅を接着剤７の厚さより大きくすることは効果がある
。Here, as the dielectric material 6, a dielectric material whose dielectric constant is larger than that of the semiconductor substrate 1 is used. For example, the dielectric constant is 70
from 100 to 100, BaO-PbO-Nd, O, -Ti
Oz+Tie, , Ba0-Nd, 0. -TiO,,
BaO-5mz03-TiO,r(8aSr)0-5I
II20. -TiO2, present) is Nd, 12oT
-(BaPb)TiO, -TiO□, etc. can be used. At this time, due to the relative dielectric constant εe'tr, the electrical wavelength on the wiring metal 2 becomes 1/f7-7 times, so it becomes about 1/3 of the GaAs semiconductor substrate 1, and the chip area is reduced to 1/10. It turns out. Note that the dielectric material is M regardless of the lamination.
It may be deposited on the MIC by sputtering or the like. Here, in the above configuration, the relative dielectric constant ε. In order to achieve a sufficiently large effect by ft, the semiconductor substrate 1 needs to be as thin as possible, from 10p+m to 30μm,
The thickness of the adhesive 7 is preferably 1 μm to 3 μm or less, and the thickness of the dielectric 6 is preferably 200 μm or more, and may be 1 nm. The greater the ratio of the thicknesses of the semiconductor substrate 1 and the dielectric 6, the greater the relative permittivity εart, and the greater the effect of the present invention. Note that the thickness of the adhesive 7 must be thin, but in order to do so, the wiring metal 2 must be thin.
It is effective to make the width of the adhesive larger than the thickness of the adhesive 7.
第２図は第２の実施例を示す断面図である。FIG. 2 is a sectional view showing the second embodiment.
これは第１図の実施例と上下が逆の構造のもので、８は
コンタクト窓、９はワイヤポンディングパッドである。This has a structure that is upside down from the embodiment shown in FIG. 1, with reference numeral 8 representing a contact window and reference numeral 9 a wire bonding pad.
この第２図の構成は表面にＭＭＩＣ組立てのためのワイ
ヤポンディングパッド９の形成が可能な利点があり、も
ちろん、チップサイズは従来の１／１０程度以下になる
。The configuration shown in FIG. 2 has the advantage that wire bonding pads 9 for MMIC assembly can be formed on the surface, and of course the chip size is reduced to about 1/10 or less of the conventional chip size.
第３図は第３の実施例を示す断面図で、これの第２図と
異なる点は誘電体６の下部に裏面金属５を設けた点にあ
る。それにより配線金属２の分布定数回路として、マイ
クロストリップラインが構成でき、コプレーナウェーブ
ガイドやスロットラインだけでなく、種々のマイクロ波
回路が実現できる。もちろん、チップサイズは従来の１
／１０程度である。FIG. 3 is a sectional view showing a third embodiment, which differs from FIG. 2 in that a back metal 5 is provided below the dielectric 6. As a result, a microstrip line can be configured as a distributed constant circuit of the wiring metal 2, and various microwave circuits as well as coplanar waveguides and slot lines can be realized. Of course, the chip size is 1
/10.
第４図は第４の実施例を示す断面図で、この実施例では
前述した第１ないし第３の実施例と異なり、配線金属２
の上下部分のみに誘電体６を形成している。この第４図
の構成によって能動素子３の浮遊容量を減じてＭＭＩＣ
を高性能化している。FIG. 4 is a cross-sectional view showing a fourth embodiment. In this embodiment, unlike the first to third embodiments described above, the wiring metal 2 is
A dielectric material 6 is formed only in the upper and lower portions of. With the configuration shown in FIG. 4, the stray capacitance of the active element 3 can be reduced and the MMIC
has improved performance.
本発明のＭＭＩＣは、このように能動素子３の部分に誘
電体６を形成しなければ高性能化することができ、もち
ろん、チップサイズは他の実施例同様に縮小することが
できる。The MMIC of the present invention can have higher performance if the dielectric 6 is not formed in the active element 3 portion, and of course the chip size can be reduced as in other embodiments.
以上、本発明を比誘電率が７０ないし１００の誘電体６
を用いた実施例により詳細に説明したが、誘電体６は従
来の半導体基板のＧａＡｓの比誘電率の１２．６よりも
大きい、たとえば２０ないし６０程度であっても、従来
の場合の電気長より比誘電率のルート長に反比例して短
縮され、チップサイズが小さくなることはいうまでもな
い。As described above, the present invention is applied to a dielectric material 6 having a relative dielectric constant of 70 to 100.
Although the dielectric material 6 has a dielectric constant larger than 12.6 of GaAs of the conventional semiconductor substrate, for example, about 20 to 60, the electrical length in the conventional case is Needless to say, the length is shortened in inverse proportion to the root length of the dielectric constant, and the chip size becomes smaller.
（発明の効果）
以上説明して明らかなように本発明は、半導体基板上の
配線金属上に、その半導体基板の比誘電率より大きな比
誘電率の誘電体を設けることによって、チップ面積を大
幅に縮小することができ。(Effects of the Invention) As is clear from the above explanation, the present invention greatly reduces the chip area by providing a dielectric material having a dielectric constant larger than that of the semiconductor substrate on the wiring metal on the semiconductor substrate. can be reduced to
比誘電率が７０ないし１００程度の誘電体を形成すれば
従来の１／ｌＯ以下のチップサイズの高周波帯のＭ Ｍ
Ｉ Ｃの形成が可能であるから、実施して大きく益す
る効果がある。If a dielectric material with a dielectric constant of about 70 to 100 is formed, a high frequency band M M with a chip size less than 1/1O of the conventional
Since it is possible to form an IC, there are great benefits to implementing it.
第１図ないし第４図は、それぞれ本発明のＭＭＩＣの実
施例の要部断面図、第５図は従来のＭＭＩＣの要部断面
図である。
１・・・半導体基板、 ２・・・配線金属、 ３・・・
能動素子、 ４，９・・・ワイヤポンディングパッド、
５・・・裏面金属、６・・・誘電体、７・・・接着剤
、 ８・・・コンタクト窓。1 to 4 are sectional views of essential parts of an embodiment of the MMIC of the present invention, and FIG. 5 is a sectional view of essential parts of a conventional MMIC. 1... Semiconductor substrate, 2... Wiring metal, 3...
active element, 4, 9... wire bonding pad,
5... Back metal, 6... Dielectric, 7... Adhesive, 8... Contact window.
Claims (1)
率が上記半導体基板より大きい誘電体層を形成させたこ
とを特徴とする高周波帯の半導体集積回路。1. A high frequency band semiconductor integrated circuit, characterized in that a dielectric layer having a dielectric constant larger than that of the semiconductor substrate is formed on a wiring metal constituting a circuit on a semiconductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1145430A JPH0311752A (en) | 1989-06-09 | 1989-06-09 | Semiconductor integrated circuit in high-frequency band |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1145430A JPH0311752A (en) | 1989-06-09 | 1989-06-09 | Semiconductor integrated circuit in high-frequency band |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0311752A true JPH0311752A (en) | 1991-01-21 |
Family
ID=15385064
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1145430A Pending JPH0311752A (en) | 1989-06-09 | 1989-06-09 | Semiconductor integrated circuit in high-frequency band |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0311752A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6759075B2 (en) | 2001-04-27 | 2004-07-06 | Ajinomoto Co., Inc. | Brown broth |
-
1989
- 1989-06-09 JP JP1145430A patent/JPH0311752A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6759075B2 (en) | 2001-04-27 | 2004-07-06 | Ajinomoto Co., Inc. | Brown broth |
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