JPH0312065A - Disk rotation controller - Google Patents

Abstract

PURPOSE:To secure a wide servo band and to perform servo with high accuracy as correcting bit slip smoothly by controlling the rotational phase of a spindle motor which rotatably drives a disk. CONSTITUTION:A phase comparator 8 performs the phase comparison of a reference synchronizing signal SYNCREF from frequency dividers 4 and 9 with a reproducing synchronizing signal SYNCATIP from a synchronism detection circuit 7, and supplies comparison output to a variable frequency divider 11 via control logic 12. The frequency division ratio of the frequency divider 11 is switched based on the output of the comparator 8. A phase comparator 13 performs the phase comparison of output in which a bit clock CKATIP is frequency-divided with a 1/3-frequency divider 6 with a phase reference clock CKPREF3 from the frequency divider 11, and forms a phase servo signal, and supplies it to the spindle motor 16, then, performs phase servo so that the signal SYNCATIP can be kept constant. In such a way, the wide servo band can be secured, and the servo with high accuracy can be performed.

Description

Detailed Description of the Invention A. Industrial Field of Application B. Summary of the Invention The present invention is directed to a disk rotation control device applied to, for example, a disk recorder using a magneto-optical disk as a recording medium. The frequency of the reference signal is divided by a variable frequency division means whose frequency division ratio is controlled based on the phase comparison output with the reproduction synchronization signal to be reproduced from the frequency division output of the variable frequency division means and the reproduction from the disk. By controlling the rotational phase of the spindle motor that rotates the disk using the phase comparison output with the reproduction clock, a wide servo band is secured, and focus and
This allows the servo to be applied with high precision while smoothly compensating for slip.

C. Conventional technology Conventionally, in magneto-optical disk recorders that record data on a magneto-optical disk in accordance with the data format of a compact disk for digital audio, for example, the optical The so-called ATIP (bsolute
TimeIn Pregrove) formant is adopted.

In the ATIP format, the data is divided into 75 Hz frames like a compact disc, and the absolute time from the beginning of the spiral recording trunk corresponding to the recorded data of each frame is expressed as absolute address data made up of 42 bits.

This absolute address data consists of a 4-bit synchronization code and an 8-bit BCD (binary code).
decimal) minute data, second data, frame data and a predetermined CRC (cyclic redundant).
It is composed of 14-bit CRC data calculated using a generating polynomial (ancycheck).

The above absolute address data is a 42-byte x 75 frame'' NRZ with a bit rate of 3150 bps or 3.15 kbps.
(non return to zero) code, and by biphase mark modulating this absolute address data with a bit clock of 6.3 kllz and further frequency modulating this modulated biphase mark signal, the subcarrier frequency is set to 22. .05kHz
It is given as a wobble signal consisting of an FM signal.

Then, on a magneto-optical disk that adopts the ATIP format, absolute address data is pre-recorded by forming a pre-group in which the track center is displaced in a sinusoidal manner in response to the wobble signal when creating the master disk. be done.

In a magneto-optical disk recorder that uses such a magneto-optical disk as a recording medium that adopts the ATIP format, based on the ATIP signal reproduced as a wobble signal from the magneto-optical disk, for example, as shown in FIGS. 3 and 4, In the spindle servo circuit of the configuration, speed servo and phase servo are applied to the spindle motor to rotate the magneto-optical disk at a constant linear velocity.

In the spindle servo circuit of conventional example I shown in FIG.
In the ATIP demodulation processing section (31) to which the P signal is supplied,
From the above ATIP signal, ^TIF is regenerated to the pit clock C with a frequency of 6.3 kllz and the speed servo circuit (3
2), demodulates the bi-phase mark signal for the FM demodulated output based on the bit clocks CKA and P, and outputs the synchronization signal 5YNCATIF with a frequency of 75Hz to the phase servo via the synchronization detection circuit (33). It is supplied to the circuit (34).

The speed servo circuit (32) has a frequency of 5.3 kHz, which is formed by dividing a reference clock signal given by a crystal oscillator (not shown) by a frequency divider (35).
Z speed reference clock CKFII! F and the above ATIPu
l! Pit black ivy C obtained in II processing section (31)
KATIP is compared to form a speed servo signal, and this speed servo signal is supplied to the spindle motor (39) to perform speed servo so that the wavelength of the wobble signal detected from the magneto-optical disk becomes constant. .

The phase servo circuit (34) has a frequency of 7°3 which is formed by dividing the base and the long in the frequency divider (35).
The frequency obtained by dividing the reference clock of 5kllz by l/98 using the 1/9 day frequency divider (36) is 75
112 phase reference clock 5YNC□ and the reproduced synchronization signal 5YNCay obtained from the synchronization detection circuit (33).
A phase servo signal is formed by comparing the phase with IF, and this phase servo signal is supplied to the spindle motor (39) to perform phase servo so that the reproduction synchronization signal 5YNCIIIIP has a constant phase.

In addition, the spindle motor (39) is connected to a signal adder (3) that combines the speed servo signal from the speed servo circuit (32) and the phase servo signal from the phase servo circuit (34).
The spindle servo signal added in step 7) is supplied from the signal adder (37) via a low-pass filter (38).

In addition, in the spindle servo circuit of conventional example (3) shown in FIG.
The focus clock CKAtlp with a frequency of 5.3 kHz obtained at
The frequency is divided by 1/3 by the 3 frequency divider (43), and the frequency becomes λ'
, 1kl (phase servo circuit (4
4).

The speed servo circuit (42) has a frequency of 6.3kHz, which is formed by dividing a reference clock signal given by a crystal oscillator (not shown) by a frequency divider (45).
The speed reference clock CK□, A, and the pid clock CK obtained by the ATIPI adjustment processing section (41), A1. A speed servo signal is generated by comparing the speed servo signal and the speed servo signal is supplied to the spindle motor (50) to perform speed servo so that the wavelength of the wobble signal detected from the magneto-optical disk becomes constant.

The phase servo circuit (44) has a frequency of 7°35 which is formed by dividing the reference clock by the frequency divider (45).
The kHz reference clock is multiplied by 2 weeks in a 2-week multiplication circuit (46), and further divided by 1/7 in a 1/7 frequency divider (43), resulting in a frequency of 2.1 kHz. A phase servo signal is formed by comparing the phases of the phase reference clock 2 and a comparison clock having a frequency of 2.1 kllz obtained by the 1/3 frequency divider (43), and this phase servo signal is applied to the spindle. The signal is supplied to the motor (50), and phase servo is performed so that the reproduction synchronization signal 5YNCATIP has a constant phase.

Also in this conventional example (■), the spindle motor (50
), a spindle servo signal obtained by adding a speed servo signal from the speed servo circuit (42) and a phase servo signal from the phase servo circuit (44) in a signal adder (48) is output from the signal adder (48). Low pass filter (
49).

D Problems to be Solved by the Invention By the way, in the spindle servo circuit of Conventional Example I having the above-mentioned configuration, the frequency obtained in the synchronization detection circuit (33) based on the demodulated output by the ATIPlj [processing section (41) is 75Hz reproduction synchronization signal 5YNC8T□ as phase reference clock 5YNCI! Since phase servo is applied by comparing the phase with F, there is no bit slip, but there is a problem that the servo band is narrow and it takes time to lengthen the phase.

Furthermore, in the spindle servo circuit of conventional example (3) having the above-mentioned configuration, the reproduction synchronization signal 5YNGay+r with a frequency of 75 Hz is obtained by the synchronization detection circuit (33) based on the demodulation output from the ATIP demodulation processing section (41). Since the phase of the signal is compared with the phase reference clock 5YNC+ir and the phase servo is applied, there is no bit slip, but there is a problem that the servo band is narrow and phase locking takes time.

Further, the bit clock signal C1 [Aa, P obtained in the ATIP demodulation processing section (41) is divided into 1/3 (43).
The frequency obtained by dividing the frequency by 1/3 is 2.1
Since the phase servo is applied by comparing the phase of the kllz comparison clock with the phase reference clock, the servo band is wide.
Although the time required for phase locking is short, there is a problem in that bit slips occur. In order to forcibly correct the bit slip in the spindle servo circuit of Conventional Example H, the frequency divider (45) provides a phase reference clock.

There is a problem in that it is necessary to forcibly reset the doubler circuit (46), the 1/7 frequency divider (43), etc., and the continuity of digital data is lost.

Therefore, the present invention aims to solve the above-mentioned problems in the conventional spindle servo circuit, and combines the advantages of the above-mentioned conventional examples to ensure a wide servo band and smooth bit slip. The present invention provides a disk rotation control device with a novel configuration that allows servo to be applied with high precision while making corrections.

E. Means for Solving the Problems In order to achieve the above-mentioned object, the disk rotation control device according to the present invention includes first phase comparison means for comparing the phases of the reference signal and the reproduction synchronization signal reproduced from the disk. and variable frequency division means for frequency dividing the reference signal, the frequency division ratio being controlled based on the comparison output from the first phase comparison means;
a second phase comparing means for phase-comparing the frequency division output from the variable frequency dividing means and a reproduced clock reproduced from the disk; It is characterized in that it is controlled by the comparison output from the comparison means.

F. Effect In the disk rotation control device according to the present invention, the first phase comparison means compares the phases of the reference signal and the reproduction synchronization signal reproduced from the disk, and divides the frequency of the reference signal based on the comparison. The frequency dividing ratio of the variable frequency dividing means is controlled. The second phase comparison means compares the phases of the frequency division output from the variable frequency division means and the reproduced clock reproduced from the disk, and uses the comparison output to drive the spindle motor that rotationally drives the disk. Control the rotation phase.

G. Embodiment Hereinafter, one embodiment of the disk rotation control device according to the present invention will be described in detail with reference to the drawings.

The embodiment shown in the block diagram of FIG. 1 is an application of the present invention to a magneto-optical disk recorder that uses a magneto-optical disk adopting the ATIP format as a recording medium, and the invention is reproduced as a wobble signal from a magneto-optical disk (not shown). A"IMP signal is supplied to the ATTP demodulation processing unit (2) via the first signal input terminal (+,), and a reference clock signal given by a crystal oscillator (not shown) is supplied to the second signal input terminal. (3) through divider (4)
is supplied to.

The ATIP demodulation processing unit (2) extracts a bit clock CKAT having a frequency of 6.3 kllz from the ATIP signal.
1 and supplies it to the speed servo circuit (5) and the 1/3 frequency divider circuit (6), and also reproduces the bit clock CKA.
Based on the FM demodulation output, the high phase mark signal is demodulated based on the FM demodulation output, and the synchronization signal 5YNCATIP with a frequency of 75 Hz is sent to the first
is supplied to the phase comparator (8).

Further, the frequency divider (4) divides the reference clock signal applied to the second signal input terminal (3) from a crystal oscillator (not shown) to generate a speed reference clock CKSlltF having a frequency of 5.3 kHz. and the frequency is 7.35k)lz
The phase reference clock (JPOF+) is formed, and the speed reference clock CKs*!y is connected to the speed servo circuit (5).
At the same time, PIIE is supplied to the phase reference clock C.
The FI is supplied to a 1/98 frequency divider circuit (9) and a doubler circuit (10).

The speed servo circuit (5) compares the pit clock CKAy+r obtained by the ATIP demodulation processor <31) with the speed reference quat CL++tp to form a speed servo signal, and transmits this speed servo signal to the spindle motor ( 1G), and speed servo is performed so that the wavelength of the wobble signal detected from the magneto-optical disk becomes constant.

The first phase comparator (9) has a frequency of 7.35k formed by dividing the reference clock by the frequency divider (4).
tlz phase reference clock CKp*wv+ above 1/9
A reference synchronization signal 5YNCIEF with a frequency of 75Hz obtained by dividing the frequency to 1/98 by an 8 frequency divider (9) and a reproduced synchronization signal S'l obtained by the synchronization detection circuit (7).
'A phase comparison is made with NCATIF, and the reproduction synchronization signal 5YNCAy is compared to the reference synchronization signal 5YNC*Er.
A comparison output indicating the lagging phase state (-), phase matching state (0), or leading phase state (g) of +r is recorded and reproduced at each timing of the falling edge of the signal S'l'NCATIF. The control logic (1) of the variable frequency divider (11) is
2).

Note that the first phase comparator (8) receives the reference synchronization signal 5YNC*! Phase comparison is performed with a resolution obtained by dividing one period of r into 28.

Further, the variable divider (11) has a frequency dividing ratio of 1, which is determined by the first phase comparator (8) according to the control logic (I2).
) based on the comparative output? )II, and performs 1/6 frequency division, 1/7 frequency division, or 1/8 frequency division. A phase reference clock C with a frequency of 14.7 kHz formed by multiplying
By frequency-dividing KpHFf at the above frequency division ratio, a phase reference clock PRFF3 having a frequency of 2.1 ktlz is formed and supplied to the second phase comparator (13).

In this embodiment, the variable frequency divider (11) has, as shown in FIG. 2, an example of the control state of the frequency division ratio.
Normally, the frequency is set to 1/7, and based on the comparison output from the first phase comparator (9), the reproduction synchronization signal 5YNC is set to the reference synchronization signal 5YNC, lfF.
When ATIP is in the lagging phase state (-), it is divided by 1/8, and when it is in the phase-losing state (0), it is divided by 1/7.
If the frequency is further advanced in the phase state (÷), 17
Phase reference clock □ of 2 and 1 kllz above, respectively, divided by 6. , for example, 3 laps! Only Q homa TC3 is switched by the control logic (12).

Here, in FIG. 2, the reference synchronization signal 5YNC obtained by the l/98 frequency divider (9) is shown in (A), and the reference synchronization signal by the first phase comparator (9) is shown. Signal 5YN
The contents of the comparison output for C++tr are shown in (B), and the reproduced synchronization signal 5YN obtained by the synchronization detection circuit (7)
CA A1. An example of the above is shown in (C), and furthermore, the variable frequency divider (
]1) The control state of the frequency division ratio is shown in (D).

The second phase comparator (13) has a frequency of 2°1k, which is formed by dividing the focus clock CKATIF by 1/3 using the 1/3 frequency divider (43).
A phase comparison clock of llz is supplied, and by comparing this phase comparison clock and the phase reference clock, -2° obtained as the frequency divided output from the variable frequency divider (11) (■), the phase servo signal is determined. and supplying this phase servo signal to the spindle motor (IG),
Phase servo is performed so that the reproduction synchronization signal 5YNCAT I P has a constant phase.

The spindle motor (16) is connected to a signal adder (1) that combines the speed servo signal from the speed servo circuit (5) and the phase servo signal from the second phase comparator (13).
The spindle servo signal added in step 4) is supplied from the signal adder (14) via a low-pass filter (I5).

In the rotation control device of this embodiment, the synchronization detection circuit (7
) The reproduction synchronization signal 5Y with a frequency of 7511z obtained at
NCA A, P is calculated by the first phase comparator (8).
Compare the phase with the fellow signal 5YNC++ir and control the frequency division ratio of the variable frequency divider (11) based on the comparison output,
The frequency divided output from this variable frequency divider (11) is the phase reference clock pHtF! for the phase servo! and the above ATI
A1□ to the focus clock C obtained by the P demodulator (2)
The second phase comparator (13) compares the phase of the comparison clock formed by dividing the frequency by 1/3 with the 1m phase clock pHEFff to form a phase servo signal, thereby preventing bit slips. It is possible to correct the rotational phase and control the rotational phase with high precision. Furthermore, by controlling the frequency division ratio of the variable frequency divider (11), bit slips can be smoothly corrected and the rotational phase can be controlled without impairing the continuity of digital data. Furthermore, in this rotation control device, the second phase comparator (
I3), the reproduction synchronization signal 5YNCAT I P with a frequency of 75Hz obtained by the synchronization detection circuit (7)
Since the phase comparison is performed at a higher frequency of 2.1 kHz to form the phase servo signal, a wide servo band can be secured.

H Effects of the Invention In the disk rotation control device according to the present invention, the reference signal and the reproduction synchronization signal reproduced from the disk are phase-compared by the first phase comparison means, and the reference signal is separated by the comparison. Is the minute ratio of the rotating variable frequency dividing means 1RIf? '[U] allows smooth correction of focus slip. Therefore, the rotational phase of the spindle motor that rotationally drives the disk is controlled by the comparison output from the second phase comparator that compares the phase of the frequency division output by the variable frequency dividing means and the reproduced clock reproduced from the disk. By doing so, we ensure a wide servo band and
It is possible to apply phase servo without impairing the continuity of digital data and control the rotational phase of the disk with high precision.

[Brief explanation of the drawing]

FIG. 1 is a professional diagram showing the configuration of a rotation control device in which the present invention is applied to a magneto-optical disk recorder, and FIG. 2 is a time chart for explaining the operation of the variable bone PI device in the rotation control device. be. FIG. 2 is a block diagram showing another conventional example of a spin and dollar servo circuit in a magnetic disk recorder.

Claims (1)

[Scope of Claims] A first phase comparison means for comparing the phases of a reference signal and a reproduction synchronization signal reproduced from a disk, and a frequency division ratio is controlled based on a comparison output from the first phase comparison means, A variable frequency dividing means for dividing the frequency of the reference signal; and a second phase comparison means for comparing the phases of the frequency division output of the variable frequency dividing means and the reproduced clock reproduced from the disk, and rotating the disk. A disk rotation control device characterized in that the rotational phase of a driven spindle motor is controlled by a comparison output from the second phase comparison means.