JPH03128559U - - Google Patents

Info

Publication number
JPH03128559U
JPH03128559U JP3762590U JP3762590U JPH03128559U JP H03128559 U JPH03128559 U JP H03128559U JP 3762590 U JP3762590 U JP 3762590U JP 3762590 U JP3762590 U JP 3762590U JP H03128559 U JPH03128559 U JP H03128559U
Authority
JP
Japan
Prior art keywords
control system
interlocking
cpus
outputs
pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3762590U
Other languages
Japanese (ja)
Other versions
JPH08206Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990037625U priority Critical patent/JPH08206Y2/en
Publication of JPH03128559U publication Critical patent/JPH03128559U/ja
Application granted granted Critical
Publication of JPH08206Y2 publication Critical patent/JPH08206Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Safety Devices In Control Systems (AREA)
  • Multi Processors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

各図は本考案の一実施例を示しており、第１図
は並列多重電子連動装置のブロツク図、第２図は
立ち上がり時の同期処理の動作流れ図、第３図は
タイマー再セツトの説明図、第４図は動作中の同
期処理の動作流れ図である。 １０……並列多重電子連動装置、２０……第１
の連動制御系、３０……第２の連動制御系、２１
，３１……制御部、２３，３３……制御出力用の
共通回線、２４，３４……表示用の共通回線、２
５，３５……再セツト可能なタイマ、２６，３６
……同期用リンク回線、ＷＤＴ１，ＷＤＴ２……
ウオツチドツグタイマ用リレー。 Each figure shows an embodiment of the present invention. Figure 1 is a block diagram of a parallel multiple electronic interlocking device, Figure 2 is an operation flowchart of synchronization processing at startup, and Figure 3 is an explanatory diagram of timer reset. , FIG. 4 is an operational flowchart of the synchronization process during operation. 10...parallel multiple electronic interlocking device, 20...first
interlocking control system, 30...second interlocking control system, 21
, 31... Control unit, 23, 33... Common line for control output, 24, 34... Common line for display, 2
5, 35...Resettable timer, 26, 36
...Synchronization link line, WDT1, WDT2...
Relay for watchdog timer.

Claims (1)

【実用新案登録請求の範囲】 複数の同一仕様の連動制御系を組み合わせ、相
互補完して動作する並列多重電子連動装置におい
て、 各連動制御系は、共通のプログラムで動作する
よう対をなすＣＰＵと、該対をなすＣＰＵによる
異常判断出力により動作するウオツチドツグタイ
マ用リレーとをそれぞれ備え、 各連動制御系の対をなすＣＰＵに当該連動制御
系のシステム周期を出力するとともに再セツト可
能なタイマをそれぞれ付設し、各タイマの出力を
相互に他方の連動制御系の対をなすＣＰＵに接続
したことを特徴とする並列多重電子連動装置。[Claims for Utility Model Registration] In a parallel multiple electronic interlocking device that combines a plurality of interlocking control systems with the same specifications and operates in a mutually complementary manner, each interlocking control system is connected to a pair of CPUs so as to operate according to a common program. , and a watchdog timer relay that is activated by the abnormality judgment output from the paired CPU, outputs the system cycle of the interlocked control system to the paired CPU of each interlocked control system, and can be reset. 1. A parallel multiplex electronic interlocking device characterized in that timers are respectively attached and the outputs of each timer are mutually connected to a pair of CPUs of the other interlocking control system.
JP1990037625U 1990-04-06 1990-04-06 Parallel multiple electronic interlocking device Expired - Fee Related JPH08206Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990037625U JPH08206Y2 (en) 1990-04-06 1990-04-06 Parallel multiple electronic interlocking device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990037625U JPH08206Y2 (en) 1990-04-06 1990-04-06 Parallel multiple electronic interlocking device

Publications (2)

Publication Number Publication Date
JPH03128559U true JPH03128559U (en) 1991-12-25
JPH08206Y2 JPH08206Y2 (en) 1996-01-10

Family

ID=31544908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990037625U Expired - Fee Related JPH08206Y2 (en) 1990-04-06 1990-04-06 Parallel multiple electronic interlocking device

Country Status (1)

Country Link
JP (1) JPH08206Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0228057A (en) * 1988-07-14 1990-01-30 Kyosan Electric Mfg Co Ltd Electronic interlocking device
JPH0235875U (en) * 1988-08-31 1990-03-08
JPH03292257A (en) * 1990-04-06 1991-12-24 Kyosan Electric Mfg Co Ltd Parallel multiplex electronic interlocking device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0228057A (en) * 1988-07-14 1990-01-30 Kyosan Electric Mfg Co Ltd Electronic interlocking device
JPH0235875U (en) * 1988-08-31 1990-03-08
JPH03292257A (en) * 1990-04-06 1991-12-24 Kyosan Electric Mfg Co Ltd Parallel multiplex electronic interlocking device

Also Published As

Publication number Publication date
JPH08206Y2 (en) 1996-01-10

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Legal Events

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LAPS Cancellation because of no payment of annual fees