JPH0313507U - - Google Patents

Info

Publication number
JPH0313507U
JPH0313507U JP7143389U JP7143389U JPH0313507U JP H0313507 U JPH0313507 U JP H0313507U JP 7143389 U JP7143389 U JP 7143389U JP 7143389 U JP7143389 U JP 7143389U JP H0313507 U JPH0313507 U JP H0313507U
Authority
JP
Japan
Prior art keywords
speed
feedback path
multiplier
absolute value
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7143389U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7143389U priority Critical patent/JPH0313507U/ja
Publication of JPH0313507U publication Critical patent/JPH0313507U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Feedback Control In General (AREA)
  • Control Of Position Or Direction (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例による制御装置を
示すブロツク図、第2図は従来の制御装置を示す
ブロツク図である。 図において、1……速度指令、2……現在速度
、3,9……減算器、4……速度誤差、5……演
算増幅器、6……補償演算器、7……電流指令、
8……現在電流、10……積分器、11……物理
積分、12……絶対値回路、13……乗算器、1
4……補償演算器である。なお、図中、同一符号
は同一又は相当部分を示す。
FIG. 1 is a block diagram showing a control device according to an embodiment of this invention, and FIG. 2 is a block diagram showing a conventional control device. In the figure, 1...Speed command, 2...Current speed, 3, 9...Subtractor, 4...Speed error, 5...Operation amplifier, 6...Compensation calculator, 7...Current command,
8... Current current, 10... Integrator, 11... Physical integration, 12... Absolute value circuit, 13... Multiplier, 1
4...Compensation calculator. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 1つの電流帰還路と1つの速度帰還路とを有す
る速度制御系において、速度誤差の絶対値回路と
、上記絶対値回路の出力と定数を乗算する乗算器
と、上記乗算器の出力を極として速度帰還路に存
在する補償回路とを備えたことを特徴とする制御
装置。
In a speed control system having one current feedback path and one speed feedback path, an absolute value circuit for speed error, a multiplier that multiplies the output of the absolute value circuit by a constant, and the output of the multiplier as a pole. A control device comprising: a compensation circuit present in a speed feedback path.
JP7143389U 1989-06-19 1989-06-19 Pending JPH0313507U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7143389U JPH0313507U (en) 1989-06-19 1989-06-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7143389U JPH0313507U (en) 1989-06-19 1989-06-19

Publications (1)

Publication Number Publication Date
JPH0313507U true JPH0313507U (en) 1991-02-12

Family

ID=31608460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7143389U Pending JPH0313507U (en) 1989-06-19 1989-06-19

Country Status (1)

Country Link
JP (1) JPH0313507U (en)

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