JPH03139838A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the defective contact between a substrate and a wiring or between multilayer interconnections due to spontaneous oxidation and to prevent the occurrence of hillocks in an aluminum wiring by using gas plasma wherein rare gas is a main substance and hydrogen carbide is an additive, and treating the surface of a semiconductor substrate or the surface of a wiring layer formed on the substrate. CONSTITUTION:The inside of a vacuum cell 11 is evacuated with an exhausting device. For example, Ar gas into which 1% CH4 is added is introduced. A high-frequency voltage is applied to an electrode 12, and plasma is generated between the electrode and the vacuum cell 11. Thus, the surface of a silicon substrate 6 is etched. A high-frequency sputtering device is used, and an SiO2 film on the silicon substrate is etched with the Ar gas into which CH4 is added. At this time, when the adding ratio of CH4 is 0.1% or less, the etching speed becomes approximately constant and approaches the speed with pure Ar. The etching speed is conspicuously increased from the CH4-adding rate of 0.2%. The speed becomes the maximum value in the vicinity of 0.7%. Then, the speed decreases rapidly. The etching speed becomes zero in the vicinity of 2%.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method for surface treatment of silicon substrates and metal wiring layers such as aluminum.

The purpose is to prevent contact failure due to natural oxide film between the substrate and wiring or multilayer wiring, and to prevent hillocks in aluminum wiring.

Using a dry etching device with parallel plate electrodes, plasma is generated in a rare gas containing 0.2 to 2% by volume of hydrocarbons, and the semiconductor substrate is exposed to this plasma, thereby etching the surface of the substrate. Alternatively, the method is configured to include a step of surface treating a wiring layer formed on the substrate.

[Industrial application field]

The present invention relates to a surface treatment method such as removing a natural oxide film existing on the surface of a silicon substrate or a surface of a metal wiring layer such as aluminum in a semiconductor device, and hardening the surface.

[Conventional technology]

In semiconductor devices, wiring layers made of aluminum are often used, but aluminum is easily oxidized when it comes into contact with air. There are about a few dozen natural oxide films. When upper layer wiring is formed on such an aluminum wiring layer, the contact resistance between these wiring layers becomes high. Particularly in recent high-density integrated circuits, the area of contact holes for connecting multilayer wiring has become smaller, and the increase in contact resistance has become impossible to ignore. Similarly, a natural oxide film is likely to be formed on the surface of the silicon substrate (this causes an increase in the contact resistance between the silicon substrate and the wiring layer connected to it).

In addition, as the aluminum wiring layer becomes thinner with the increase in the density of integrated circuits, so-called electromigration and stress migration occur on the surface of the aluminum wiring layer.
They tend to form constrictions and protrusions (hillocks), which can lead to problems such as wire breakage and short circuits between wires during long-term operation.

[Problem to be solved by the invention]

Conventionally, prior to depositing a wiring layer by sputtering or the like, the surface of the silicon substrate or the surface of the underlying wiring layer exposed in the contact hole is deposited.

Ion etching in Ar gas to remove natural oxidation present on the surface of 9, and then avoiding exposure to the atmosphere.
Subsequently, an upper wiring layer was deposited.

However, the etching rate of oxide films by Ar ions is generally low. Therefore, it was necessary to increase the bias voltage to increase the etching speed and to perform etching for a relatively long time. As a result, there was a problem in that the exposed portion of the silicon substrate was susceptible to ion damage. Also,
Si forming the glabella insulating layer from the sidewall of the contact hole
There is a problem in that O□ and PSG (phosphosilicate glass) are sputtered and redeposited onto the substrate surface and wiring layer exposed in the contact hole, resulting in an increase in contact resistance.

It is well known that the etching rate increases when a halogen compound such as CC1 or CF is added to Ar.

If such a gas is used, it may be possible to remove the oxide film at a practical speed while minimizing damage to the substrate at a low bias voltage. It is difficult to control the etching rate because it shows a high etching rate.

On the other hand, in order to prevent the occurrence of hillocks on the surface of the aluminum wiring layer, attempts have been made to form films such as silicide, sputtered 5i (h), amorphous Si, etc. on the aluminum wiring layer, but these efforts have not been sufficiently effective. Unable to do so.
Additionally, there was a problem that the number of steps increased.

The present invention solves the above-mentioned conventional problems, and removes the natural oxide film on the surface of a silicon substrate or a metal wiring layer such as aluminum at high speed, and does not re-deposit 5iOz etc. due to sputtering from the side wall of a contact hole. The object of the present invention is to disclose a surface treatment method that is effective in preventing surface migration by carbonizing the surface of an aluminum wiring layer.

[Means to solve the problem]

The above object is achieved by the present invention, which includes a step of surface-treating a semiconductor substrate or a wiring layer formed on the substrate using plasma of a gas containing a rare gas as a main ingredient and a hydrocarbon as an additive. A method of manufacturing such a semiconductor device, or a step of forming an insulating layer on one surface of a semiconductor substrate having an opening that exposes a predetermined portion of the surface of the substrate or a predetermined portion of a wiring layer formed on the substrate; The method includes the step of placing the substrate with an opening formed between parallel plate type or equivalent electrodes, and generating a plasma of a gas containing a rare gas as a main ingredient and a hydrocarbon as an additive between the electrodes. This is achieved by a method of manufacturing a semiconductor device characterized by the present invention.

[For production]

When etching a SiO□ film on a silicon substrate using a mixed gas such as a rare gas such as Ar and a hydrocarbon such as CHa (methane) as the etching gas, the etching rate increases from a volumetric addition rate of hydrocarbon of 0.2%. began to increase,
It was shown that the etching rate reaches its maximum at around 0.7%. This maximum etching rate is about 1.7 times the etching rate with pure Ar without adding hydrocarbons. At this time, the silicon substrate is hardly etched, and SiO□ is not re-attached to the surface of the wiring layer exposed in the contact hole. Further, since a practical etching rate can be obtained even at a low bias voltage, surface treatment can be performed without damaging the substrate.

Furthermore, after removing the natural oxide film on the surface of the aluminum wiring layer using the above etching gas, simply increasing the pressure of the etching gas.

Since carbon is injected into the surface of the aluminum wiring layer to form a carbonized layer, one surface is hardened and migration can be prevented.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is an explanatory diagram of the configuration of an apparatus used in carrying out the present invention, in which FIG. 1A is a block diagram of the configuration, and FIG. 1A is a schematic diagram of the etching processing block.

As shown in FIG. 1(a), etching processing block 1
and aluminum deposited block 2. It also consists of load rotor blocks 3 and 4 provided before and after these blocks. Each of these blocks is connected by a conveying pipe 5 whose interior is evacuated.

A substrate to be processed is sent from the load lock block 3 and is sent from the etching processing block 1 to the aluminum deposition block 2 and taken out from the load lock block 4 to the outside.

As shown in FIG. 1(b), the etching processing block l
1 has a vacuum chamber 11 made of, for example, stainless steel, and a silicon substrate 6 on which, for example, an aluminum wiring layer is formed is housed inside the vacuum chamber 11. An electrode 12 with a diameter of 25 cm on which the silicon substrate 6 is placed is insulated from the vacuum chamber 11.
It is also connected to a high frequency power source 13 that outputs a commercial frequency of 13.56 MHz. The vacuum chamber 11 is grounded, and together with the electrode 12 constitutes a parallel plate type electrode. The electrode 12 is provided with a heater 14 for heating the silicon base vi6.

While the inside of the vacuum chamber 11 is evacuated by an exhaust device (not shown), Ar gas containing 1% CH4, for example, is introduced, and a high frequency voltage is applied to the electrode 12 to generate plasma between the electrode 12 and the vacuum chamber 11. The surface of the substrate 6 is etched.

FIG. 2 shows C
SiOx on a silicon substrate using a metering gas doped with H.
Etching speed when etching a film (person/1II
12 is a graph showing the relationship between the volume addition rate (%) of C1 and C1. What is the total pressure of the above etching gas?

0.0ITorr, and the supplied high frequency power is 300W (power density 0.9W/cdl).

As shown in the figure, when the addition rate of CH, is 0.1% or less, the etching rate is almost constant, and the etching rate with pure Ar is about 28%.
Approaching people/min. The etching rate began to increase markedly when the CH4 addition rate was 0.2%, reached a maximum value of about 45 etching/min around 0.7%, and then rapidly decreased to 2.
%, the etching rate becomes zero. In the C1 addition rate range of 2% or more where the etching rate becomes zero, a resinous substance is deposited on one surface.

The above phenomenon is interpreted as follows.

That is, when the addition rate of hydrocarbons increases to 2% or more, the density of hydrocarbon radicals and ions in the plasma increases, and these polymerize on the substrate surface to generate high-molecular hydrocarbons.

On the other hand, when the addition rate of CH, is around 0.7%, the density of hydrocarbon radicals etc. is low, so only low molecular weight hydrocarbon polymers are generated on the substrate surface. Since it is sputtered or decomposed into volatile hydrocarbons by irradiation with Ar ions, it does not remain on the substrate surface.

That is, according to the etching gas of the present invention.

It is thought that sputter etching by Ar ions and the following reduction reaction by hydrocarbons such as C1 are carried out in parallel.

4M0X+ XCH4→4M + xcOz + 2x
HzO---(1) Here is the old metal atom.

The reduction reaction promotes removal of the natural oxide film on the surface of the silicon substrate and the aluminum wiring layer.

The formation energies of SiO□ and A1.03 are +217Kcal/mo1 and 400Kcal/mo1, respectively.
It is mol. Therefore, the removal of the native oxide film on the surface of the silicon substrate and the surface of the aluminum wiring layer by sputtering and reduction reaction by the ^r ions proceeds at the same speed.

The reason why 5i02 etc. does not re-deposit from the side wall of the contact hole when the etching gas of the present invention is used is considered to be as follows.

FIG. 3 shows an aluminum wiring layer 7 formed on a processing substrate via an insulating layer (not shown), and an aluminum wiring layer 7 formed on a processing substrate via an insulating layer (not shown).
A cross section of the glabellar insulating layer 8 made of 5iO1 formed thereon is shown. As shown in the figure, when static ions are irradiated to the contact hole 81 provided in the sin, glabella insulating layer 8, SiO
□ is sputtered, and the relationship between the sputtering speed of Sing and the incident angle θ of the meter ions is shown in FIG.

It is known that the sputtering rate reaches a maximum near θ=60° and rapidly decreases when θ=90°. (For example, IEEE “Transaction on
Elec-tron DeviceS″Vo1.HD
-27, No, 8. (See p. 1449) Therefore,
The speed at which SiO□ adhering to the bottom of the contact hole 81 is re-sputtered is slow.

Sing accumulates on the bottom.

However, in one aspect of the present invention, as described above.

On the surface to be treated, the formation of a polymer film by polymerization of hydrocarbon radicals and the sputtering of this polymer film by Ar ions proceed simultaneously. Although the formation rate of a polymer film does not exhibit anisotropy with respect to the surface to be treated, the sputtering rate is approximately proportional to the density of incident ^r ions. Therefore, like the side wall portion 82 of the contact hole 81, A
The ion density of the surface that is about 1 with respect to the direction of incidence of r ions becomes small, and the sputtering rate decreases. As a result, the formation of a polymer film suppresses sputtering and protects the SiO□ on the sidewall. Therefore, the side wall portion 82
The sputtering of SiO□ from the contact hole 81 is eliminated, and the SiO
Reattachment of □ will not occur.

As described above, the surface of the silicon substrate or the surface of the wiring layer made of aluminum or the like exposed in the contact hole is cleaned using, for example, a sputtering apparatus having ordinary parallel plate type electrodes.

Subsequently, the silicon substrate is sent to the aluminum deposition block 2 in the same apparatus or to the aluminum deposition block 2 in FIG. 1 to deposit an upper wiring layer made of, for example, an aluminum thin film. Therefore, the upper wiring layer comes into direct contact with the cleaned surface, allowing a low resistance connection. Also,
As shown in FIG. 1, the addition of C) 14 increases the etching rate, so even if the bias voltage is set low, a practical etching rate can be maintained.

It becomes possible to reduce Ar ion damage to the substrate.

In the present invention, the surface of the wiring layer made of aluminum or the like exposed in the contact hole is also bombarded by hydrocarbon molecular ions such as CH4. C.O.

The total pressure of Ar gas containing etc. is 1 to 10 mm Torr.
After cleaning the surface of the aluminum wiring layer as r, the total pressure is increased to about 10 to 50 mm Torr.

As a result, the energy of Ar ions incident on the surface of the wiring layer decreases, and the sputtering rate of the cleaned surface of the wiring layer decreases. On the other hand, since the proportion of incident CI and ions increases, carbon atoms are ion-implanted into the surface of the wiring layer. In this way, carbon is implanted or carbide is formed on the surface of the aluminum wiring layer.
Since the surface is hardened, "necks" and hillocks due to migration are less likely to occur, and problems such as wire breakage and short circuits between wires caused by these can be prevented.

〔Effect of the invention〕

According to the present invention, the natural oxide film on the surface of the substrate and the wiring layer is removed without causing ion damage to the semiconductor substrate using a normal sputtering device having parallel plate electrodes, and the upper wiring layer is subsequently formed. As a result, the substrate or wiring layer and the upper wiring layer can be connected with low contact resistance, which has the effect of improving the performance and manufacturing yield of the semiconductor device. In addition, carbides can be generated on the surface of aluminum wiring layers, etc., and as a result,
This has the effect of eliminating troubles such as disconnection of wires or short circuits between wires due to migration, and improving the reliability of the semiconductor device.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the configuration of an apparatus used to implement the present invention. FIG. 2 is a graph showing the relationship between the etching rate of an oxide film by Ar gas added with CH and the volume addition rate of CH. FIG. 3 is a cross-sectional view of a contact hole provided in an interlayer insulating layer made of Sin. Figure 4 shows the incident angle of static ions on the SiO□ surface and S
3 is a graph showing the relationship between etching rates of iO□. In fig. 1 is an etching processing block. 2 is an aluminum stack block. 3 and 4 are road rotta blocks. 5 is a conveyor tube, 6 is a silicon substrate. 7 is an aluminum wiring layer, 8 is an insulation layer between the eyebrows. 11 is a vacuum chamber, 12 is an electrode, and 13 is a high frequency power source. 14 is a heater, and 71 is a natural oxide film. 81 is a contact hole, and 82 is a side wall portion. (a,) CHa/rAr+cH+) 薯 2 increase ≦ obsolete month n use for arrow digits\) 1,000; ni'fnηiaz浙ffatherban 1 old 51o2 gaara A3 layer question #! Takeshi for special training→Group T; Con77
Tobo Linker Screen Record No. 3

Claims (3)

[Claims] (1) Manufacture of a semiconductor device characterized by including a step of surface treating a semiconductor substrate or a wiring layer formed on the substrate using plasma of a gas containing a rare gas as a main ingredient and a hydrocarbon as an additive. Method. (2) forming on one surface of a semiconductor substrate an insulating layer having an opening that exposes a predetermined portion of the surface of the substrate or a predetermined portion of a wiring layer formed on the substrate; A semiconductor device comprising the steps of: installing a substrate between parallel plate type or equivalent electrodes; and generating plasma of a gas containing a rare gas as a main ingredient and a hydrocarbon as an additive between the electrodes. manufacturing method. (3) Claim 1 or 2, characterized in that the volumetric addition ratio of hydrocarbon to rare gas is 0.2 to 2%.
A method for manufacturing a semiconductor device according to .