JPH0315410B2 - - Google Patents
Info
- Publication number
- JPH0315410B2 JPH0315410B2 JP56027387A JP2738781A JPH0315410B2 JP H0315410 B2 JPH0315410 B2 JP H0315410B2 JP 56027387 A JP56027387 A JP 56027387A JP 2738781 A JP2738781 A JP 2738781A JP H0315410 B2 JPH0315410 B2 JP H0315410B2
- Authority
- JP
- Japan
- Prior art keywords
- battery
- voltage
- circuit
- lsi
- clock pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B10/00—Integration of renewable energy sources in buildings
- Y02B10/70—Hybrid systems, e.g. uninterruptible or back-up power supplies integrating renewable energies
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
Landscapes
- Stand-By Power Supply Arrangements (AREA)
- Power Sources (AREA)
- Photovoltaic Devices (AREA)
Description
【発明の詳細な説明】
本発明は太陽電池等の電池電源により駆動され
る電子機器の保護回路に関するものである。最
近、電卓等に於けるLIS等の使用素子の低消費電
力化が進み、太陽電池で直接電卓を駆動する太陽
電池付電卓が出している。斯ゝる機器の欠点は、
特に計算途中において太陽電池への入射光が遮断
された場合、計算途中の記憶情報が破壊され消失
してしまう事である。この欠点を除去する為、従
来より2つの保護回路方式が採られている。即
ち、(i)太陽電池と並列に使用素子であるLISの動
作を保護するバツクアツプ用コンデンサを接続
し、このコンデンサで太陽電池への一時的な入射
光遮断を保護する。(ii)バツクアツプ用電池を内蔵
しておき、太陽電池への入射光が遮断されてもバ
ツクアツプ用電池で動作させる。しかし、上記従
来の(i)、(ii)の方式はいずれも次のような欠点を有
していた。即ち、(i)回路方式の場合(第1図参
照)第1図に示す如く、この方式はバツクアツプ
用コンデンサC1で太陽電池SBへの一時的な入射
光を保護する回路方式であり、太陽電池SBと並
列に入射光遮断時のバツクアツプ用コンデンサ
C1が接続され、さらにこのコンデンサC1と並列
に電池SBに必要以上の入射光が照射された場合、
LISに過大な電圧が印加されるのを防止する為の
定電圧用LED(D1,D2)が接続される。即ちこの
D1,D2は電池SBの出力電圧を定電圧化する。こ
の回路によれば電池SBへの入射光が遮断された
時、太陽電池SBの出力が零ボルトとなる為、電
子機器の動作に必要な電圧はコンデンサC1によ
つて補なわれる。この為、太陽電池SBへの入射
光が遮断されてもバツクアツプ用コンデンサC1
によつてLISの動作を保証する。従つて、保証時
間を長くするにはコンデンサC1の容量を可能な
限り大きくする必要があつた。しかしながらこの
回路方式の欠点は例えば太陽電池付電卓を暗黒よ
り取り出し、太陽電池に光を与えても、電卓が使
用可能な状態に達する迄、しばらく時間を要する
という欠点があつた。即ち、コンデンサC1の電
荷がチヤージ“0”の状態で、暗黒より光のある
場所へ取り出した場合、太陽電池出力はバツクア
ツプ用コンデンサC1の電圧がLSIを動作させるに
必要な電圧に達する迄、かなりの時間を要する事
にあり、この時間、機器を使用することができな
いという不都合を生じた。上記使用可能な状態に
替する迄の時間(以下回復時間と呼ぶ)。T1は近
似的に次式に表わされる。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection circuit for electronic equipment driven by a battery power source such as a solar battery. Recently, the power consumption of devices such as LIS in calculators has been reduced, and calculators with solar batteries that directly drive the calculators are now available. The disadvantages of such equipment are
In particular, if the incident light to the solar cell is cut off during the calculation, the stored information during the calculation will be destroyed and lost. In order to eliminate this drawback, two protection circuit systems have conventionally been adopted. That is, (i) a backup capacitor is connected in parallel with the solar cell to protect the operation of the LIS, which is an element used, and this capacitor protects against temporary interruption of incident light to the solar cell. (ii) A backup battery is built-in, and even if the incident light to the solar cells is blocked, the backup battery can be used for operation. However, the above conventional methods (i) and (ii) both have the following drawbacks. In other words, (i) circuit method (see Figure 1) As shown in Figure 1, this method is a circuit method in which the backup capacitor C1 protects the temporary light incident on the solar cell SB. Backup capacitor when blocking incident light in parallel with battery SB
If C 1 is connected and more incident light than necessary is applied to the battery SB in parallel with this capacitor C 1 ,
Constant voltage LEDs (D 1 , D 2 ) are connected to prevent excessive voltage from being applied to the LIS. That is, this
D 1 and D 2 make the output voltage of battery SB constant. According to this circuit, when the light incident on the battery SB is cut off, the output of the solar battery SB becomes zero volts, so the voltage necessary for the operation of the electronic device is supplemented by the capacitor C1 . Therefore, even if the incident light to the solar cell SB is blocked, the backup capacitor C 1
The operation of LIS is guaranteed by Therefore, in order to extend the guaranteed time, it was necessary to increase the capacitance of capacitor C1 as much as possible. However, a drawback of this circuit system is that, for example, even if a calculator with a solar battery is taken out of the darkness and light is applied to the solar battery, it takes some time for the calculator to reach a usable state. In other words, if the charge on capacitor C1 is "0" and the charge is taken out from darkness to a place where there is light, the solar cell output will continue until the voltage on backup capacitor C1 reaches the voltage required to operate the LSI. , it took a considerable amount of time, which caused the inconvenience that the equipment could not be used during this time. The time required to return to the usable state (hereinafter referred to as recovery time). T 1 is approximately expressed by the following equation.
T1=C1・V/I・A …(1) こゝで、 C1…バツクアツプ用コンデンサの容量。 T 1 = C 1・V/I・A …(1) Here, C 1 …capacity of backup capacitor.
V…機器を正常に動作させる為に、使用素子であ
るLSIに印加するに必要な電圧。V...The voltage required to be applied to the LSI elements used in order to operate the device normally.
A…太陽電池への入射光の照度。A...Illuminance of incident light to the solar cell.
I…Aの照度を与えたときの太陽電池の出力電
流。The output current of the solar cell when an illuminance of I...A is given.
上記(1)式に於て、回復時間T1を短くするには、
C1,Vを小さく、I,Aを大きくする必要があ
り、この場合C1を小さくするとバツクアツプ用
コンデンサとしての効果が少なくなり、又Vを小
さくするとLSIの歩留りが低下しLSIのコスト高
につながるという欠点があつた。さらに又Aを大
きくすることは太陽電池付機器の使用照度範囲を
狭める事になり、又Iを大きくするには太陽電池
の面積を大きくする必要があるが、太陽電池は現
在、一般の電池に比べ高価であり、太陽電池の面
積を大きくすることは太陽電池のコストアツプと
なる欠点を有していた。(ii)の回路方式の場合(第
2図参照)この方式はバツクアツプ電池によつて
太陽電池への一時的な入射光遮断を保護する回路
方式であり、電池のバツクアツプ方式には1次電
池を使用するもの(同図a)と2次電池を使用す
るもの(同図b)とがある。前者は図示の如く一
次電池E1が太陽電池SBの起電力によつて充電さ
れない様にダイオードDが挿入されており、太陽
電池SBの起電力が低下すれば一次電池E1より
LSIへ電力供給が行われる。一方後者は図示の如
く太陽電池SBの起電力が大きい場合は二次電池
E2(例えばNi−Cd電池等)を充電々流制限用抵抗
Rを介して充電しつゝLSIへ電力供給が行われ
る。そうでない場合は二次電池E2よりLSIへ電力
供給が行われる。しかし乍ら、このバツクアツプ
コンデンサ電池を内蔵する方法はバツクアツプ電
池として二次電池(Ni−cd電池など)の使用又
は普通の一次電池の使用のいずれの場合であつて
も電池には寿命があり、電池を交換する必要があ
り、この為半永久的な半導体太陽電池の商品性が
著しく半減するという欠点を有していた。 In equation (1) above, to shorten the recovery time T 1 ,
It is necessary to make C 1 and V small and I and A large. In this case, if C 1 is made small, the effect as a backup capacitor will be reduced, and if V is made small, the yield of LSI will decrease and the cost of LSI will increase. It had the disadvantage of being connected. Furthermore, increasing A will narrow the range of illuminance that can be used for devices equipped with solar cells, and increasing I will require increasing the area of the solar cells, but solar cells are currently not suitable for general batteries. It is relatively expensive, and increasing the area of the solar cell has the disadvantage of increasing the cost of the solar cell. In the case of the circuit system (ii) (see Figure 2), this system uses a backup battery to protect against temporary interruption of incident light to the solar cell, and the battery backup system uses a primary battery. There are two types: one that uses a rechargeable battery (see figure a) and one that uses a secondary battery (see figure b). In the former case, as shown in the figure, a diode D is inserted so that the primary battery E 1 is not charged by the electromotive force of the solar cell SB, and if the electromotive force of the solar cell SB decreases, the primary battery E 1 is charged.
Power is supplied to the LSI. On the other hand, the latter is a secondary battery when the electromotive force of the solar cell SB is large as shown in the figure.
Power is supplied to the LSI while charging E 2 (for example, a Ni--Cd battery) via a charging current limiting resistor R. Otherwise, power is supplied to the LSI from the secondary battery E2 . However, this method of incorporating a backup capacitor battery has a limited lifespan, regardless of whether a secondary battery (such as a Ni-CD battery) or an ordinary primary battery is used as a backup battery. However, it is necessary to replace the battery, which has the disadvantage that the marketability of semi-permanent semiconductor solar cells is significantly halved.
本発明は上記従来の諸欠点に鑑みてなされたも
ので、特に太陽電池への入射光が一時的に遮断さ
れても太陽電池により直接駆動される回路素(例
えばLSI)のバツクアツプが可能で、又太陽電池
付機器を暗黒より取り出し機器が使用できる迄の
時間を太陽電池面積を必要最小限として大幅に短
縮できる様にしたものである。 The present invention has been made in view of the above-mentioned conventional drawbacks, and in particular, it is possible to back up circuit elements (such as LSI) directly driven by solar cells even if the incident light to the solar cells is temporarily interrupted. In addition, the time required until a device equipped with a solar cell can be taken out of the darkness and used can be significantly shortened by minimizing the area of the solar cell.
以下本発明の一実施例を図面を参照して詳述す
る。第3図は本発明による一例の保護回路を示
し、図中、D1,D2は太陽電池SBの出力電圧を定
電圧化するLED、C1はLSIのバツクアツプ用コン
デンサ、aは電池電源の電圧検知回路、LSIは演
算・記憶・クロツクパルス発生等の各構成要素を
含む大規模集積回路、DISPは表示ユニツトであ
る。上記電圧検知回路aは太陽電池SBの入射光
が遮断された時、後述するLSI内部のクロツクパ
ルス発生器を停止させるための電圧を検出する。
第4図はLSIシステムをブロツク図で詳細した図
であり、図中、CGはクロツクパルス発生器、
SW1はLSI内蔵のスイツチング素子で例えば
MOSトランジスタにより構成される。Mは記憶
素子、Cpuは演算、制御などを司どる中央処理装
置、V1はLSIの印加電圧、I1はLSI電流である。
ここで、仮に上記CPUの正常動作電圧範囲を
2.4V〜3.2Vとする。そして、上記定電圧用LED
D1,D2によつて通常LSIへ供給される電圧をA電
圧として、これを3.1Vに設定する。 An embodiment of the present invention will be described in detail below with reference to the drawings. Figure 3 shows an example of a protection circuit according to the present invention. In the figure, D 1 and D 2 are LEDs that stabilize the output voltage of the solar cell SB, C 1 is an LSI backup capacitor, and a is a battery power source. The voltage detection circuit, LSI, is a large-scale integrated circuit that includes various components such as calculation, memory, and clock pulse generation, and DISP is a display unit. The voltage detection circuit a detects a voltage for stopping a clock pulse generator inside the LSI, which will be described later, when the incident light of the solar cell SB is interrupted.
Figure 4 is a detailed block diagram of the LSI system. In the figure, CG is the clock pulse generator,
SW 1 is a switching element with built-in LSI, for example
Consists of MOS transistors. M is a memory element, Cpu is a central processing unit in charge of calculations, control, etc., V 1 is an applied voltage of the LSI, and I 1 is an LSI current.
Here, suppose the normal operating voltage range of the above CPU is
The voltage should be 2.4V to 3.2V. And the above constant voltage LED
The voltage normally supplied to the LSI by D 1 and D 2 is defined as A voltage, and this is set to 3.1V.
又、クロツクパルス発生器CGが停止した時の
LSIの静的状態保持電圧の範囲を1.5V〜3.2Vとす
る。 Also, when the clock pulse generator CG stops
The static state holding voltage range of LSI is 1.5V to 3.2V.
更に、上記CPUの正常動作電圧下限2.4Vより
もわずかに大きい電圧値である2.5VをB電圧と
する。今太陽電池への入射光が遮断されてLSI印
加電圧V1が第5図に示すようにA電圧からB電
圧に低下した時、aの電圧検知回路が動作し、
LSI内蔵のスイツチング素子SW1が開となると、
クロツクパルス発生器CGはバツクアツプ用コン
デンサC1による充電電圧の供給が遮断され、ク
ロツクパルス発生器CGによるクロツクパルス発
生が停止する。なおこの発生器CGが停止した時、
LSIをC−MOSトランジスタで構成しておけば
LSIは静的状態となり、LSI電流はI1はほとんど
流れなくなる(第5b参照)。 Further, a voltage value of 2.5V, which is slightly larger than the normal operating voltage lower limit of 2.4V for the CPU, is defined as the B voltage. When the incident light to the solar cell is cut off and the LSI applied voltage V1 drops from voltage A to voltage B as shown in Figure 5, the voltage detection circuit a operates,
When the LSI built-in switching element SW1 opens,
The supply of charging voltage from the backup capacitor C1 to the clock pulse generator CG is cut off, and the generation of clock pulses by the clock pulse generator CG is stopped. Furthermore, when this generator CG stops,
If the LSI is configured with C-MOS transistors,
The LSI becomes static, and almost no LSI current flows through I1 (see Section 5b).
この為、第3図に示すバツクアツプコンデンサ
C1をLSIの静的電流のみをバツクアツプする為、
コンデンサ容量を極めて小さくできる。LSIの静
的状態では第4図のCpu及び記憶素子Mは静的状
態保持電圧の下限電圧である1.5V以上の電圧が
コンデンサC1により印加されているのでクロツ
クパルス発生器CGの停止前のLSIの内部状態が
保持されている。今、コンデンサC1の容量を
10μF、LSiの静的電流を0.1μAとすると、静的状
態保持可能時間△tは、
△t=C・△V/i
=10μF×(2.5V−1.5V)/0.1μA
=100sec
と計算される。 For this reason, the backup capacitor shown in Figure 3
In order to back up only the static current of the LSI, C1 is
Capacitor capacity can be made extremely small. In the static state of the LSI, a voltage of 1.5V or higher, which is the lower limit voltage of the static state holding voltage, is applied to the CPU and memory element M in Fig. 4 by the capacitor C1 . The internal state of is maintained. Now, the capacitance of capacitor C 1 is
Assuming that the static current of 10μF and LSi is 0.1μA, the static state holding time △t is calculated as △t=C・△V/i = 10μF×(2.5V-1.5V)/0.1μA = 100sec. Ru.
即ち、コンデンサC1により100seo間の静的状
態の保持が可能となる。この様にしてLSIの静的
状態で再び太陽光に入射光が当たり、V1電圧が
第5図のB点のレベルに達した時、LSI内蔵スイ
ツチのSW1が閉じ、クロツクパルス発生器CGが
動き出し、LSIは動的状態となり、この時LSI内
部の状態はLSIのクロツクパルス発生器CGが停
止する前の状態となつているため、その後の処理
をそのまゝ続行することができる。 In other words, the capacitor C 1 makes it possible to maintain a static state for 100 seo. In this way, when the LSI is in a static state and the sunlight hits the incident light again, and the V1 voltage reaches the level of point B in Figure 5, SW1 of the LSI built-in switch closes and the clock pulse generator CG turns on. The LSI starts to move and enters a dynamic state. At this time, the internal state of the LSI is the same as before the clock pulse generator CG of the LSI stopped, so subsequent processing can be continued as is.
以上説明したように本発明によれば、電池電源
を供給する太陽電池への入射光が一時的に遮断さ
れても、充電されたバツクアツプ用コンデサの充
電電圧が回路素子内の演算制御部や記憶部に供給
されるため静的状態でバツクアツプでき、この場
合クロツクパルス発生器への電源供給を遮断して
いることから、上記コンデンサの量を充分に小さ
くても充分バツクアツプが可能となる。 As explained above, according to the present invention, even if the incident light to the solar cell that supplies the battery power is temporarily cut off, the charging voltage of the charged backup capacitor can be applied to the arithmetic control unit in the circuit element or the memory. In this case, since the power supply to the clock pulse generator is cut off, sufficient backup is possible even if the amount of the capacitor is sufficiently small.
そのため、電子機器を暗黒状態より取り出して
機器を使用する場合においても、コンデサに充電
される時間が非常に短くでよく、機器の使用開始
時間を大幅に短縮できる。 Therefore, even when the electronic device is taken out of the dark and used, the time required to charge the capacitor is very short, and the time it takes to start using the device can be significantly shortened.
第1図及び第2図は従来の太陽電池駆動型機の
保護回路図、第3図は本発明による電池駆動型機
器の一例の保護回路図、第4図はLSI内部システ
ムをブロツク図で示した図、第5図a,bはそれ
ぞれ時間を関数とした電圧V1及び電流I1の特性曲
線図を表わす。
図中、C1……バツクアツプ用コンデンサ、a
……電圧検知回路、CG……クロツクパルス発生
器、Cpu……中央処理装置、M……記憶素子。
Figures 1 and 2 are protection circuit diagrams of a conventional solar battery-powered machine, Figure 3 is a protection circuit diagram of an example of a battery-powered machine according to the present invention, and Figure 4 is a block diagram of the LSI internal system. 5a and 5b respectively represent characteristic curve diagrams of the voltage V 1 and the current I 1 as a function of time. In the diagram, C 1 ... backup capacitor, a
...Voltage detection circuit, CG...Clock pulse generator, CPU...Central processing unit, M...Memory element.
Claims (1)
使用され、 前記電池電源に接続されて電力供給される演算
制御を司どる中央処理装置CPU、記憶素子M、
及びシステムの動作を司どるクロツクパルス発生
器CGを含む回路素子と、 前記電池電源と並列に接続され前記回路素子の
内、中央処理装置CPUと記憶素子Mの動作を保
護するため充電電圧を供給するためのバツクアツ
プコンデンサと、 前記電池電源の電圧が前記回路素子の動作範囲
内にあるか否かを検知する電池電圧検知回路と、 前記電池電圧が回路素子の動作範囲内にあると
き前記電池電圧検知回路の出力に基づいて、前記
回路素子のクロツクパルス発生器CGに電池電源
の供給路を形成してクロツクパルス発生状態にし
動作範囲外にあるとき前記電池電圧検知回路の出
力に基づきクロツクパルス発生器CGへのバツク
アツプコンデンサからの充電電圧の供給路を遮断
してなるスイツチング手段とを備え、 電池電圧の低下時には前記回路素子の内、中央
処理装置CPUと記憶素子Mを前記バツクアツプ
コンデンサからの充電電圧により静的状態に保持
するようにしたことを特徴とする電池駆動型電子
機器の保護回路。[Scope of Claims] 1. A central processing unit CPU, a memory element M, which is used in a device driven by a battery power source of a solar cell, and is connected to the battery power source and is supplied with power, and which manages arithmetic control.
and a circuit element including a clock pulse generator CG that controls the operation of the system; and a circuit element that is connected in parallel with the battery power source and supplies a charging voltage to protect the operation of the central processing unit CPU and the memory element M among the circuit elements. a backup capacitor for detecting the voltage of the battery; a battery voltage detection circuit for detecting whether the voltage of the battery power supply is within the operating range of the circuit element; Based on the output of the detection circuit, a battery power supply path is formed to the clock pulse generator CG of the circuit element to make the clock pulse generation state, and when the voltage is outside the operating range, the battery voltage is supplied to the clock pulse generator CG based on the output of the battery voltage detection circuit. switching means for cutting off the supply path of the charging voltage from the backup capacitor, and when the battery voltage drops, the central processing unit CPU and the memory element M among the circuit elements are switched to the charging voltage from the backup capacitor. A protection circuit for a battery-powered electronic device, characterized in that it is maintained in a static state.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56027387A JPS57142148A (en) | 1981-02-25 | 1981-02-25 | Circuit for protecting battery drive type electronic device |
| US06/352,154 US4434395A (en) | 1981-02-25 | 1982-02-25 | Solar cell power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56027387A JPS57142148A (en) | 1981-02-25 | 1981-02-25 | Circuit for protecting battery drive type electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57142148A JPS57142148A (en) | 1982-09-02 |
| JPH0315410B2 true JPH0315410B2 (en) | 1991-03-01 |
Family
ID=12219638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56027387A Granted JPS57142148A (en) | 1981-02-25 | 1981-02-25 | Circuit for protecting battery drive type electronic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57142148A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6116629U (en) * | 1984-06-28 | 1986-01-30 | 三洋電機株式会社 | Electronics |
| JPS6127441U (en) * | 1984-07-23 | 1986-02-19 | カシオ計算機株式会社 | Power supply control circuit |
| JPS6365714A (en) * | 1986-09-05 | 1988-03-24 | Nec Corp | Semiconductor integrated circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53129556A (en) * | 1977-04-19 | 1978-11-11 | Casio Comput Co Ltd | Clock control system |
-
1981
- 1981-02-25 JP JP56027387A patent/JPS57142148A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57142148A (en) | 1982-09-02 |
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