JPH0316111Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a mode switching circuit for a tape recorder, in which a transistor is turned off when a capacitor is charged, and this transistor is turned on when a capacitor is discharged to generate a mode switching signal that has a certain rise time and a steep fall. It is an object of the present invention to provide a mode switching circuit with a simple circuit configuration and a small number of components.

Dictation recorders generally do not have a button dedicated to play, and to enter play mode (listening mode), turn on the rewind/listening button (hereinafter referred to as the button) for a very short time within the rise time _t1 described below. On the other hand, to enter the rewind mode, turn on this button for the rise time _t1 or more, and turn it off to enter the play mode.

FIG. 1 shows a circuit diagram of an example of a conventional timing setting circuit used in such a dictation recorder. In the same figure, 1 is a terminal to which a mode switching control signal (original signal) a corresponding to the button operation is input, and the original signal a is, for example, as shown in _FIG. This is a signal with an H level and an L level during the off period.

The original signal a is supplied to the transistor 3 via the resistor 2, and for example, during this H level period, the transistor 3
is turned on and transistor 4 is turned off, and substantially the same signal as the original signal is taken out from the collector of transistor 4. 5 and 6 are bias resistances of transistors 3 and 4. The signal taken out from the collector of the transistor 4 is supplied to the capacitor 8 via the resistor 7 and charges it, so that the terminal voltage b of the capacitor 8 rises with a rise time _t1 , as shown in FIG. 2B. and is taken out from the output terminal 9.
When the H level period of the signal a extends beyond the rise time _t1 , the level of the output voltage b becomes equal to or higher than the threshold level l of a C-MOS digital circuit, for example, provided at a stage subsequent to the terminal 9.

Due to the L level of the original signal a, the transistor 3 is turned off and the transistor 4 is turned on, and the electric charge stored in the capacitor C is discharged through the diode 10 and the transistor 4, and the output voltage b becomes steep with no fall time. Become L level.

However, this conventional circuit has transistors 3, 4,
It requires resistors 5 and 6, a buffer amplifier with a power supply +B, a discharge diode 10, etc., and has the drawback that the number of parts is large, and the circuit cannot be constructed in a small size and at low cost.

The present invention eliminates the above-mentioned drawbacks, and an embodiment thereof will be described below with reference to FIGS. 2 and 3.

FIG. 3 shows a circuit diagram of an embodiment of a timing setting circuit for a tape recorder according to the present invention, in which parts having the same functions as those in FIG. 1 are given the same numbers. In the same figure, input terminal 1 is connected to resistors 2 and 7.
It is connected to the output terminal 9 via. 11 is
It is a PNP type transistor, and its base is connected to the connection point of resistor 2 and resistor 7, while resistor 12
Its emitter is connected to the connection point between the resistor 7 and the output terminal 9, and its collector is grounded via the resistor 13.

The original signal a that has entered the input terminal 1 is supplied to the capacitor 8 via the resistors 2 and 7, and charges it. At this time, the transistor 11 is off, and the output voltage b with a rise time t ₁ is taken out from the output terminal 9. When this time _t1 elapses, the output voltage b becomes equal to or higher than the threshold level l, and the C-MOS circuit provided after the output terminal 9 is activated to put the tape recorder into the rewind mode.

When the original signal a goes to the L level due to the button being turned off, the transistor 11 is turned on, and as a result, the electric charge stored in the capacitor 8 is discharged through the transistor 11 and the resistor 13, and the output voltage b changes over the falling time. It suddenly becomes L level. The L level of the output voltage b activates the C-MOS circuit and sets the play mode.

In addition, the rise time while charging capacitor 8
If the button is turned off within t ₁ , the charge in the capacitor 8 is discharged through the transistor 11 and the resistor 13 in the same way as in the above case, so that the tape recorder enters the play mode without entering the rewind mode. .

In this way, this embodiment uses the PNP type transistor 11 to turn off the H level period of the original signal a, and turn it off during the H level period of the original signal a.
Since the configuration is such that the charge in the capacitor 8 is discharged while the level period is on, a bias resistor 12 and a discharge resistor 13 are required, but in the end, compared to the conventional circuit, one transistor, one bias power supply, and one diode are required. Can be omitted.

In addition, when the rise time t ₁ is set to 200 msec, the required circuit time constants are approximately 2 kΩ to 3 kΩ for resistor 2, 22 kΩ for resistor 7, 10 kΩ for resistor 12, 10 Ω for resistor 13,
Select capacitor 8 to be 22μF.

As mentioned above, the mode switching circuit of the tape recorder according to the present invention connects the mode switching control signal input terminal to one end of the capacitor via the resistor, and
The emitter side and collector side of a transistor are connected to both ends of the capacitor, and the base side of the transistor is further connected to the mode switching control signal input terminal, and the capacitor is charged by the mode switching control signal at a predetermined level. to obtain an output signal having a predetermined rise time, and turn on the transistor by a mode switching control signal having a different level from the mode switching control signal for charging the capacitor to charge the capacitor through the transistor. Because the configuration is configured to discharge and obtain an output signal with a steep fall, the buffer amplifier's bias power supply, discharge diode, etc. are required compared to conventional circuits that use a buffer amplifier and discharge the capacitor via the discharge diode and buffer amplifier. It has the advantage that it requires fewer parts than conventional circuits, and that the circuit can be made smaller and cheaper.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of an example of a conventional circuit, Figure 2A,
B is a signal waveform diagram for explaining the operation of the conventional circuit and the circuit of the present invention, and FIG. 3 is a circuit diagram of one embodiment of the circuit of the present invention. 1... Switching original signal input terminal, 7, 12, 13...
...Resistor, 8...Capacitor, 9...Output terminal, 1
1...PNP type transistor.

Claims (1)

[Scope of utility model registration request] The mode switching control signal input terminal is connected to one end of a capacitor via a resistor, the emitter side and the collector side of a transistor are connected to both ends of the capacitor, and the base side of the transistor is connected to the mode switching control signal input terminal. is connected to a mode switching control signal of a predetermined level to charge the capacitor to obtain an output signal having a predetermined rise time; A mode switching circuit for a tape recorder configured to turn on the transistor in response to a mode switching control signal and discharge the capacitor through the transistor to obtain a steeply falling output signal.