JPH03167595A - Video superimposition device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a video superimposing device that superimposes another video screen on a part of one video screen, and in particular, relates to a video superimposing device that superimposes another video screen on a part of one video screen, and in particular, the present invention relates to a video superimposing device that superimposes another video screen on a part of one video screen. The present invention relates to a video superimposing device that can perform

[Conventional technology]

In the field of so-called personal computers (PCs), image processing called picture-in-picture, which displays television images superimposed on computer images, has become popular. In other words, it is interposed between the computer and the computer monitor, takes in a video signal from the outside, especially a general 2:1 interlaced video signal, and displays a screen based on the external video signal on a part of the computer video screen. Video superimposition devices for display are being developed.

[Problem to be solved by the invention]

However, a device designed to prevent field fluctuations, that is, fluctuations due to spatial differences between odd and even fields of a 2:1 interlace video signal, has not yet been developed. The problem of field shaking appears on the screen in the form of blurred edges. Therefore, when the image to be superimposed moves relatively quickly, the human eye is fooled by the movement and the blurring of the outline is not so noticeable, but when the movement of the screen is stationary or changes slowly. I find it bothersome in some cases.

An object of the present invention is to solve these problems.

[Means to solve the problem]

In order to solve the above problems, the video superimposition device of the present invention has the following features:
RGB of the first video signal which is a 2:1 interlaced signal
An A/D conversion means for quantizing a luminance signal and converting it into a digital RGB luminance signal, a video storage means for storing the digital RGB luminance signal, and an analog version of the digital RGB luminance signal read from the video storage means. D/A converting means; mixing means for partially replacing the RGB luminance signal of the second video signal with the RGB luminance signal from the D/A converting means; a control means for controlling each of the means based on a command indicating how to insert a screen based on an RGB luminance signal from the means, the control means controlling writing of the first video signal to the video storage means; This is performed on a field-by-field basis, and some are equipped with field selection means that allows writing only in either odd-numbered or even-numbered fields during this write control.

[Effect]

Since the video storage means stores only one field (either an odd or even field) of the first video signal, the video read from this and superimposed on the screen by the second video signal is one field. made only by

Therefore, even if the first video signal is a still video or a very slowly moving video, field shaking does not appear in the superimposed first video on the screen.

〔Example〕

FIG. 1 is a block diagram of a video superimposing device according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the connection relationship between the video superimposing device, a personal computer, and a personal computer monitor.

The video superimposition device 1 receives a personal computer video signal 3 (RGB luminance signal and vertical/horizontal synchronization signal) coming from a personal computer 2 and an NT video signal coming from a video input terminal 4.
The SC composite video signal 5 is input. Then, the video superimposing device 1 synthesizes these two video signals and outputs a video signal 8, in which the screen 7 of the NTSC composite video signal 5 is inserted into the screen 6 of the PC video signal 3, to the computer monitor 9. How the screen 7 is inserted into the screen 6 is determined based on a command 10 from the personal computer 2.

The NTSC composite video signal 5 is applied to the video input terminal 4 from a TV tuner, video deck, etc. (not shown).

Next, the internal configuration of the video superimposing device 1 will be explained.

The video signal decoder 21 receives the NTS from the video input terminal 4.
A C composite video signal is input, and RGB luminance signals and horizontal and vertical synchronization signals are extracted from this video signal. The A/D converter (ADC) 22 quantizes the RGB luminance signal 23 arriving from the video signal decoder 21 at the timing of the clock signal CKAD from the digitizing control section 24, and converts it into a digital RGB luminance signal 25. The video memory 26 is 9
It has a structure of 60 rows x 306 columns x 4 bits, and this is provided for each color of R and GSB.

The digitizing control section 24 sends a clock signal C to the ADC 22.
At the same time as outputting KAD, writing aI to the video memory 26
Outputs the signal WETV. The clock signal CKAD is a signal synchronized with the horizontal synchronization signal from the video signal decoder 21, and is 1 of the period (for example, 63.5 μs) of the horizontal synchronization signal.
/N (N is a positive integer). Write control signal W
ETV is a signal that allows writing of the digital RGB luminance signal 25 coming from the ADC 22. The specific form of the write control signal WETV varies depending on the specifications of the video memory 26, but it is generally a set of a plurality of control signals. For example, a signal that specifies or advances a pixel address on the screen of the video memory 26, a control signal that allows writing in pixel units on the screen of the video memory 26, and a control signal that allows writing only to a desired area on the screen of the video memory 26. A control signal for permitting writing only in a desired area in the horizontal direction on the screen of the NTSC composite video signal 5, a control signal for permitting writing only in a desired area in the vertical direction, and the like. These control signals are all sent to the digitizing control section 2.
It is generated by counting the write basic synchronization signals generated within the device 4 and changing the signal level when the count result reaches a set value. These set values can be adjusted based on instructions from the personal computer 2. By appropriately selecting these setting values, it becomes possible to arbitrarily specify resolution, aspect ratio, etc. Further, the count for creating each control signal is reset for each vertical synchronization signal of the NTSC composite video signal 5. Therefore, writing of a 2:1 interlaced video signal such as the NTSC composite video signal 5 in which a vertical synchronization signal is inserted for each field is performed in units of fields.

The field selection means 27 is a means for dividing the frequency of the vertical synchronization signal arriving from the video signal decoder 21 into half and applying it to the digitizing control section 24 .

The field selection means 27 is a flip-flop circuit 2
8. Consists of two gate circuits and a changeover switch 30. pretend. The Q output terminal of the flop circuit 28 is connected to the D input terminal, and together with the negative logic AND gate circuit 29, constitutes a 1/2 frequency divider. FIG. 3 is a timing chart showing the operation of this field selection means 27. In the same figure (A), the video signal decoder 21
shows the vertical synchronization signal from This vertical synchronization signal is input to the clock terminal CK of the flip-flop circuit 28. FIG. 2B shows the output signal of the flip-flop circuit 28. 100 output signal is negative logic AND gate circuit 2
At step 9, the vertical synchronizing signal and the negative logic are ANDed. Same figure (
C) shows the output signal of the negative logic AND gate circuit 29,
This output signal is the vertical synchronization signal divided by 1/2. The changeover switch 30 selectively outputs either the output signal of the AND gate circuit 29 or the vertical synchronization signal from the video signal decoder 21 based on a command from the personal computer 2 .

The superimpose control unit 31 controls the successive display of the video stored in the video memory 26. The superimpose control unit 31 sends out a series of control signals to the video memory 26 based on the conditions instructed by the personal computer 2, and sends a clock signal C to the D/A converter (DAC) 31.
KDA and a superimpose permission signal to the mixing control unit 33.

The read control signal is a digital RGB signal from the video memory 26.
This is a signal that controls reading of the luminance signal. The specific form of the successive control signal varies depending on the specifications of the video memory 26, similar to the write control signal WETV, but it is usually a set of a plurality of control signals.

For example, a signal that specifies or increments a pixel address for reading on the screen of the video memory 26, a control signal that permits reading in pixel units, and a control signal that permits reading of only a desired area in the horizontal direction (line) of the screen. It also includes a control signal and a control signal for permitting reading of only a desired area in the vertical direction. These control signals are all sent to the superimpose control section 31.
It counts successive basic synchronization signals created internally, and is created based on whether the counted value reaches a set value set for each control signal. These set values can be adjusted based on instructions from the personal computer 2. Here, as in the case of writing, by appropriately selecting these setting values, it is possible to specify the resolution, aspect ratio, etc. as desired. In addition,
The continuous basic synchronization signal is synchronized with the horizontal synchronization signal of the PC video signal 3, and the count for creating each control signal is reset every time the vertical synchronization signal of the PC video signal 3 is received.

The DAC 32 samples the digital RGB luminance signal 40 read from the video memory 26 at the timing of the clock signal CADA and converts it into an analog RGB luminance signal 41.

The video switch 34 is switching-controlled based on a switching control signal output from the mixing control section 33, and the DA
The analog RGB luminance signal output from the C 32 is superimposed on the RGB luminance signal of the PC video signal 3 arriving from the input terminal 35, and output as a new RGB luminance signal.

The mixing control section 33 includes a superimpose control section 3
On condition that the superimpose permission signal 42 from 1 is input, a switching control signal 43 for executing mixing is output to the video switch 34. Therefore, video memory 2
If the superimpose permission signal is not output from the superimpose control unit 31 because no image has been read out from the personal computer 6, even if the timing for outputting the switching control signal based on the mixing command from the personal computer 2 has arrived. However, the switching control signal 43 is not output and mixing is not performed. Thereby, it is possible to prevent an invalid area without information from occurring on the screen. The brightness level signal generation circuit 36 inputs the RGB brightness signals of the PC video signal 3, and generates a brightness level signal by combining the R, G, and B signal levels. The brightness level signal is compared with a reference voltage V' in a comparator 37. By setting the reference voltage Vr to an appropriate value, the comparator 37 is activated only when an RGB luminance signal having a high luminance level is input to the input terminal 35.
output can be changed. Mixing control section 3
3 can temporarily stop the mixing at the video switch 34 by this change. As a result, as described above 1: the screen 7 of the N T S C composite video signal 5
Only the characters on the screen 6 of the computer video signal 3 can be inserted into the . Whether or not to perform this mixing stop operation is determined based on a command from the personal computer 2 to the mixing control section 33.

The video signal output terminal 38 is connected to the R from the video switch 34.
This terminal outputs the GB luminance signal 44 and the horizontal/vertical synchronization signal from the video signal input terminal 35, and the video signal 8 (RGB luminance signal and synchronization signal) from this output terminal 38 is given to the computer monitor 9. .

Next, the overall operation of the video superimposing device of this embodiment will be explained.

It is assumed that the movable contact 30a of the changeover switch 30 in the field selection means 27 is connected to the fixed contact 30b based on a command from the personal computer 2. NTSC composite video signal 5 extracted by video signal decoder 21
Since the Q output of the flip-flop circuit 28 is at low level at this point, the vertical synchronizing signal (waveform a in FIG. 3) is
The signal passes through the negative logic AND gate circuit 29 and is input to the digitizing control section 24 . The digitizing control unit 24 is reset by this vertical synchronization signal, and then the clock signal CK
Outputs AD and write selection signal WETV. The video signal decoder 21 extracts the vertical synchronization signal shown by waveform a in FIG. 3, and then extracts the horizontal synchronization signal and the RGB luminance signal 23 from the subsequently inputted NTSC composite video signal 5. The RGB luminance signal 23 is converted into digital RG by the ADC 22.
It is converted into a B luminance signal 25, and the video data of a designated area in one field (odd field) corresponding to the vertical synchronization signal is stored in the video memory 26.

RGB for one field in the video signal decoder 21
When the extraction of the luminance signal is completed, the vertical synchronization signal (third
Waveform b) in the figure is extracted and input to the field selection means 27. At this time, since the output of the flip-flop circuit 28 is at a high level due to the previous vertical synchronization signal, the vertical synchronization signal cannot pass through the negative logic AND gate circuit 29 and is sent to the digitizing control section 24. is not done manually. Therefore, the digitizing control section 24 is not reset, and even field video signals that are subsequently input to the video signal decoder 21 are not written into the video memory 26. During this time, the odd field remains held in the video memory 26.

Even field RGB in the video signal decoder 21
When the extraction of the luminance signal is completed, the vertical synchronization signal (waveform C in FIG. 3) corresponding to the odd field of the next frame is extracted. This vertical synchronization signal is applied to flip-flop 2
Since the Q output of No. 8 is at a low level, it passes through the AND gate circuit 29 and is applied to the digitizing control section 24. The digitizing control section 24 is reset by this vertical synchronization signal, and then outputs a predetermined clock signal CKAD and a write selection signal WETV. After the video signal decoder 21 extracts the vertical synchronization signal shown by waveform C in FIG. 3, it subsequently extracts the horizontal synchronization signal and the RGB luminance signal 23. The RGB luminance signal 23 is converted into digital RG by the ADC 22.
It is converted into a B luminance signal 25, and the video data of the specified area in the odd field is stored in the video memory 26.

In this way, the vertical synchronizing signal is frequency-divided by 1/2 in the field selection means 27 and is supplied to the digitizing control section 24, so that even fields are thinned out and odd fields are always written in the video memory 26.

In this operation description, only odd fields are stored one after another in the video memory 26, but only even fields can be stored by opening and closing the AND gate circuit 29 using the Q output of the flip-flop circuit 28. .

In addition, the movable contact 30a of the changeover switch 30 is replaced with the fixed contact 3.
If it is set to 0c, the vertical synchronization signal is sent to the field selection means 27.
Since the field is simply passed through, no field thinning is performed, and both odd and even fields are written into the video memory 26. The selection of the changeover switch 30 is made by the user via the personal computer 2.

Reading from the video memory 26 is performed by the superimpose control section 31. This readout is performed independently of the above-mentioned write operation, and the read digital RGB luminance signal is converted into an analog RGB luminance signal by the DAC 32, and the video switch 34 converts the readout digital RGB luminance signal into an analog RGB luminance signal by the computer under the control of the mixing control section 33. It is superimposed on the video signal 3.

Therefore, the movable contact 30a of the changeover switch 30 is
If it is tilted to the b side, the superimposed image in the video signal obtained from the output terminal 38 will be only one of the odd or even fields.

〔Effect of the invention〕

As explained above, according to the video superimposing device of the present invention, a video based on a 2:1 interlaced video signal that is superimposed on a part of the main video can be created using only either odd or even fields. Therefore, field shaking does not occur. Therefore, even if the motion of the superimposed image is stationary or slowly changing, the outline will not become blurred.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an application example of this embodiment, and FIG. 3 is a waveform diagram showing the operation of the field selection means in the embodiment. DESCRIPTION OF SYMBOLS 1... Video superimposition device, 2... Personal computer, 3... Personal computer video signal, 5... NTSC composite video signal, 9... Personal computer monitor, 21... Video signal decoder, 22... - ADC, 24... Digitization control unit, 26... Video memory, 27... Field selection means, 30... Changeover switch, 31... Superimpose control unit, 32... DAC, 33 ...Mixing control section, 34...Video switch, 35...
-Video input terminal, 38...Video output terminal.

Claims (1)

[Claims] RGB of the first video signal which is a 2:1 interlaced signal
A/D conversion means for quantizing the luminance signal and converting it into a digital RGB luminance signal; video storage means for storing the digital RGB luminance signal from the A/D conversion means; and digital data read from the video storage means. D/A converting means for converting the RGB luminance signal into analog; mixing means for partially replacing the RGB luminance signal of the second video signal with the RGB luminance signal from the D/A converting means; and a screen based on the first video signal. and a control means for controlling each of the means based on a command indicating how to insert a screen based on the RGB luminance signal from the D/A conversion means, the control means comprising: The writing control of the first video signal to the video storage means is performed on a field-by-field basis, and some devices are equipped with field selection means that allows writing only to either odd-numbered or even-numbered fields during this writing control. A video superimposition device.