JPH0317839U - - Google Patents
Info
- Publication number
- JPH0317839U JPH0317839U JP7819289U JP7819289U JPH0317839U JP H0317839 U JPH0317839 U JP H0317839U JP 7819289 U JP7819289 U JP 7819289U JP 7819289 U JP7819289 U JP 7819289U JP H0317839 U JPH0317839 U JP H0317839U
- Authority
- JP
- Japan
- Prior art keywords
- program
- control circuit
- detection timer
- emergency control
- control unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 6
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図は、本考案の一実施例を示すブロツク図
である。
１０…緊急制御回路、１１…障害検出タイマ、
１２…プログラムトレース、２０…中央制御回路
、２１…バス結合回路、３０…障害検出タイマリ
セツト信号、３１…障害検出タイマオーバフロー
信号、３２…アドレスバス、３３…データバス、
３４…コントロールバス。
FIG. 1 is a block diagram showing one embodiment of the present invention. 10...Emergency control circuit, 11...Fault detection timer,
DESCRIPTION OF SYMBOLS 12... Program trace, 20... Central control circuit, 21... Bus coupling circuit, 30... Fault detection timer reset signal, 31... Fault detection timer overflow signal, 32... Address bus, 33... Data bus,
34...Control bus.
Claims (1)
期的にリセツトされる障害検出タイマを有し、プ
ログラム障害時に前記障害検出タイマのオーバフ
ロー出力により前記中央制御装置をリセツトさせ
る緊急制御回路において、常に更新することによ
つて最新の一定量のプログラム走行履歴を記憶し
、前記障害検出タイマのオーバフロー出力により
前記記憶の更新を停止し、外部装置による前記記
憶内容の読み出しを可能とするプログラムトレー
ス回路を備えることを特徴とするプログラムトレ
ース機能付き緊急制御回路。 The emergency control circuit has a failure detection timer connected to the central control unit and is reset periodically by a program, and is constantly updated in an emergency control circuit that resets the central control unit by an overflow output of the failure detection timer in the event of a program failure. Therefore, the present invention is characterized by comprising a program trace circuit that stores a certain amount of the latest program running history, stops updating of the memory upon overflow output of the fault detection timer, and enables an external device to read the stored contents. Emergency control circuit with program trace function.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7819289U JPH0317839U (en) | 1989-06-30 | 1989-06-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7819289U JPH0317839U (en) | 1989-06-30 | 1989-06-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0317839U true JPH0317839U (en) | 1991-02-21 |
Family
ID=31621248
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7819289U Pending JPH0317839U (en) | 1989-06-30 | 1989-06-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0317839U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0636600U (en) * | 1992-10-13 | 1994-05-17 | 株式会社白興商会 | Wrapping device |
-
1989
- 1989-06-30 JP JP7819289U patent/JPH0317839U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0636600U (en) * | 1992-10-13 | 1994-05-17 | 株式会社白興商会 | Wrapping device |
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