JPH03181173A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve productivity by forming a trench on a semiconductor substrate, burying back semiconductor and obtaining a second conductivity type high concentration region. CONSTITUTION:An n<+> type region 11 on the lower surface of a semiconductor substrate 10 is so covered with resist 12 as to expose a plurality of positions at a predetermined interval, and etched to form a trench 13. A p-type impurity- doped polysilicon 14 is deposited on the lower surface of the substrate 10 by a crude film technique such as CVD, etc. The lower surface of the substrate 10 is coated with resist having high flattening properties, and etched to be flattened until the surface of the region 11 is exposed under condition having no selection ratio of resist to polysilicon. The polysilicon 14 remaining in the trench 13 becomes a p<+> type region as a second conductivity type high concentration region. A metal electrode layer 15 is formed on the entire lower surface of the flattened substrate 10 by sputtering, etc. Thus, its productivity can be improved.

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention provides a first conductivity type high concentration region and a second conductivity type high concentration region on one side of a semiconductor substrate of the first conductivity type in the thickness direction of the substrate. are provided adjacent to each other in a direction orthogonal to the semiconductor substrate, and a metal electrode is deposited on one surface of the semiconductor substrate so as to straddle both regions to electrically short-circuit both regions (
The present invention relates to a method of manufacturing a semiconductor device having a so-called short emitter structure, and particularly relates to an improvement in a method of forming a second conductivity type high concentration region.

[Conventional technology]

2. Description of the Related Art Conventionally, a GTO thyristor, for example, has been known as a semiconductor device having a short emitter structure. This type of short emitter structure is shown in FIG. 3 and will be explained.

In the figure, numeral 2 denotes a semiconductor substrate such as an n-type silicon substrate, and 2 denotes a plurality of n-type regions 3 formed at predetermined intervals in a direction perpendicular to the substrate thickness direction on the lower surface side of the semiconductor substrate 1. A plurality of p° type regions 4 formed between each of the n type regions on the lower surface side of the substrate 1 are connected to the n type regions and the p type region w43 on the lower surface of the semiconductor substrate l.
A metal electrode is deposited over the surfaces of the and.

Note that both the n° type region 2 and the p′ type region 3 are formed by diffusion of impurities into the semiconductor substrate l.

In this short emitter structure, when a forward voltage is applied between the p9 type region 3 and the n-type semiconductor substrate l, the voltage exceeds a certain value (approximately 0.6 V in the case of a silicon diode at room temperature). It is known that the current suddenly starts to flow. Note that this current increases exponentially with respect to voltage.

By the way, in order to properly inject carriers from the p-type region 3 to the semiconductor substrate l side and easily generate the above voltage, the depth of the p-type region 3 into the inside of the semiconductor substrate 1 is adjusted. It is considered that the depth of the n-type region 2 is set deeper than the depth of the n-type region 2, or that the p-type region 3 is set wider.

[Problem to be solved by the invention]

In the above-mentioned short emitter structure, when the p-type region 3 is made deep or wide as described above in order to perform an appropriate operation, conventionally, the p-type region 3 is obtained by a diffusion method. Therefore, the diffusion process must be carried out at high temperature for a long time, which not only reduces production efficiency but also poses a risk of thermal strain occurring in the semiconductor substrate l. Further, since the formation is performed by diffusion, there are problems in terms of accuracy, such as the shape of the p1 type region 3 that is actually formed being unpredictable and varying. Furthermore, in relation to this, the p0 type region 3 and the n° type region 2 overlap to form a portion (not shown) that is neither p type nor n type, so that the effective anode area is reduced. Inconveniences have also been pointed out, such as a decrease in the amount of injection and a decrease in injection efficacy.

The present invention was devised in view of the above circumstances, and its main purpose is to enable a structure that operates properly to be manufactured using a simple method.

[Means to solve the problem]

In order to achieve such an object, the present invention provides a structure in which a high-density region of a first conductivity type and a high concentration region of a second conductivity type are perpendicular to the thickness direction of the substrate on one side of a semiconductor substrate of the first conductivity type. In the method of manufacturing a semiconductor device, the semiconductor device has a structure in which the metal electrodes are provided adjacent to each other in the direction of the semiconductor substrate, and a metal electrode is deposited on one surface of the semiconductor substrate so as to straddle both the regions, thereby electrically shorting the two regions. It has the following structure.

The method for manufacturing a semiconductor device of the present invention includes the steps of: forming a trench at a position where the second conductivity type high concentration region is planned to be formed in the semiconductor substrate; and burying the second conductivity type high concentration semiconductor in the trench. It is characterized by being formed by a process.

[Effect]

That is, the depth and size of the second conductivity type high concentration region are determined by the depth and size of the trench. Managing the depth and width of this trench is easier and more accurate than managing the depth and spread of diffusion. and,
Since the second conductivity type high concentration region is obtained by filling the trench with the second conductivity type high concentration semiconductor, the shape of the region is not distorted.

Therefore, unlike the diffusion method, the semiconductor substrate is not exposed to a high-temperature atmosphere for a long time, so the first conductivity type high concentration region and the second conductivity type high concentration region formed on the semiconductor substrate are clearly separated, and overlapping There is no need for wrapping, and the quality of the semiconductor substrate remains stable.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail based on the drawings.

An embodiment of the present invention is shown in FIG. 1 fat to tel.

First, by diffusing an n-type impurity such as phosphorus over the entire lower surface of a semiconductor substrate 10 such as an n-type silicon substrate, which is a first conductivity type, an n-type region 11 as a first conductivity type high concentration region is formed. [See Figure 1 (al)].

Next, in the n-type region 11 on the lower surface of the semiconductor substrate 10, as shown in FIG. The resist 12 is then deposited and etched using the resist 12 as a mask to form trenches 13 of a predetermined depth at the plurality of exposed locations (see FIG. 1 fc). The depth dimension of this trench 13 is
The trench 13, which is set to be deeper than one diffusion depth, can also be formed by a dry etching technique such as reactive anisotropic etching.

The polysilicon 1 doped with p-type impurities is placed on the bottom surface of the semiconductor substrate 1O, which is uneven due to the trenches 13.
4 is deposited by a biofilm technique such as CVD [see Figure 1 fdl]. Since the portion above the trench 13 in the deposited polysilicon 14 is depressed, a material with good flatness, such as a resist, is applied to the lower surface of the semiconductor substrate 10, and an n
Etching is performed until the surface of the °-shaped region 11 is exposed, thereby flattening it. The polysilicon 14 remaining in the trench 13 becomes a p-type region as a second conductivity type high concentration region.

Thereafter, as shown in FIG. 1(e), a metal electrode jit 15 is formed on the entire lower surface of the planarized semiconductor substrate IO by sputtering or the like.

Furthermore, the present invention is not limited to the above embodiments, and the steps for forming the trenches 13 and polysilicon 14 may be n.

It is also possible to perform the step before the step of forming the mold region 11. The embodiment in this case is illustrated in FIGS. 2(a-1), in which the same reference numerals as in FIG. 1 refer to the same parts.

First, as shown in FIG. 2 (al), a resist 12 is deposited on the lower surface of the semiconductor substrate 10 so as to expose positions at predetermined intervals in a direction perpendicular to the substrate thickness direction, and the resist 12 is used as a mask for etching. By doing this, trenches 13 of a predetermined depth are formed in the plurality of exposed locations.
[See Figure 2(b)].

Next, polysilicon 14 doped with a p-type impurity is placed on the bottom surface of the semiconductor substrate 10 which is uneven due to the trenches 13.
is deposited using biofilm technology such as CVD [Figure 2 (
C1], trench 1 is formed in this polysilicon 14.
3 is depressed, the semiconductor substrate 10
It is planarized by etching until the surface of the n-type region 11 on the lower surface of the substrate is exposed.

Then, on the lower surface of the semiconductor substrate 10, polysilicon 1
For example, a silicon oxide film 16 is deposited only on the surface of the semiconductor substrate 1o, and the exposed portion of the lower surface of the semiconductor substrate 1o is
By diffusing type impurities, n-type region II is obtained [see FIG. 2 (d+)].

Thereafter, as shown in FIG. 2, a metal electrode 15 is formed on the entire back surface of the semiconductor substrate 1° by sputtering or the like.

[Effects of the Invention] As explained above, according to the present invention, a trench is formed in a semiconductor substrate and a semiconductor is buried therein to obtain a high concentration region of the second conductivity type. The depth and size of the two-conductivity type high concentration region can be easily controlled compared to the conventional diffusion method, and the adjacent first and second conductivity type high concentration regions can be easily controlled. The shape accuracy of the second conductivity type high concentration region becomes high. Furthermore, since the semiconductor substrate is not exposed to a high-temperature atmosphere for a long period of time as in the conventional method, productivity can be improved and there is an effect that no thermal distortion occurs in the semiconductor substrate.

[Brief explanation of drawings]

FIG. 1 Tal to tel are process diagrams used to explain the manufacturing method according to an embodiment of the present invention, and FIG. 2 (al to tel
FIG. 1 is a process diagram used to explain a manufacturing method according to another embodiment of the present invention. Moreover, FIG. 3 is a sectional view schematically showing a short emitter structure according to a conventional example. lO...Semiconductor substrate, 11...n-type region 1
3... Trench, 14... P4 type region, 15
...Metal electrode.

Claims (1)

[Claims] (1) A first conductivity type high concentration region and a second conductivity type high concentration region are provided adjacent to each other in a direction orthogonal to the thickness direction of the substrate on one surface side of a semiconductor substrate of a first conductivity type, and
In the method for manufacturing a semiconductor device having a structure in which a metal electrode is deposited on one surface of the semiconductor substrate so as to span both regions, and the two regions are electrically short-circuited, the second conductivity type high concentration region is 1. A method of manufacturing a semiconductor device, comprising: forming a trench at a planned formation position in a semiconductor substrate; and embedding the second conductivity type high concentration semiconductor into the trench.