JPH0318132A - Fm multiplex receiver - Google Patents

Abstract

PURPOSE:To improve the demodulation quality of a multiplex program by providing a 1st and a 2nd multiplex signal demodulator and selecting and outputting one demodulation output according to the multiplex signal demodulation states of the demodulators. CONSTITUTION:A frame code pattern detecting circuit 40 detects a frame code which has a certain constant value in FM-multiplex signal data. A front protection counter 42 counts how many times the position of a frame code in the FM-multiplex signal data is dissident from the position of a frame code predicted on a reception side which is outputted from a frame counter 41 and makes a step-out decision when the counted value exceeds a set value. Further, a rear protection counter 43 counts how many times the position of the frame code in the FM-multiplex signal data is coincident with the position of the frame code predicted on the reception side which is outputted by the counter 41 and decides the synchronism of the frame code when the counted value exceeds the set value. When this step-out occurs to a demodulating circuit 20, the demodulation output of the circuit 21 is selected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an FM multiplex receiver, and more particularly to an improvement for improving the demodulation quality of multiplexed programs.

[Summary of the Invention] A diversity type FM multiplex receiver is provided with first and second multiplex signal demodulators, and one of the demodulated outputs is selected depending on the multiplex signal demodulation status in each demodulator. This output improves the demodulation quality of multiplexed programs.

[Prior Art] With a vehicle-mounted FM receiver, it is difficult to always receive FM broadcasts in a stable state due to multipath interference and the like.

Therefore, in recent years, spatial diversity systems have been adopted in vehicle-mounted FM receivers in order to improve reception quality. As shown in Fig. 2, this has two sets of antennas 1, 2, front ends 3, 4, and a circuit system 7, 8 consisting of an IF amplifier/FM detector 5.6, and an input signal output from the FM detector. In this system, a switching control circuit 9 compares signal meter voltages (SE, S2) representing electric field levels, and a switch 10 selects a circuit system that outputs a higher signal meter voltage.
In FIG. 1, 11 is a stereo demodulation circuit, l2 is a multiple signal demodulation circuit, and 13, 14 and l5 are audio amplifiers.
16, 17 and 18 are speakers.

[Problem to be solved by the invention] However. When receiving FM multiplex broadcasts and demodulating multiplex programs, there remains a problem in selecting the above two circuit blocks based only on the input electric field level. This is despite the fact that the parameter called input electric field level is indirectly used to judge the reception quality of multiplexed programs.

In FM multiplex broadcasting, the multiplexed program is a QPSK modulated digital signal. The conventional method has the drawback that the selection of the above two circuit systems based on the presence or absence of errors in the digital signal or the frequency of occurrence can only be determined in the form of estimation.

[Object of the Invention] Accordingly, an object of the present invention is to provide a receiver capable of improving the quality of demodulated signals of multiplexed programs when receiving FM multiplexed broadcasts. [Means for Solving the Problems] In order to achieve the above object, the present invention includes a first receiving system that detects a received input signal from a first antenna, and a first receiving system that detects a received input signal from a second antenna. and a stereo demodulator that selectively sends the output of one of the receiving systems to the stereo demodulator according to the reception situation by the first reception system and the reception situation by the second reception system. a first multiplex signal demodulator that demodulates the multiplexed signal output from the first receiving system; and a second multiplexed signal demodulator that demodulates the multiplexed signal output from the second receiving system. and a second switch that selectively outputs either of the outputs of the multiplex signal demodulators according to the multiplex signal demodulation status of each of the multiplex signal demodulators. [Operation] The demodulation status of the multiplexed signal from the first and second receiving systems is compared, and which multiplexed signal demodulation output is selected according to the demodulation status, so the demodulation quality of the multiplexed program is improved. .

[Examples] The present invention will be described below with reference to examples shown in the drawings. FIG. 1 shows an embodiment of an FM multiplex receiver according to the present invention.

In the same figure, the same symbols as in FIG. 2 represent the same or similar circuits, and the structures different from those in FIG. 2 or the receiving circuit systems 7, 8
multiplex signal demodulation circuits 20, 21 . It is equipped with a switching control circuit 22 and a switch 23. The switching control circuit 22 compares the demodulation conditions in the multiplex signal demodulation circuits 20 and 21, and switches the switch 2 according to the demodulation conditions.
3 to select the demodulated output of either circuit 20 or 21. FIG. 3 shows an example of the structure of the demodulation circuit section of the FM multiplex signal demodulation circuit. In the same figure, 3o is a bandpass filter;
1 is a QPS Katli device, 32 is a Gray code/differential decoding processing circuit, 33 is a parallel/serial conversion circuit,
34 is a frame code detection circuit, 35 is a clock output circuit, and 36 is a various code processing circuit. In the figure, the input signal is an FM-detected composite signal, and from this signal, a bandpass filter 30
A certain portion of the multiplexed signal is extracted by QPSKfji modulator 31.
Demodulate with . The QPSK demodulated output is subjected to signal processing in a Gray code/differential decoding processing circuit 32, and then converted from a parallel signal to a serial signal in a parallel/serial conversion circuit 33.

The parallel-to-serial converted signal is processed by a frame code detection circuit 34 to detect the frame code added to the beginning of each frame to distinguish multiplexed signals for each frame, and then processed by various code processing circuits 36 to convert it into an analog signal. An audio signal is output.

A clock signal for controlling each of these series of circuit blocks is extracted by a clock extraction circuit 35 from the QPSK demodulated signal.

Figure 4 shows the 6-day FM multiplex signal data structure. One frame consists of 9282 bits, and an 18-bit frame code is added to the beginning of each frame. On the receiving side, this frame code 18 bit (preset to a certain value) is detected, and the information bit 9 following the frame code is detected.
The 264 bits are subjected to various code processing in the circuit section shown in Figure 3 to generate an analog audio signal. Figure 5 shows an example of the configuration of a frame synchronization circuit included in an FM multiplex signal demodulation circuit. In the figure, 40 is a frame code pattern detection circuit, 41 is a frame counter, and 4 is a frame code pattern detection circuit.
2 is a forward protection counter, 43 is a rear protection counter, 44
is a flip-flop, AND■~AND is an AND circuit, OR is an OR circuit, and INV1 is an inverter. In FIG. 5, the frame code pattern detection circuit 40
Detects a frame code that takes a certain value in FM multiplex signal data. The forward protection counter 42
Counts the number of times when the position of the frame code in the multiplexed signal data and the position of the frame code output from the frame counter 4l and predicted on the receiving side do not match,
If this count value exceeds a set value (can be set arbitrarily), it is determined that the frame code is out of synchronization. This allows control to prevent frame synchronization from being performed again in the event that an error occurs in the frame code itself. The rear protection counter 43 is . The number of times the position of the frame code in the FM multiplex signal data matches the position of the frame code predicted on the receiving side output from the frame counter 41 is counted, and this count value is set as the set value (
(can be set arbitrarily), it is determined that the frame code is synchronized. As a result, even if a signal other than the original frame code coincidentally matches the frame code pattern due to an error, it will not be judged as frame synchronization and malfunctions can be avoided.
The outputs of the counters 42 and 43 are applied to the set terminal S and the reset terminal R of the flip-flop, respectively, and out-of-synchronization and normal synchronization signals are output from the Q and Q output terminals, respectively.

The frame counter 4l counts 9282 bits for one frame, and is used to predict the position of a frame code. Figure 6 is a flowchart of the operation of the frame synchronization circuit shown in Figure 5. FIG. 7 shows an example of the structure of the switching control circuit 22 in the above embodiment. In the same figure. INV, is inverter, AN
D4 is an AND circuit, and the AND circuit AND. The frame synchronization signal SY1 representing the demodulation status of the multiplexed signal of the multiplexed signal demodulation circuit 20 is applied to one input of the AND. The other input of the inverter INV receives the frame synchronization signal SY from the multiplex signal demodulation circuit 21.
It is designed to be applied via the AND circuit AN
D. The switch 23 is controlled by the output C of the . The operation table for switching control in Figure 7 is shown below. In the above table, frame synchronization loss signals SY1 and SY2 are assumed to be out of synchronization when they are at H level, and normal when they are at L level. As is clear from the table above, when frame synchronization occurs in the multiplex signal demodulation circuit 20, other circuits 21
If the occurrence occurs in the system of circuit 21, the demodulation output of circuit 20 is selected, and if both occur or do not occur in circuits 20 and 21, the demodulation output of circuit 20 is selected. [Effects of the Invention] As explained above, according to the present invention, when receiving FM multiplex broadcasting using the spatial diversity method, demodulated output is selectively obtained depending on the reception status of the multiplexed program. The demodulation quality can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of a conventional FM multiplex receiver, FIG. 3 is a block diagram showing an example of the configuration of a demodulation section of a multiplex signal demodulation circuit, 4 is a diagram showing the structure of FM multiplex signal data, FIG. 5 is a block diagram showing an example of the configuration of a frame synchronization circuit included in the multiplex signal demodulation circuit, FIG. 6 is a flowchart for explaining the operation of this frame synchronization circuit, and FIG. FIG. 7 is a block diagram showing an example of the configuration of the switching control circuit of the above embodiment. 20, 21...Multiple signal demodulation circuit, 22
......Switching control circuit, 23...
··switch.

Claims (1)

[Claims] A first receiving system that detects a received input signal from a first antenna; a second receiving system that detects a received input signal from a second antenna; a stereo demodulator; a first switch for selectively supplying the stereo demodulator with the output of one of the receiving systems according to the receiving situation of the first receiving system and the receiving situation of the second receiving system; a first multiplex signal demodulator that demodulates the multiplex signal output from the system; a second multiple signal demodulator that demodulates the multiplex signal output from the second receiving system; and multiplex signal demodulation status of each of the multiplex signal demodulators. an FM multiplex receiver, comprising: a second switch that selectively outputs either of the outputs of the multiplex signal demodulators according to the second switch;