JPH03185765A - Photoelectric conversion element - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a charging conversion element, and more particularly to improving the current characteristics and optical response speed of the charging conversion element.

[Prior Art] As a charging conversion element, for example, a photo sensor used in an image reading device in an image information processing device such as a facsimile, a digital copying machine, and an image reader is known. Particularly in recent years, sensors in which photosensors are arranged one-dimensionally to form a long line sensor have been frequently used.

Conventionally, thin film semiconductors such as amorphous silicon (hereinafter referred to as a-Si:H) are generally used for photosensors. Furthermore, photosensors using thin film semiconductors are roughly divided into two types: photodiode type and photoconductive type.

A photodiode type photosensor obtains a photocurrent by causing electrons and holes generated by incident light to reach each electrode by a reverse bias applied between the electrodes. However, this photosensor had a problem in that the amount of current was too small.

On the other hand, in photoconductive photosensors, electrons or holes can be injected from the electrode, so the density of electrons or holes in the semiconductor can be made sufficiently high.
Therefore, compared to a photodiode type photosensor, a much larger output current (secondary photocurrent) can be obtained.

FIG. 14 is a diagram showing a schematic configuration of a conventional photoconductive sensor.

In the figure, 41 is an insulating substrate made of glass or ceramics, etc., 42 is a photoconductive semiconductor layer made of Cd5-3e, a-3t:H, etc., and 43 and 43゛ are doped semiconductors for ohmic contact. layer, 44
and 44° are electrodes. Here, electrodes 44 and 4
If the carriers injected into the photoconductive semiconductor layer 42 from 4° through the doping semiconductor layers 43 and 43' are electrons, the doping semiconductor layers 43 and 43 are formed of an n-type semiconductor, and the carriers injected into the semiconductor 1i142 are electrons. If the carriers are holes, doping semiconductor layers 43 and 43
is formed of a p-type semiconductor.

In such a configuration, when light is incident from the substrate 41 side (if the substrate 41 is transparent) or from the electrode 44 and 44° sides, the light is emitted in the portion of the photoconductive semiconductor layer 42 between the electrode 44 and the electrode 44'. Erection increases the density of electrons or holes that contribute to electrical conduction. Therefore, as shown in the figure, if a voltage is applied between the electrodes 44 and 44', a large secondary photocurrent will flow as a signal current, and a large secondary photocurrent will flow from both ends of the load resistor (not shown). Output current can be obtained.

Furthermore, in order to stabilize the photocurrent and improve the linearity of the photocurrent depending on the light illuminance, the applicant has proposed a photoconductive sensor provided with an auxiliary electrode.

FIG. 15 is a diagram for explaining an outline of an improved photoconductive photosensor and its driving method, which has already been filed by the applicant of the present application.

In the figure, 45 is a transparent or opaque gate electrode;
6 is an insulator formed of SiOx, SiNx, or the like. Note that the same reference numerals as in FIG. 14 indicate the same parts.

A transparent or opaque conductive layer is patterned to form a gate electrode 45 on the substrate 41, and an insulating layer 4 is formed on the substrate 41.
6 is formed by a sputtering method, a glow discharge method, or the like. On the insulating layer 46, a photoconductive semiconductor layer 42 made of Cd5-5e, a-5i:H, etc. as a photoconductive layer, doped semiconductor layers 43 and 43', and an electrode 44 are formed on the insulating layer 46 in the same manner as described above. and 44' (here, electrode 44 is a drain electrode and electrode 44' is a source electrode) are formed, respectively. Here, a case will be described in which the doped semiconductor layers 43 and 43° are formed of n-type and electrons are used as injected carriers.

In the photoconductive photosensor having such a configuration, as shown in the figure, a DC power supply 47 is connected between the electrodes 44 and the electrode 44°, and a variable DC power supply is connected between the source electrode 44° and the gate electrode 45. 48 respectively. However, it is assumed that the variable DC power supply 48 can also change the polarity of the applied voltage.

When light of illuminance F is incident between the electrode 44 and the electrode 44° of the photoconductive photosensor shown in FIG. 15, the photocurrent IP of the sensor (current flowing between the electrode 44 and the electrode 44°) is shown in FIG. 16, and the linearity γ(I
p(X)Fγ) is shown in FIG. Furthermore, the optical response speed (Ton;
The rise time, Toff; fall time> is shown in FIG.

[Problems to be solved by the invention] In such conventional photoconductive photosensors, increasing the photocurrent slows down the optical response speed, and increasing the optical response speed decreases the photocurrent. There was a theme B.

In order to obtain more photocurrent, the gate potential vG needs to be a negative potential as close to Ov as possible. That is, it is necessary to bring the semiconductor layer 42 into a state where depletion is as weak as possible so that inversion of the semiconductor does not occur. The reason is explained below.

This photoconductive photosensor is operated with a negative voltage applied as a gate potential (Va). At this time, the band of the photoconductive semiconductor layer 42 is normally trepressed by about 1 μm due to the distribution of space charges according to Poisson's equation. That is, the gate electrode 45 of the photoconductive semiconductor layer 42
The side portions are particularly strongly p-typed. At this time, the smaller the voltage applied to the gate electrode 45 (the larger the absolute value), the more
Although the light amount-dependent linearity improves, the photocurrent decreases. This is because the lifetime of carriers (electrons in this case) becomes shorter as the photoconductive semiconductor layer 42 becomes more p-type.
Therefore, it is considered that the gain G of the secondary photocurrent decreases and the photocurrent decreases.

Note that G is given by G=μτE/L (μ: electron movement speed, τ: electron lifetime, E: electric field strength, L: interelectrode pressure 1llIl).

On the other hand, in order to increase the light response speed of this photoconductive photosensor, it is necessary to reduce the gate potential (increase in absolute value). This seems to be because the smaller the gate potential, the higher the probability that carrier capture and release will occur in a relatively shallow trap, and the faster the time constant of capture and release. This will be explained in detail below.

In the state of electron accumulation, the photoresponse speed is as shown in Figure 11 (
It is greatly influenced by the process of trapping and releasing electrons into localized levels as shown in a). ¥Stt As shown in figure (b),
The rise time of the output current is determined by the trapping process to the shallow level NA, which is the main trapping level in the electron accumulation state, so it becomes faster as V(I becomes larger.
The fall time is controlled by the electron emission process from NA and the capture (recombination) process at the recombination center NR, which is a deep level, but since electron emission is very fast, the rate-limiting factor is This is thought to be due to the recombination process. In other words, in the recombination process in the electron accumulation state, since there are an excess of electrons, the capture of holes to the recombination center becomes rate-determining, but the recombination center of holes is V. When 6 is small (large in absolute value), it moves away from the valence band, so the smaller 6 is, the slower the rise time is.

On the other hand, in the state of hole accumulation, as shown in Figure 12(a), the photoresponse speed depends on the trapping of holes in the localized level.
Strongly influenced by the release process. That is, FIG. 12(b)
As shown in FIG. 2, the rise time of the output current is determined by the process of trapping holes into the trapping level No, so the smaller vq is, the faster the rise time is. on the other hand,
The fall time is determined by the hole emission process from No and the recombination process at NR, but since hole emission is much slower, hole emission becomes rate-determining, and the smaller vG is, the faster it becomes.

Figure 7 shows V, I and T. n and T. 11 is a diagram showing the relationship with . From figure (a), the rise time T o
n has a maximum peak at a certain value of vo (near the flat band voltage), and on the negative electric field side there is an improvement in the hole trap rate control (i), and on the positive electric field side there is an improvement in the electron rate control (i). If) can be seen. Also, the fall time T. 11 increases monotonically as vG increases, as shown in Figure (b), and an improvement in hole trap rate limiting (f) and recombination rate limiting (ii) are observed. In other words, in order to improve the photoresponse characteristics, it is necessary to strengthen the hole accumulation state by decreasing vo (increasing it in absolute value) and to use a shallow trapping level for holes. , it is also necessary to increase the recombination of holes in that spatial region and to reduce the amount of holes emitted.

As explained above, in the conventional photoconductive photosensor, it has been impossible to improve both the photocurrent and the photoresponse speed.

The present invention is intended to solve these conventional problems, and aims to provide a charge conversion element that has a large photocurrent and a fast photoresponse speed.

[Means for Solving the Problems] The gist of the present invention is to provide an insulating layer, a photoconductive semiconductor layer provided in contact with the insulating layer, and a first electrode provided in contact with the photoconductive semiconductor layer. and a charge conversion element comprising a photoelectric conversion section having at least a second electrode and a third electrode provided in contact with the insulating layer, wherein the bandgap of the photoconductive semiconductor layer is on the insulating layer side. and differs between the first electrode and the 342nd electrode.

[Function] The present invention realizes a photoconductive type photoelectric conversion element having a large photocurrent and a fast photoresponse speed by adopting the above-described configuration. This will be explained in detail below.

In the present invention, the flat band voltage can be set to a different value than when only a wide bandgap semiconductor layer is used as the photoconductive layer. Therefore, when the third electrode (hereinafter referred to as control electrode), which corresponds to the gate electrode of a TPT (thin film transistor), is set to zero bias, electrons are likely to be accumulated on the insulating film interface side of the photoconductive semiconductor layer. Therefore, the lifetime of carrier electrons can be extended, and a larger photocurrent than before can be obtained.

Moreover, FIG. 10 shows the control electrode voltage V in the photoelectric conversion element according to the present invention. FIG. 3 is a diagram showing an example of the relationship between photocurrent and dark current. In the figure, a shows the control electrode voltage-current characteristic of the photoelectric conversion element according to the present invention, and b shows the control electrode voltage-current characteristic of the conventional charging conversion element.

In this way, the charge conversion element according to the present invention can obtain a larger photocurrent. Furthermore, since the difference between the current (photocurrent) value when irradiated with light and the current (dark current) value when not irradiated becomes large, the S/N ratio is improved.

On the other hand, the photoresponse speed of the photoelectric conversion element of the present invention has the same VG dependence as in the case where the wide bandgap layer is dominated by a semiconductor, but the photocurrent value is large at all bias points. It will be done. In other words, in the configuration of the present invention, by making the bias point negative, it is possible to obtain the same gain as at zero bias in the case of only the wide band gap layer, and to increase the optical response speed.

[Example] (Example 1) An example of the present invention will be described using FIG. 1 and FIG. 2.

FIG. 1 is a schematic structural explanatory diagram of a photoelectric conversion section which is the basic structure of the photoelectric conversion element of the present invention.

In the figure, 31 is an insulating substrate made of quartz, glass, etc., 32 is a gate electrode (third electrode), 33 is an electrically insulating layer, 34 is a photoconductive semiconductor layer, and 35a and 35b are ohmic Contact layers 36a and 36b represent the first and second electrodes, respectively.

Here, the photoconductive semiconductor layer 34 has a side 34a with a smaller optical bandgap facing the insulating layer 33 and a side 34b with a larger optical bandgap.
are arranged on the first electrode 36a and second electrode 36b sides, and a structure is adopted in which the optical bandgap is changed stepwise.

Next, the manufacturing process of the photoelectric conversion element according to this example will be explained.

(1> On the glass substrate 31 (Corning #7059),
The control electrode 32 was formed by depositing A132 to a thickness of 0.1 μm using a sputtering method.

(2) After setting this substrate 31 in a capacitively coupled CVD device and increasing the substrate temperature to 300°C, the inside of the device is once lXl0
-'Torr or less vacuum, then diluted with hydrogen to 10% SiH4 gas 11005CC and 99.999%
NH3 gas 11005CC, gas pressure is 0.4To
Adjust the high frequency power with a valve so that it is rr.
The battery was discharged for 1 hour using W. This results in insulation [33 as 3
000 SiH, < films were formed.

(3) Next, the substrate was set in a hydrogen radical CVD (hereinafter referred to as HRCVD) apparatus shown in FIG. 2, and a semiconductor layer 34 was formed by the following procedure.

Note that the material for forming the semiconductor layer 34 is a-Si.
:H:F and a-S i Ge :H:F were used.

■First, use a rotary pump and a cryopump (both not shown) to pump the inside of the chamber 101 to 1xlO-'.
The temperature was evacuated to below Torr, and the temperature of the substrate 103 was raised to 300° C. using a heater 104.

■Next, 30SCC of H2 gas is supplied from the gas introduction pipe 109.
M% Ar gas was introduced into the quartz reaction tube 106 at 250 SCCM. Further, a mixed gas of 30 SCCM of SiF 4 gas and I SCCM of GeF 4 gas diluted to 5% with He gas was introduced into the gas introduction pipe 106 through the quartz reaction tube 106 . The exhaust system at this time used a mechanical booster pump and a rotary pump. The pressure inside the chamber was adjusted to 0.4 Torr.

(2) In this state, microwave applicator 108 applied 160 W of microwave to the gas in quartz reaction chamber 106 to generate plasma and deposit a-SiGe:)(:F. Deposition was carried out for 2 minutes, and this The film thickness at that time was 500 people.

■After that, the gas introduced from the gas introduction pipe 110 is
A-St:H:F was deposited using only Fa 30SCCM. Deposition time was 23 minutes and 5500 people a
-Si:H:F film was formed.

(4) This substrate was transferred to a normal plasma CVD apparatus (S i
N (can be the same as the deposition device), and set the
0% SSiH41O0SCC and H2 dilution 100p100
pp 500SCCM and gas pressure 0.5 Torr.
Discharge was performed at a high frequency of 500 W for 40 minutes under the conditions of R to form an ohmic contact layer 35 (thickness: 1000 mm).

(5) Finally, an Au5QOO layer was formed by sputtering, and the ohmic contact layer and the AJ2 layer were patterned to form a pair of sensor electrodes.

The photocurrent and photoresponse speed of the photoelectric conversion element produced as described above were measured. As a result, VO -
By biasing between 6 and -7v, the photocurrent value is changed to a-
It was possible to achieve almost the same level as that at zero bias of a 5t:H single layer, and to significantly improve both the photoresponse speed and T0□Toff (Table 1).

Note that here, Torl and Toff are defined as follows.

TOn: Time when the photocurrent reaches 90% of the saturation value Toff
= Time for photocurrent to reach 10% of saturation value Table 1 Also, the band gap (Eopt) of the a-5t:H:F film used in this example is 1.7 eV, and the a-3i
Ge:H:F is observed to be 1.4 eV.

(Example 2) FIG. 3 is a sectional view of an example of a line sensor according to the present invention in which the optical semiconductor layer of each photoelectric conversion section has the structure shown in FIG. 1.

In FIG. 3, on the substrate 1 are formed the lower electrode wiring 6 of the wiring part 2, the lower electrode wiring 7 of the charge storage part 4, and the lower electrode wiring 8 which is the gate electrode of the switch part 5. An insulating layer 9 is formed on the electrode wiring 6.7° 8 and on the substrate 1 between these. A photoconductive semiconductor layer 10 is formed on the insulating layer 9, and a portion of the insulating layer 9 and the photoconductive semiconductor layer 10 above the wiring section 2 are opened for connection. Upper layer electrode wirings 12, 12°, 13.14 are formed on the photoconductive semiconductor layer 10,
Upper layer electrode wiring 12° and rising electrode wiring! 3 becomes the photoelectric conversion region of the photoelectric conversion section 3. Upper layer electrode wiring 1
3. Photoconductive semiconductor layer 10, insulating layer 9, lower electrode wiring 7
forms a storage capacitor, and one end of the switch section 5 of the upper layer wiring 13 becomes a drain electrode. One end of the upper layer electrode wiring 14 on the switch section 5 side serves as a source power source. Although not shown, the photoconductive semiconductor layer 10 and the upper electrode wiring 12
, 13 and 14, a doping layer is provided between them to establish ohmic contact. In this embodiment, the wiring section 2, the photoelectric conversion section 3, the charge storage section 4, and the switch section 5 are each provided with an insulating section, and are formed in the same process.

In the wiring part 2, the lower layer electrode wiring 6 and the upper layer electrode wiring 1
In addition to the insulating layer 9, a photoconductive semiconductor layer 10 is provided between the lower electrode wiring 6 and the upper electrode wiring 12, as long as insulation is maintained between the lower electrode wiring 6 and the upper electrode wiring 12, and the photoconductive The presence of semiconductor layer 10 has no effect.

In the photoelectric conversion section 3, the photoconductive semiconductor layer 10 is provided on the substrate 1 via the insulating layer 9 and the control electrode 25, and as a change in energy level at the interface between the photoconductive semiconductor 10 and the insulating layer 9, However, no change occurs that would impair the basic performance of the photoconductive properties. in this case,
The control 11E pole between the substrate 1 and the insulating layer 9 of the photoelectric conversion section 3 controls and optimizes the energy level at the interface of the photoconductive semiconductor layer 10.

The line sensor of this example emits all light from the substrate 1 side,
This is a so-called lensless type photoelectric conversion element in which the charging conversion unit 3 directly reads reflected light from a document brought into contact with the photoelectric conversion unit 3.

The control electrode 25 also has a light shielding layer that shields irradiation light incident from the substrate side. Furthermore, an illumination window 28 is provided for illuminating the original.

In the charge storage section 4, the photoconductive semiconductor layer 10 provided on the insulating layer 9 influences the charge storage capacity. The effect is the bias dependence of capacitance, and the capacitance changes due to band bending of the semiconductor layer at the insulating layer interface. However, in the charge/discharge operation of the charge used in this embodiment, this bias dependence can be almost ignored by strongly biasing the electrode on the insulating layer 9 side negatively (for example, -10V). .

Note that the thickness of the photoconductive semiconductor layer 10 may be any value as long as it provides good photoelectric conversion characteristics of the photoelectric conversion section 3 and good switching characteristics of the switch section 5.

Next, a case will be described in which the switching section of the line sensor is configured by a matrix switch array.

FIG. 4 shows an equivalent circuit of a line sensor having a matrix switch array.

In the figure, SL, 52. ..., SN (hereinafter, SY
1) is an optical sensor corresponding to the photoelectric conversion unit 3. Also, C, +, Cz,..., CM (hereinafter,
CYI) is a storage capacitor corresponding to the charge storage section 4, and stores the photocurrent of the photosensor SYI. Furthermore, S T 1. ST2STs (hereinafter referred to as 5TYI) is a transfer switch for transferring the charge of storage capacitor CYI to load capacitor CX+, and SR1, SRi
, ..., 5Rs (hereinafter referred to as 5RYI) is a discharge switch for resetting the charge of the storage capacitor CY1.The circuit consisting of the transfer switch 5TYI and the discharge switch 5RYI is the third This corresponds to the switch section 5 in the figure.

The optical sensor SYI, the storage capacitor CY1, the transfer switch 5TYI, and the discharge switch 5RY1 are each arranged in a line array and divided into NXM blocks. The 5RYI gate electrodes provided in an array are connected to the matrix wiring section 15. The gate electrode of the transfer switch 5TY1 is commonly connected to the gate electrodes of transfer switches at the same level in other blocks, and the gate electrode of the discharge switch 5RYI is connected to the gate electrode of the next transfer switch in each block. Connected in a circular manner.

Common M (gate drive lines G+, G
*, . . . , Gn) are driven by the gate driving section 16. On the other hand, the signal output is a leader line! 8 (signal output lines D1, D2, . . . , Ds) are connected to the signal processing section 17.

FIG. 5 is a timing chart showing the operation of the line sensor.

Selection pulses (Van.

v62. ..., VGN) is applied. First, when the gate drive line G is selected, the transfer switch STI is turned on, and the signal is transferred to the storage capacitor Cxl.

Next, when the gate drive line G2 is selected, the transfer switch ST2 is turned on, and the charge transferred to the storage capacitor C2 is transferred to the load capacitor Cxl, and at the same time, the charge in the storage capacitor C1 is reset by the discharge switch SRI. be done. Hereinafter, G s , G
4, . . . GN are also sequentially selected and read operations are performed. In addition, in the figure, VC++ "C2,"'
+VCN indicates a change in the potential of storage capacitor CYI. These operations are performed for each block, and the signal outputs XI+ vX2+ . . . , VXN of each block are the inputs Dl, D2 . ... is sent to the DM, converted into a serial signal, and output.

FIG. 6 is a diagram showing a perspective view of the line sensor.

In the figure, 1 is a substrate, and on this substrate 1 there is a charge storage section 4 that accumulates the output charge of the photoelectric conversion section 3, a transfer switch 19 that transfers the charge of the charge storage section to the signal processing IC 21, and a charge storage section 4 that stores the output charge of the photoelectric conversion section 3. A discharge switch 20 for resetting the storage section 4 is formed respectively. The transfer switch 19 and the discharge switch 20 are divided into NXM blocks, and the drain electrode of the transfer switch 19 is connected to the corresponding charge storage section 4, and the source electrode is connected to one for each block. They are put together and connected to a load capacitor (not shown) and a signal processing IC 21. on the other hand,
The gate electrodes of each block are connected to the common electrode of the matrix wiring section 15 to the gate drive IC 22 so that gate electrode lines at the same level in each block are commonly connected.

The signal processing IC 21 is composed of a switch array, a shift register, a buffer amplifier, etc., and reads out and resets the signal transferred to the lead line 18. Further, in this signal processing IC 21, a shield pattern (not shown) having a ground potential is arranged near the center of the substrate 1 so as to minimize the wiring length of the lead line 18.

FIG. 7 shows a partial structural plan view of the line sensor.

In the figure, 15 is a matrix wiring section, 3 is a photoelectric conversion section, 4 is a charge storage section, 19 is a transfer switch, 20 is a discharge switch that resets the charge in the charge storage section 4, and 18
is the transfer switch, 18 is the signal output I of the transfer switch
23 is a load capacitor for accumulating and reading out the charge transferred by the transfer switch 19; 25 is a control electrode that blocks light from the back side of the photoelectric conversion unit and determines the sensor bias point. .

- In this example, an a-51xGe14:)I:F film is used as the photoconductive semiconductor layer that constitutes the photoelectric conversion unit 3, the transfer switch 19, and the discharge switch 20, and the insulating layer is silicon nitride formed by glow discharge. Membrane (S
iNH) is used.

In FIG. 7, in order to avoid complexity, only the upper and lower two layers of electrode wiring are shown, and the photoconductive semiconductor layer and the insulating layer are not shown. Further, the photoconductive semiconductor layer and the insulating layer are formed in the photoelectric conversion section 3, the charge storage section 4, the transfer switch 19, and the discharge switch 20, as well as between the upper layer electrode wiring and the substrate. has been done.

Furthermore, an a-Si:H layer doped with n+ is formed at the interface between the upper electrode wiring and the photoconductive semiconductor layer to form an ohmic contact.

In addition, in the wiring pattern of the line sensor of this example, all signal paths output from each photoelectric conversion unit are wired so as not to intersect with other wiring, and crosstalk between each signal component and gate electrode wiring are avoided. This prevents induction noise from occurring.

FIG. 8 is a partial longitudinal sectional view of FIG. 7, (a) is a sectional view taken along line AA' in FIG. The figure, (d) is a DD degree cross-sectional view.

FIG. 8(a) shows a longitudinal cross-sectional view of the photoelectric conversion unit 3, in which 24 is a lower electrode wiring connected to the gate electrode of the transfer switch 19, 9 is an insulating layer, 10 is a photoconductive semiconductor layer, 12. 1
3 is an upper layer electrode wiring. The incident light is transmitted to the photoconductive semiconductor layer formed by a-5i:H! By changing the conductivity of O, the current flowing between the upper layer electrode wirings 12 and 13 facing each other in a comb shape is changed.

As shown in FIG. 8(a), the light shielding layer 25 is formed of lower layer electrode wiring. A negative bias voltage is normally applied to this light shielding layer 25, and the dark current is controlled so as to be sufficiently small.

FIG. 8(b) shows a longitudinal cross-sectional view of the charge storage section 4. FIG. The charge storage section 4 includes a lower electrode wiring 7, an insulating layer 9 formed on the lower electrode wiring 7, a photoconductive semiconductor layer 10, and an upper electrode wiring formed on the photoconductive semiconductor layer 10! It consists of 3. The structure of this charge storage section 4 is a so-called MIS capacitor (Metal-1nsulator-Semi).
conductor). Although either positive or negative bias conditions can be used, the lower electrode wiring 7
Stable capacitance and frequency characteristics can be obtained by always using the transistor in a state where it is deeply biased negatively to about -7 to -8 layers.

FIG. 8(c) is a diagram showing a longitudinal cross-sectional view of the transfer switch 19 and the discharge switch 20. Transfer switch 19
is composed of a lower layer electrode wiring 24 which is a gate electrode, an insulating layer 9 which is a gate insulating layer, a photoconductive semiconductor layer 10, an upper layer electrode wiring 14 which is a source electrode, and an upper layer electrode wiring 13 which is a drain electrode. be done. Discharge switch 2o
The gate insulating layer and the photoconductive semiconductor layer of the insulating layer 9
and the photoconductive semiconductor layer IO, the source electrode is the upper electrode wiring 13, the gate electrode is the lower electrode wiring 27, and the drain electrode is the upper electrode wiring #I26. The transfer switch 19 and the discharge switch 20 constitute a thin film field effect transistor (TPT).

As shown in FIG. 8(d), the illumination window 28 is formed by opening a portion of the upper electrode wiring 12. As shown in FIG. This illumination window 28 may be formed by lower layer electrode wiring.

As described above, the n1 layer formed of a-Si:H is interposed at the interface between the upper electrode wirings 13, 14.degree. 26 and the photoconductive semiconductor layer 10 to form ohmic contact.

Note that the upper part of TPT is usually covered with a padded base film (SiN).
H%Sio2% silicon-based, organic-based resin, etc.) are formed, but are not shown in FIG. 8(e).

As explained above, in the line sensor according to the present invention, all of the constituent parts of the photoelectric conversion section, the accumulated charge section, the transfer switch, the discharge switch, and the matrix wiring section prevent the accumulation of the photoconductive semiconductor layer and the insulating layer. Therefore, each part can be formed simultaneously by the same process.

Figure 9 shows the drawer shown in Figure 6! 18 is shown in partial plan view.

In the figure, a ground pattern 29 is arranged between the lead lines 18 of adjacent blocks. This ground pattern 29 makes it possible to avoid crosstalk due to capacitive coupling between adjacent lead lines. The line capacitance generated between the lead line 18 and the ground pattern 29 operates as a part of a load capacitor. The difference in capacitance due to the difference in the wiring length of the lead wire of each block is
It is adjusted depending on the area of the load capacitor section 23. Therefore, the effective capacitance of the load capacitor of each block is constant. 30 is a lead terminal connected to the lead wire 18.

Note that in the circuit configuration of this embodiment, the matrix wiring is performed on the gate electrode side of the switch section, and the source electrodes of the transfer switches in each block are grouped together in a part, but the embodiment of the present invention It is not limited to the configuration,
It is possible to adapt to various circuit configurations such as a configuration in which matrix wiring is performed on the source electrode side.

[Effects of the Invention] As explained above, according to the present invention, it is possible to provide a charge conversion element with a large photocurrent and a fast photoresponse speed.

[Brief explanation of drawings]

Fig. 1 is a schematic structural diagram of a photoelectric conversion section which is the basic structure of the photoelectric conversion element of the present invention, Fig. 2 is a diagram showing a hydrogen radical CVD apparatus, and Fig. 3 is an example of a line sensor according to the present invention. 4 is a diagram showing an equivalent circuit of a line sensor having a matrix switch array, and FIG.
6 is a perspective view of the line sensor shown in FIG. 4,
7 is a plan view of a partial configuration of the line sensor shown in FIG. 4, FIG. 8 is a partial longitudinal sectional view of the line sensor shown in FIG. FIG. 10 shows the control electrode voltage V in the charging conversion element according to the present invention. and photocurrent
Figure 11 is a diagram showing an example of the relationship with dark current, Figure 11 is a diagram to explain the relationship between the capture and release process of electrons to localized levels and the photoresponse speed, and Figure 12 is a diagram showing the relationship between localized levels of holes. Diagram 1 for explaining the relationship between the capture and release process and the photoresponse speed.
Figure 3 shows V in the present invention. and To. FIG. 14 is a diagram showing a schematic configuration of a conventional photoconductive type sensor, FIG. 15 is a schematic configuration diagram of an improved photoconductive type photosensor, and FIG. VO and photocurrent of the improved photoconductive photosensor shown in the figure! , FIG. 17 is a diagram showing the relationship between V and V of the improved photoconductive photosensor shown in Figure N15. FIG. 18 is a diagram showing the relationship between the linearity γ and the light quantity dependence, and FIG. 18 shows the V of the improved photoconductive photosensor shown in FIG. FIG. 3 is a diagram showing the relationship between and optical response speed. DESCRIPTION OF SYMBOLS 1... Board, 2... Wiring part, 3... Photoelectric conversion part,
4... Charge storage part, 5... Switch part, 6... Lower layer electrode wiring, 7... Lower layer electrode wiring, 8... Lower layer electrode wiring, 9... Insulating layer, 10... photoconductive semiconductor layer,
12°12°, 13.14...upper layer electrode wiring, 18.
...Leader line, 19...Transfer switch, 20...
・Discharge switch, 21...Signal processing IC, 22...
・Gate drive, 25... Control electrode, 28... Illumination window, 31... Insulating substrate, 32... Gate electrode (
3rd electrode), 33... electrically insulating layer, 34... photoconductive semiconductor layer, 35a, 35b... optical contact layer, 36a... first electrode, 36b... second electrode, 41
... Insulating substrate, 42 ... Photoconductive semiconductor layer, 43
．． 43'... Doped semiconductor layer for ohmic contact, 44.44°... Electrode, 45... Gate electrode, 46... Insulator, 47... DC power supply, 101.
...Chamber 103...Substrate, 104...Heater 106...Quartz reaction tube, 109.110...Gas introduction tube. Figure 2 Figure G3 GN 5-n--- cz R / CN yR XI 6 Figure 5 Figure 9 Figure 10 Figure VG (V) 11th τOn= ■ 12th (0) (b) τOn: ■ τoff :■ Fig. 13 (0) VG (V) Fig. 13 (b) G (v) Fig. 14 Fig. 15 Fig. 18 Fig. VG (V)

Claims (3)

[Claims] (1) an insulating layer, a photoconductive semiconductor layer provided in contact with the insulating layer, a first electrode and a second electrode provided in contact with the photoconductive semiconductor layer, and a photoconductive semiconductor layer provided in contact with the insulating layer; A photoelectric conversion element comprising a photoelectric conversion section having at least a third electrode provided, wherein the band gap of the photoconductive semiconductor layer is different on the insulating layer side and on the first and second electrode sides. A photoelectric conversion element characterized by: (2) The photoelectric conversion element according to claim 1, wherein the photoconductive semiconductor layer is formed by laminating a plurality of semiconductor layers having different optical band gaps. (3) The optical band gap is narrower on the insulating layer side, and the optical bandgap is narrower on the insulating layer side.
3. The photoelectric conversion element according to claim 1, wherein the photoelectric conversion element is wide on the electrode and second electrode sides.