JPH03185792A - Printed circuit board - Google Patents
Printed circuit boardInfo
- Publication number
- JPH03185792A JPH03185792A JP32262689A JP32262689A JPH03185792A JP H03185792 A JPH03185792 A JP H03185792A JP 32262689 A JP32262689 A JP 32262689A JP 32262689 A JP32262689 A JP 32262689A JP H03185792 A JPH03185792 A JP H03185792A
- Authority
- JP
- Japan
- Prior art keywords
- layers
- copper
- layer
- copper migration
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910052802 copper Inorganic materials 0.000 claims abstract description 49
- 239000010949 copper Substances 0.000 claims abstract description 49
- 230000005012 migration Effects 0.000 claims abstract description 45
- 238000013508 migration Methods 0.000 claims abstract description 45
- 239000003112 inhibitor Substances 0.000 claims abstract description 23
- 238000010030 laminating Methods 0.000 claims description 4
- 229920005989 resin Polymers 0.000 abstract description 20
- 239000011347 resin Substances 0.000 abstract description 20
- 239000000758 substrate Substances 0.000 abstract description 18
- 239000011889 copper foil Substances 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 65
- 238000000034 method Methods 0.000 description 45
- 239000000654 additive Substances 0.000 description 22
- 230000000996 additive effect Effects 0.000 description 19
- 239000012790 adhesive layer Substances 0.000 description 11
- 238000005530 etching Methods 0.000 description 11
- 239000002648 laminated material Substances 0.000 description 11
- 238000007747 plating Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 9
- 238000005553 drilling Methods 0.000 description 7
- 239000011521 glass Substances 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- 239000003054 catalyst Substances 0.000 description 6
- 229920001971 elastomer Polymers 0.000 description 6
- 239000004744 fabric Substances 0.000 description 6
- 239000005060 rubber Substances 0.000 description 6
- 238000007772 electroless plating Methods 0.000 description 5
- 238000007788 roughening Methods 0.000 description 5
- 238000009413 insulation Methods 0.000 description 4
- 238000003475 lamination Methods 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000000470 constituent Substances 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- HAZJTCQWIDBCCE-UHFFFAOYSA-N 1h-triazine-6-thione Chemical compound SC1=CC=NN=N1 HAZJTCQWIDBCCE-UHFFFAOYSA-N 0.000 description 2
- KCXVZYZYPLLWCC-UHFFFAOYSA-N EDTA Chemical compound OC(=O)CN(CC(O)=O)CCN(CC(O)=O)CC(O)=O KCXVZYZYPLLWCC-UHFFFAOYSA-N 0.000 description 2
- DHMQDGOQFOQNFH-UHFFFAOYSA-N Glycine Chemical compound NCC(O)=O DHMQDGOQFOQNFH-UHFFFAOYSA-N 0.000 description 2
- 239000005062 Polybutadiene Substances 0.000 description 2
- QRUDEWIWKLJBPS-UHFFFAOYSA-N benzotriazole Chemical compound C1=CC=C2N[N][N]C2=C1 QRUDEWIWKLJBPS-UHFFFAOYSA-N 0.000 description 2
- 239000012964 benzotriazole Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 210000001787 dendrite Anatomy 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 150000003949 imides Chemical class 0.000 description 2
- 239000005011 phenolic resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920003048 styrene butadiene rubber Polymers 0.000 description 2
- -1 0-phenanthroline Chemical compound 0.000 description 1
- JIHQDMXYYFUGFV-UHFFFAOYSA-N 1,3,5-triazine Chemical compound C1=NC=NC=N1 JIHQDMXYYFUGFV-UHFFFAOYSA-N 0.000 description 1
- YHMYGUUIMTVXNW-UHFFFAOYSA-N 1,3-dihydrobenzimidazole-2-thione Chemical compound C1=CC=C2NC(S)=NC2=C1 YHMYGUUIMTVXNW-UHFFFAOYSA-N 0.000 description 1
- POAOYUHQDCAZBD-UHFFFAOYSA-N 2-butoxyethanol Chemical compound CCCCOCCO POAOYUHQDCAZBD-UHFFFAOYSA-N 0.000 description 1
- NEAQRZUHTPSBBM-UHFFFAOYSA-N 2-hydroxy-3,3-dimethyl-7-nitro-4h-isoquinolin-1-one Chemical compound C1=C([N+]([O-])=O)C=C2C(=O)N(O)C(C)(C)CC2=C1 NEAQRZUHTPSBBM-UHFFFAOYSA-N 0.000 description 1
- CFKJNAPHSSEXIE-UHFFFAOYSA-N 5-phenyliminotriazinane-4,6-dithione Chemical compound C1(=CC=CC=C1)NC=1C(=NN=NC1S)S CFKJNAPHSSEXIE-UHFFFAOYSA-N 0.000 description 1
- 239000004471 Glycine Substances 0.000 description 1
- 244000043261 Hevea brasiliensis Species 0.000 description 1
- 229920000459 Nitrile rubber Polymers 0.000 description 1
- 239000002174 Styrene-butadiene Substances 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229920005549 butyl rubber Polymers 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000013522 chelant Substances 0.000 description 1
- 229920001577 copolymer Polymers 0.000 description 1
- 239000011162 core material Substances 0.000 description 1
- 239000007822 coupling agent Substances 0.000 description 1
- 239000012787 coverlay film Substances 0.000 description 1
- 239000003431 cross linking reagent Substances 0.000 description 1
- JGUQDUKBUKFFRO-CIIODKQPSA-N dimethylglyoxime Chemical compound O/N=C(/C)\C(\C)=N\O JGUQDUKBUKFFRO-CIIODKQPSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 229920003049 isoprene rubber Polymers 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920003052 natural elastomer Polymers 0.000 description 1
- 229920001194 natural rubber Polymers 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 229920001084 poly(chloroprene) Polymers 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- CDMIYIVDILNBIJ-UHFFFAOYSA-N triazinane-4,5,6-trithione Chemical compound SC1=NN=NC(S)=C1S CDMIYIVDILNBIJ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、銅マイグレーションの発生、成長を抑制した
プリント回路板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a printed circuit board in which occurrence and growth of copper migration is suppressed.
一般に、プリント回路板は、種々の材料から構成される
複数の層を積層させてなる物で、電気製品等の部品とし
て利用されている。In general, a printed circuit board is a product made by laminating a plurality of layers made of various materials, and is used as a component of electrical products and the like.
積層材料の組み合わせは数多く考えられ、多層化により
積層材料の数も増える傾向にある。Many combinations of laminated materials can be considered, and the number of laminated materials tends to increase as the number of layers increases.
多層プリント回路基板において、回路の形成方法、積層
材料の種類、積層方法の種類等の組み合わせは数多くあ
り、さらにその後の処理方法の種類まで含めると組み合
わせの数は膨大となる。In multilayer printed circuit boards, there are many combinations of circuit formation methods, types of laminated materials, types of lamination methods, etc., and the number of combinations becomes enormous when the types of subsequent processing methods are also included.
プリント回路板の配線密度の増加傾向により、回路の細
線化、多層化傾向は増々強まっている。As the wiring density of printed circuit boards increases, the tendency for circuits to become thinner and multilayered is increasing.
これは、回路平面の密度が増加するばかりではなく、層
方向の密度も増し、積層材料の厚さも薄層化の傾向にあ
る。同一平面上の回路間の距離、回路層間の距離の減少
は、絶縁材料の絶縁特性、誘電特性等に対し、より高い
特性を要求するとともに、材料の耐銅マイグレーション
性に対する要求も切実な問題として取り上げられるよう
になっている。This not only increases the density in the circuit plane, but also increases the density in the layer direction, and the thickness of the laminated materials tends to become thinner. The reduction in the distance between circuits on the same plane and the distance between circuit layers requires higher insulation properties, dielectric properties, etc. of insulating materials, and demands for copper migration resistance of materials are also becoming urgent issues. It's about to be picked up.
銅マイグレーションは、電位差のある隣接回路間で、回
路に使用している銅がイオン化し、移行を起こす現象で
、温熱環境下で移行速度は促進され、その過程で酸化還
元によりデンドライトの発生、成長が観察される。銅マ
イグレーションが進むと回路間の絶縁抵抗は低下し短絡
に至ることもある。Copper migration is a phenomenon in which copper used in circuits ionizes and migrates between adjacent circuits with a potential difference.The migration speed is accelerated in a thermal environment, and in the process, dendrites occur and grow due to redox. is observed. As copper migration progresses, the insulation resistance between circuits decreases, which may lead to short circuits.
本発明はこの様な事情を考慮してなされたものであって
、銅マイグレーションの発生、成長を抑制したプリント
回路板を提供することを目的とする。The present invention has been made in consideration of such circumstances, and an object of the present invention is to provide a printed circuit board in which the occurrence and growth of copper migration is suppressed.
回路間で銅マイグレーシジンが起こる経路は大別して二
つある。There are two main routes by which copper migration occurs between circuits.
一つは、樹脂等の絶縁材料その他の内部を経路とする場
合で、基本的には絶縁材料の絶縁特性に起因するところ
が大きい。これについては基本的なマトリックスの選択
、硬化システムの選択等の影響が大きいが、それ以外に
も、銅マイグレーション抑制剤を添加することにより耐
銅マイグレーシヲン性を向上させることは可能である。One is the case where the path is inside an insulating material such as a resin or the like, and basically this is largely due to the insulating properties of the insulating material. This is largely influenced by the selection of the basic matrix, selection of the curing system, etc., but it is also possible to improve copper migration resistance by adding a copper migration inhibitor.
もう一つは、プリント回路板を構成する積層材料間の界
面が銅マイグレーションの経路となる場合である。積層
材料間の界面は、積層する前の材料の表面に吸着した水
分や汚れが残留しやすいばかりでなく、積層して硬化が
終了した後でも外部からの水分の侵入経路となりやすい
。The other case is that the interface between the laminated materials constituting the printed circuit board becomes a route for copper migration. The interface between laminated materials not only tends to retain moisture and dirt adsorbed on the surfaces of the materials before lamination, but also tends to become a route for moisture to enter from the outside even after lamination and curing are completed.
銅マイグレーシゴンは水分の存在の影響が大きいため、
積層材料間の界面は銅マイグレーションの経路となりや
すい。また、一つの積層材料が、複数の材料から構成さ
れている場合は、その構成材料間の界面についても同様
のことが言える。たとえば、ガラスクロス銅張り積層板
を例に挙げれば、積層材料は、樹脂含浸ガラスクロスと
銅箔で、樹脂含浸ガラスクロスについて言えば、構成材
料は樹脂とガラスクロスからなり、構成材料間に界面が
存在する。実際、スルーホール間の銅マイグレーション
はガラスクロスと樹脂の界面で進行し、小径スルーホー
ル化において問題となっている。Copper migration is greatly affected by the presence of moisture, so
The interface between laminated materials tends to become a route for copper migration. Moreover, when one laminated material is composed of a plurality of materials, the same can be said about the interface between the constituent materials. For example, taking a glass cloth copper-clad laminate as an example, the laminated materials are resin-impregnated glass cloth and copper foil.For resin-impregnated glass cloth, the constituent materials are resin and glass cloth, and there is an interface between the constituent materials. exists. In fact, copper migration between through-holes progresses at the interface between glass cloth and resin, which poses a problem when making through-holes with smaller diameters.
本発明は、二つに大別した銅マイグレーションの経路の
内、特に後者の、積層材料間の界面における銅マイグレ
ーションの抑制を目的としてなされたもので、複数の層
を積層してなるプリント回路板において、互いに接して
積層される層の少なくとも一方の層の両面または片面に
銅マイグレーション抑制剤層を設けることを特徴とする
。The present invention was made with the aim of suppressing copper migration at the interface between laminated materials, which is the latter of the two main routes of copper migration, and is aimed at suppressing copper migration at the interface between laminated materials. The method is characterized in that a copper migration inhibitor layer is provided on both sides or one side of at least one of the layers laminated in contact with each other.
以下、サブトラクティブ法4層回路基板とアディティブ
法4層回路基板とを例に取り、図を参照してこの手段に
ついて詳しく説明する。Hereinafter, this means will be explained in detail with reference to the drawings, taking as examples a subtractive method four-layer circuit board and an additive method four-layer circuit board.
まず、サブトラクティブ法4層回路基板について、第1
図を参照して説明する。First, regarding the subtractive method 4-layer circuit board, the first
This will be explained with reference to the figures.
両面銅張り絶縁基板1をパターン化、エツチングするこ
とにより、内層回路基板を得、その両面にプリプレグ層
、樹脂層等の絶縁層3を介して、銅箔層を設ける。硬化
処理後、穴開け、スルーホールメツキ等の工程を経たの
ち、外層のパターン化、エツチングを行うことにより、
4層回路基板を得る。本発明の銅マイグレーション抑制
剤層4は、内層回路基板とその両側のプリプレグ層、樹
脂層等の絶縁層3との界面に設けることができる。また
、外層のw4箔層と絶縁層3との界面に設けることがで
きる。さらに、内層回路基板作製用の両面銅張り積層板
を製造する際に、銅箔層とプリプレグ層との界面に設け
ることも可能である。2は回路を表わす。By patterning and etching the double-sided copper-clad insulating board 1, an inner layer circuit board is obtained, and a copper foil layer is provided on both sides of the board through an insulating layer 3 such as a prepreg layer or a resin layer. After the hardening process, after going through processes such as drilling and through-hole plating, the outer layer is patterned and etched.
A four-layer circuit board is obtained. The copper migration inhibitor layer 4 of the present invention can be provided at the interface between the inner layer circuit board and the insulating layer 3 such as a prepreg layer or a resin layer on both sides thereof. Further, it can be provided at the interface between the outer W4 foil layer and the insulating layer 3. Furthermore, when producing a double-sided copper-clad laminate for producing an inner layer circuit board, it is also possible to provide it at the interface between the copper foil layer and the prepreg layer. 2 represents a circuit.
ここで言うプリプレグ層とは、エポキシ樹脂、フェノー
ル樹脂等の汎用樹脂からイミド樹脂、フッ素樹脂等の熱
硬化性あるいは熱可塑性の樹脂をガラスクロス、ガラス
不織布、紙等の心材に含浸した物を指し、その組み合わ
せは問わない。また、樹脂層についても、汎用の熱硬化
性樹脂以外に、さらに耐熱性を得ることを目的としたイ
ミド樹脂、低誘電率化を目的としたフッ素樹脂等広く選
択することができる。The prepreg layer referred to here refers to a core material such as glass cloth, glass nonwoven fabric, or paper impregnated with thermosetting or thermoplastic resin such as imide resin or fluororesin from general-purpose resin such as epoxy resin or phenol resin. , the combination does not matter. Further, for the resin layer, in addition to general-purpose thermosetting resins, a wide range of materials can be selected, such as imide resins for the purpose of obtaining further heat resistance, and fluororesins for the purpose of lowering the dielectric constant.
次に、アディティブ法4層回路基板について、第2図を
参照して説明する。Next, the additive four-layer circuit board will be explained with reference to FIG. 2.
アンクラッド絶縁基板11の両面にアディティブ法用接
着剤層12を設け、パターン化後、無電解メツキにより
内層回路基板を得る。その両側にプリプレグ層、樹脂層
等の絶縁層15を設ける。Additive adhesive layers 12 are provided on both sides of the unclad insulating substrate 11, and after patterning, an inner layer circuit board is obtained by electroless plating. An insulating layer 15 such as a prepreg layer or a resin layer is provided on both sides thereof.
さらに、その両側にアディティブ法用接着剤層12を設
け、穴開け、パターン化後、無電解メツキにより外層回
路を得る。本発明の銅マイグレ−ジョン抑制剤層16は
、アンクラッド絶縁基板1とその両側に設置されるアデ
ィティブ法用接着剤層12との界面に設けることができ
る。また、内層回路基板作製後、内層回路基板とその両
側に設置される絶縁層15との界面に設けることができ
る。さらに、その絶縁層15とその外側に設置されるア
ディティブ法用接着剤N12との界面に設けることがで
きる。13はメツキレジストを、14は回路をそれぞれ
表わす。Furthermore, an adhesive layer 12 for additive method is provided on both sides, and after drilling and patterning, an outer layer circuit is obtained by electroless plating. The copper migration suppressor layer 16 of the present invention can be provided at the interface between the unclad insulating substrate 1 and the additive adhesive layer 12 provided on both sides thereof. Further, after the inner layer circuit board is manufactured, it can be provided at the interface between the inner layer circuit board and the insulating layers 15 installed on both sides thereof. Further, it can be provided at the interface between the insulating layer 15 and the additive adhesive N12 placed outside of the insulating layer 15. 13 represents a plating resist, and 14 represents a circuit.
ここで言うアディティブ法用接着剤とは、−船釣には、
ゴム成分と樹脂成分からなる。ゴム成分は、たとえば、
天然ゴム、スチレン−ブタジェン共重合体ゴム(SBR
) 、アクリロニトリル−ブタジェン共重合体ゴム(N
BR)、カルボキシル変性NBR、ブタジェンゴム、ク
ロロプレンゴム、イソプレンゴム、ブチルゴム等がある
。樹脂成分は、エポキシ樹脂、フェノール樹脂等の熱硬
化性樹脂が一般的に使用されるが、その限りではない。What is the additive method adhesive mentioned here? - For boat fishing,
Consists of rubber and resin components. For example, the rubber component is
Natural rubber, styrene-butadiene copolymer rubber (SBR
), acrylonitrile-butadiene copolymer rubber (N
BR), carboxyl-modified NBR, butadiene rubber, chloroprene rubber, isoprene rubber, butyl rubber, etc. As the resin component, thermosetting resins such as epoxy resins and phenol resins are generally used, but are not limited thereto.
さらに、これらのアディティブ法用接着剤は、無電解メ
ツキの粗化工程において表面に適当な凹凸を付与するた
めの粗化成分と非粗化成分が配合されている限りゴム成
分と樹脂成分の組み合わせに限定されるものではない。Furthermore, these adhesives for additive methods can be used in combinations of rubber components and resin components as long as they contain a roughening component and a non-roughening component to impart appropriate roughness to the surface in the roughening process of electroless plating. It is not limited to.
また、必要に応じて、ゴムの架橋剤、樹脂の硬化剤、フ
ィラー、界面活性剤、カップリング剤、溶剤または無電
解メツキ触媒等を添加することができる。また、アンク
ラッド絶縁基板とは、プリプレグを積層して硬化させた
基板のみではなく、セラごツク基板、金属基板等広く選
択することが可能である。また、絶縁層とは、サブトラ
クティブ法4層回路基板の場合と同様にプリプレグ、樹
脂等から広く選択できる。アディティブ法4層回路基板
の場合、アンクラッド絶縁基板や絶縁層にメツキ触媒を
添加することが可能である。Further, if necessary, a rubber crosslinking agent, a resin curing agent, a filler, a surfactant, a coupling agent, a solvent, an electroless plating catalyst, etc. can be added. Furthermore, the unclad insulating substrate can be selected from a wide range of materials, including not only a substrate made of laminated and cured prepreg, but also a ceramic substrate, a metal substrate, and the like. Further, the insulating layer can be selected from a wide range of prepregs, resins, etc., as in the case of the subtractive four-layer circuit board. In the case of an additive method four-layer circuit board, it is possible to add a plating catalyst to the unclad insulating substrate or the insulating layer.
上の例に挙げた銅マイグレーション抑制剤とは、銅マイ
グレーションを抑制する能力を有するものであれば良い
。たとえば、メルカプトトリアジン、2−メルカプトベ
ンズイミダゾール、などである。メルカプトトリアジン
としては、トリメルカプトトリアジン、トリメルカプト
S−トリアジン、ジブチルアミノジメルカプトトリアジ
ン、アニリノジメルカプトトリアジンなどが挙げられる
。また、銅と安定なキレート化合物をつくる化合物であ
っても良い、たとえば、ベンゾトリアゾール、EDTA
(エチレンジアミンテトラ酢酸)、ジメチルグリオキ
シム、2−(3,5−ジーter−ブチルー2−ヒドロ
キシフェニル)ベンゾトリアゾール、0−フェナントロ
リン、グリシン、ヒドロキサム酸等である。The copper migration inhibitor mentioned in the above example may be any agent as long as it has the ability to suppress copper migration. For example, mercaptotriazine, 2-mercaptobenzimidazole, and the like. Examples of mercaptotriazine include trimercaptotriazine, trimercapto S-triazine, dibutylaminodimercaptotriazine, anilinodimercaptotriazine, and the like. It may also be a compound that forms a stable chelate compound with copper, such as benzotriazole or EDTA.
(ethylenediaminetetraacetic acid), dimethylglyoxime, 2-(3,5-di-ter-butyl-2-hydroxyphenyl)benzotriazole, 0-phenanthroline, glycine, hydroxamic acid, and the like.
複数の層を積層してなるプリント回路板において、銅マ
イグレーション抑制剤層を設けるのは、銅マイグレーシ
ョン抑制剤の溶液または銅マイグレーション抑制剤を含
有するプライマーを、互いに接して積層される層の少な
くとも一方の層の両面または片面に塗布することによっ
て行うことができる。塗布の方法は、たとえば、デイツ
プ法、フローコーI・法、印刷法等がある。In a printed circuit board formed by laminating a plurality of layers, a copper migration inhibitor layer is provided by applying a solution of a copper migration inhibitor or a primer containing a copper migration inhibitor to at least one of the layers laminated in contact with each other. This can be done by applying the layer on both sides or on one side. Application methods include, for example, dip method, Flowco I method, printing method, and the like.
また、銅マイグレーション抑制剤層のフィルム化が可能
な場合は、フィルムラミネート法も選択できる。Further, if it is possible to form the copper migration inhibitor layer into a film, a film lamination method can also be selected.
本発明においては、基板上にアディティブ法、セミアデ
イティブ法、サブトラクティブ法等により、回路を形成
してプリント回路基板を製造する場合に、次の(al〜
(klの各工程の内、少なくとも1つの工程の前もしく
は後に銅マイグレーション抑制剤による処理を行うこと
ができる。In the present invention, when manufacturing a printed circuit board by forming a circuit on a substrate by an additive method, a semi-additive method, a subtractive method, etc., the following (al to
(A treatment with a copper migration inhibitor can be performed before or after at least one of the steps of kl.
(a) スルーホールを穿孔した直後。(a) Immediately after drilling the through hole.
(b) 基板にアディティブ法用接着剤層を形成する
直前。(b) Immediately before forming the additive adhesive layer on the substrate.
(C) 基板にメツキレジストを設ける直前。(C) Immediately before applying plating resist to the substrate.
(dl 基板にソルダーレジストを設ける直前。(dl Immediately before placing solder resist on the board.
(e) アディティブ法用接着剤層にメツキレジスト
を設ける直前。(e) Immediately before applying a plating resist to the additive adhesive layer.
(0アゾ、イティブ法用接着剤層にソルダーレジストを
設ける直前。(Immediately before applying a solder resist to the adhesive layer for the 0Azo and Etive method.
(g) 基板上に絶縁層を設ける直前。(g) Immediately before providing an insulating layer on the substrate.
(h) 絶縁層上にアディティブ法用接着剤層を設け
る直前。(h) Immediately before providing the additive adhesive layer on the insulating layer.
(11メツキレジスト上にソルダーレジストを設ける直
前。(Immediately before placing the solder resist on the 11-metsuki resist.
(31多層プリント回路基板を製造する工程において、
内層回路基板上に絶縁層および/またはアディティブ法
用接着剤層を設ける直前。(31 In the process of manufacturing a multilayer printed circuit board,
Immediately before providing an insulating layer and/or an additive adhesive layer on the inner layer circuit board.
+kl フレキシブルプリイト回路基板を製造する工
程において、回路基板上にカバーレイフィルム層を設け
る直前。+kl Immediately before providing a coverlay film layer on a circuit board in the process of manufacturing a flexible printed circuit board.
例として、各種アディティブ法の工程を挙げる。それら
の工程の前もしくは後おいて、銅マイグレーション抑制
剤による処理を行うことができる。Examples include various additive process steps. Treatment with a copper migration inhibitor can be performed before or after these steps.
パートリアディティブ(テンティング
両面銅張り積層板を穴開は加工する工程、これに触媒を
付与する工程、エツチングレジスト処理する工程、エツ
チングを行う工程、エツチングレジストを剥離する工程
、メンキレジスト処理を行う工程、スルーホールに無電
解メツキ処理をする工程からなる。Part additive (tenting process of drilling holes in a double-sided copper-clad laminate, applying a catalyst to it, treating it with an etching resist, etching it, peeling off the etching resist, treating it with a menki resist) This process consists of applying electroless plating to the through holes.
セミアデイティブ(パネルメッキ )
両面銅張り積層板を穴開は加工する工程、これに触媒を
付与する工程、全面無電解銅メツキ処理する工程、エツ
チングレジスト処理する工程、エツチングを行う工程、
エツチングレジストを剥離する工程、ソルダーレジスト
処理する工程からなる。Semi-additive (panel plating) A process of drilling holes in a double-sided copper-clad laminate, a process of applying a catalyst to it, a process of electroless copper plating on the entire surface, a process of etching resist treatment, a process of etching,
It consists of a step of peeling off the etching resist and a step of treating the solder resist.
セミアデイティブ(パターンメ キ法〉絶縁基板の両面
にアディティブ法用接着剤層を設ける工程、これを穴開
は加工する工程、この表面を粗化し、触媒を付与する工
程、全面無電解銅メツキ処理(3〜5μm)する工程、
エツチングレジスト処理する工程、パターン電気メツキ
を行う工程、エツチングレジストを剥離する工程、クイ
ックエツチング後にソルダーレジスト処理する工程から
なる。Semi-additive (pattern plating method) The process of providing an additive adhesive layer on both sides of an insulating substrate, the process of drilling holes in this process, the process of roughening this surface and applying a catalyst, and the process of electroless copper plating on the entire surface. processing (3 to 5 μm),
The process consists of an etching resist processing step, a pattern electroplating step, an etching resist peeling step, and a solder resist processing step after quick etching.
ソルダー゛ −イブ
wA縁縁板板両面にアディティブ法用接着剤層を設ける
工程、これを穴開は加工する工程、この表面を粗化し、
触媒を付与する工程、メツキレジスト処理する工程、無
電解銅メツキ処理する工程、ソルダーレジスト処理する
工程からなる。A process of providing an adhesive layer for additive method on both sides of the solder plate wA edge plate, a process of drilling holes in this, and a process of roughening this surface,
It consists of a step of applying a catalyst, a step of plating resist treatment, a step of electroless copper plating treatment, and a step of performing solder resist treatment.
以下に実施例および比較例を示す。Examples and comparative examples are shown below.
実施例1〜3
第3図に示す構造の試験回路を作製した。これは、絶縁
基板21、すなわち片面銅張り積層板(FR−4)をエ
ツチングによりパターン化後、その表面に銅マイグレー
ション抑制剤N24を設け、さらに絶縁樹脂層23を設
けたものである。Examples 1 to 3 Test circuits having the structure shown in FIG. 3 were manufactured. In this example, an insulating substrate 21, that is, a single-sided copper-clad laminate (FR-4), is patterned by etching, and then a copper migration inhibitor N24 is provided on the surface thereof, and an insulating resin layer 23 is further provided.
22は回路を表わす。この場合に銅マイグレーション抑
制剤を3%含有するブチルセロソルブ溶液を用い、銅マ
イグレーション抑制剤N24を設けた。22 represents a circuit. In this case, a butyl cellosolve solution containing 3% copper migration inhibitor was used to provide copper migration inhibitor N24.
比較例
実施例において、銅マイグレーシジン抑制剤層を設けず
に、同様の試験回路を作製した。Comparative Example In the example, a similar test circuit was made without the copper migration inhibitor layer.
これらの試験回路について、下記の電圧印加条件を経た
後、線間絶縁抵抗を測定した。その結果を第1表に示す
。Regarding these test circuits, the line-to-line insulation resistance was measured after passing through the voltage application conditions described below. The results are shown in Table 1.
1上」U叱に住
クシ型電極 線幅/線間=0.510.5(mm)10
7”CX95%RH(7”レツ’iヤ ’)7/’F
)o C100V x 8時間
エ ゛
DClooV 1分間充電後の抵抗値第1表から、銅
マイグレーション抑制剤層を設けたもの(実施例1〜3
)は、電圧印加後において、線間絶縁抵抗がほとんど低
下せず、デンドライトも発生しないことが判る。1 above" U-shaped comb-shaped electrode line width/line spacing = 0.510.5 (mm) 10
7"CX95%RH (7"Let's do it)7/'F
) o C100V x 8 hours ADClooV Resistance value after 1 minute charging From Table 1, those provided with a copper migration inhibitor layer (Examples 1 to 3)
), it can be seen that the line-to-line insulation resistance hardly decreases after voltage application, and dendrites do not occur.
(本真以下余白)
〔発明の効果〕
以上説明したように本発明によれば、複数の層を積層さ
せてなるプリント回路板において、互いに接して積層さ
れる層の少なくとも一方の層の両面または片面に銅マイ
グレーシリン抑制剤層を設けることにより、銅マイグレ
ーションの発生、進行を十分に抑制することが可能にな
る。(Margins below the main text) [Effects of the Invention] As explained above, according to the present invention, in a printed circuit board formed by laminating a plurality of layers, both sides or By providing a copper migration inhibitor layer on one side, it becomes possible to sufficiently suppress the occurrence and progress of copper migration.
第1図乃至第3図はそれぞれ本発明のプリント回路板の
一例の断面説明図である。
1・・・絶縁基板、2・・・回路、3・・・絶縁層、4
・・・銅マイグレーション抑制剤層、11・・・アンク
ラッド絶縁基板、12・・・アディティブ法用接着剤層
、13・・・メツキレジスト、14・・・回路、15・
・・絶縁層、16・・・銅マイ、グレージョン抑制剤層
、21・・・絶縁基板、22・・・回路、23・・・絶
縁樹脂層、24・・・銅マイグレーション抑制剤層。1 to 3 are cross-sectional explanatory views of an example of the printed circuit board of the present invention. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Circuit, 3... Insulating layer, 4
... Copper migration inhibitor layer, 11 ... Unclad insulating substrate, 12 ... Adhesive layer for additive method, 13 ... Metsuki resist, 14 ... Circuit, 15.
...Insulating layer, 16...Copper migration suppressor layer, 21...Insulating substrate, 22...Circuit, 23...Insulating resin layer, 24...Copper migration suppressor layer.
Claims (1)
いに接して積層される層の少なくとも一方の層の両面ま
たは片面に銅マイグレーション抑制剤層を設けたプリン
ト回路板。A printed circuit board formed by laminating a plurality of layers, in which a copper migration inhibitor layer is provided on both or one side of at least one of the layers laminated in contact with each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32262689A JPH03185792A (en) | 1989-12-14 | 1989-12-14 | Printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32262689A JPH03185792A (en) | 1989-12-14 | 1989-12-14 | Printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03185792A true JPH03185792A (en) | 1991-08-13 |
Family
ID=18145817
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32262689A Pending JPH03185792A (en) | 1989-12-14 | 1989-12-14 | Printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03185792A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011160004A (en) * | 2011-05-13 | 2011-08-18 | Unimatec Co Ltd | Copper-transition resistance agent for electronic circuit board |
| JP2012163083A (en) * | 2011-02-09 | 2012-08-30 | Ihi Corp | Variable nozzle unit and variable capacity supercharger |
-
1989
- 1989-12-14 JP JP32262689A patent/JPH03185792A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012163083A (en) * | 2011-02-09 | 2012-08-30 | Ihi Corp | Variable nozzle unit and variable capacity supercharger |
| JP2011160004A (en) * | 2011-05-13 | 2011-08-18 | Unimatec Co Ltd | Copper-transition resistance agent for electronic circuit board |
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