JPH03201686A - Magnetic recording and reproducing device and reproducing circuit for the same - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a magnetic recording and reproducing device C (hereinafter referred to as VTR) for recording and reproducing video and audio signals of TV etc. and its reproducing circuit. The present invention relates to a monitor mechanism capable of monitoring reproduced information on a TV screen during high-speed dubbing in which recorded information is copied at high speed to an unrecorded medium of another recording device such as a VTR.

[Conventional technology]

By connecting multiple VTRs and rotating and running the cylinders and tape running speeds of the playback machine and recorder at N times speed, the low-frequency conversion carrier color signal and frequency modulation obtained by playing back from the recorded tape in the playback machine are generated. There is a known method of copying (dubbing) the luminance signal as it is to the unrecorded tape or input recording signal of the recording machine at N times the speed, but this method has the serious problem that the image being dubbed cannot be monitored. Ta.

Therefore, in order to solve this problem, Japanese Patent Laid-Open No. 625788
As described in the publication, it has a digital memory that stores the reproduced demodulated video signal for L fields (l≦L≦N), and performs vertical synchronization with the video signal for one field of the stored video signals. VTRs and monitor devices have been proposed that output a vertical synchronization signal obtained by frequency-dividing a signal by N.

[Problem to be solved by the invention]

However, in the above conventional technology, the frequency of the reproduced signal reproduced at high speed is N times that of the signal reproduced at standard speed, so F
There is a problem in that an M demodulator with a dynamic range N times larger has to be used, and the device becomes expensive because it is necessary to significantly improve the performance of the demodulator.

Another problem was that no consideration was given to color signals.

The present invention provides a VTR capable of high-speed dubbing and output of a monitor signal for monitoring the video signal being dubbed, and a playback circuit for the same, in which the playback circuit during high-speed playback and the playback circuit during standard playback, especially the demodulation circuit, are used together as much as possible. It is an object of the present invention to provide a VTR and its reproducing circuit capable of monitoring color images during high-speed dubbing with a small number of additional circuits.

[Means to solve the problem]

The VTR and its reproducing circuit of the present invention switch the frequency-modulated luminance signal reproduced from the recorded tape to the frequency-modulated luminance signal with the frequency lowered to 1/H during N-times high-speed reproduction using a countdown circuit. It is now input to the frequency demodulator.

In addition, the frequency of the oscillation signal input to the frequency converter that converts the reproduced low-frequency conversion color signal to the high-frequency carrier color signal is f
sc+Nft (fsc; high frequency carrier color signal frequency, f,
(low frequency conversion color signal frequency).

Furthermore, a synchronization signal replacement circuit is provided that replaces the horizontal and vertical synchronization signals included in the frequency-modulated luminance signal with a signal obtained by thinning N input signals into one synchronization signal.

[Effect]

During N times high-speed playback, the frequency of the frequency-modulated luminance signal played back from the recorded tape is N times that of standard playback, but the frequency is lowered to 1/H times by the countdown circuit, so it is different from that during standard playback. The frequency of the same carrier wave.

Similarly, the horizontal and vertical synchronization signals included in the frequency-modulated luminance signal are compressed to 1/N of the period of the synchronization signal during standard playback, but a synchronization signal replacement circuit that thins out the input synchronization signal to 1/N is used. A synchronization signal with the same cycle as during standard playback can be obtained.

Furthermore, the frequency of the carrier wave of the high-frequency carrier color signal obtained by frequency-converting the reproduced low-frequency converted color signal by a frequency converter becomes the same rsc as the frequency during standard reproduction.

〔Example〕

The present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of a VTR according to the present invention in a dubbing state.
The circuit block diagrams in FIGS. 2 to 4 are detailed diagrams of main circuit elements of the block diagram shown in FIG. 1.

In FIG. 1, each VTR is surrounded by a broken line, and is connected from a playback device 1 to a recorder 2 by connection lines C+ and Cz.

The VTR described in this embodiment is of the VH3 system, and a double speed mode can be selected as a high speed dubbing mode.

Describe the components or main circuits of the device. 3,
4 is a cylinder whose rotation is controlled, 5 and 6 are recorded tapes and unrecorded tapes respectively, 7 and 8 are capstans that run the recording tape at a constant speed, and 9 and 10 are recording/reproducing magnetic heads that rotate at high speed together with the cylinders. , 11 is a double speed and standard mode reproduction circuit (hereinafter referred to as H/SPB circuit), 12 is a standard mode and monitor output circuit (hereinafter referred to as S/SPB circuit).
/MOP circuit), 13 is a standard mode recording circuit, 1
4.15 is a servo circuit that controls the rotational drive system, 16.1
7 is a mode control circuit (hereinafter referred to as MC circuit) that controls switching according to the standard and double speed modes; 18 and 19 are a preamplifier and a recording amplifier, respectively; 20
．． 21 is a channel switch for switching tracks on the playback and recording tapes; 22 and 23 are double-speed luminance signal equalizers and double-speed color signal equalizers, respectively; 24°25
26 is a Y/C mixer, and T is an external terminal.

Next, the operation will be explained.

First, when the standard mode is selected, cylinder 3.4 and tape 5.
6 rotates and travels at standard speed. On the playback machine l side, the image information recorded on the recording tape 5 is transferred to the magnetic head 9.
preamplifier 18 and channel switch 2.
The reproduced image signal is input to the H/S P8 circuit through the H/S P8 circuit. Here, the reproduced image signal is subjected to Y/C separation processing and Y/C
They become separated signals, which are respectively FM demodulated and frequency converted to restore them to the original luminance signal and carrier color signal.Then they undergo post-processing such as sub-emphasis and noise attenuation processing in the next S/MOP circuit and are sent to external terminal T2. Output.

On the other hand, on the recorder 2 side, input terminal T, input terminal Y/
The C-separated video signal undergoes FM modulation and low frequency carrier conversion processing in the standard mode recording circuit 13, passes through switches 24 and 25 with the standard (S) side selected, and is superimposed in the mixer 26 to become a recorded composite video signal. Switch 21, recording amplifier 1
9 and is recorded on the unrecorded tape 6.

When double speed mode is selected and dubbing, press cylinder 3.
4 and the recording tape 5.6 are rotated and run at twice the speed of the standard mode under the control of the servo circuit 14.15 which is controlled by the MC circuit. At this time, the time axis of the reproduced video signal reproduced by the reproduction magnetic head 9 is compressed and the frequency is twice that of the standard mode. MC in H/S P 8 circuit
The processing circuit is switched by the control of the circuit, and the reproduction Y/C
The separated signal undergoes signal processing suitable for double-speed dubbing and is output to the external terminal T1.

On the recorder 2 side, double speed playback Y input from input terminal T4
/C minute 11iI signal is subjected to high frequency correction by double speed equalizer 22.23, passes through switch 24.25 which selects double speed side under the control of MC circuit, and is superimposed by mixer 26 to become a recording composite video signal, which is recorded magnetically. The head IO records the data on the recording chip 16.

On the other hand, the double-speed playback video signal separated by the H/S P 8 circuit for monitoring double-speed dubbing is subjected to FM demodulation and frequency high-frequency conversion processing, and is then restored to a carrier wave of the same frequency as the standard mode and sent to S/MOP. It is output to the circuit 12. In the S/MOP circuit, the time axis of the reproduced video signal is 1/2
Since the signal is compressed into a synchronous signal, a synchronizing signal is added and outputted from the external terminal T3 as a monitor output.

The details of the above double-speed playback video signal processing are shown in Figures 2 to 4.
Description will be given with reference to detailed diagrams of main circuit elements shown in the figure.

Figure 2 shows a detailed diagram of the H/S P8 circuit, where 27.28 is a high-pass filter for double speed and standard use (hereinafter referred to as PF), and 29.30 is a high pass filter for double speed and standard use. Low-pass filter (hereinafter referred to as LPF), 31. 32 is a double speed and standard playback equalizer (hereinafter referred to as EQ), 33.
34 is a limiter that limits the amplitude, 35 is a double speed peaking circuit, 36 is a countdown circuit that halves the frequency of the input signal, 37 is an FM demodulation circuit, 38.39 is a double speed and standard de-emphasis circuit (hereinafter referred to as 40 is an automatic chromaticity control circuit (hereinafter referred to as ACC circuit), 41 and 42 are main and side frequency converters, 43 is a phase shift circuit that shifts the phase for each IH, and 44 is a 2 that reduces the frequency by half. Frequency divider, 45 is a variable voltage controlled oscillator (hereinafter referred to as VCO), 46 is a burst gate that separates the burst signal, 47 is an oscillator (hereinafter referred to as OSC), 48
is a phase comparator, and 49 to 53 are double-speed standard mode changeover switches.

Next, the operation will be explained.

When the standard mode is selected in the reproduction mode, the switches 49 to 53 are set to the standard (S) side under the control of the MC circuit. The input reproduced video signal is Y/C separated by the HPF and LPF, the luminance signal is subjected to high frequency correction by the EQ 32, and then the AM wave component is removed by the limiter 33.
The signal is input to the FM demodulator 37. In the luminance signal demodulated by the FM demodulator 37, the high frequency component that was emphasized during recording is DE
The F circuit 39 returns the signal to its original state and outputs it as a reproduced luminance signal.

On the other hand, the chromaticity signal separated by the LPF 30 undergoes level control in the ACC circuit, and then is frequency-converted by the main frequency converter 41 into high frequency band No. 13 through a hetero gain process with the high frequency oscillation signal, and is output as a carrier chromaticity signal. be done.

The high frequency oscillation signal applied to the main frequency converter 41 is subjected to automatic phase control (APC) and phase shift processing described below.

That is, the burst signal extracted by the burst gate 46 and the oscillation signal having the same frequency tsc as the subcarrier output from O20 are phase-compared by the phase comparator 48, and a phase difference voltage is supplied to the VCO 45. The VCO 45 outputs to the frequency divider 44 an oscillation signal whose frequency is controlled around a frequency 80 times that of the horizontal synchronizing signal f)I according to the phase difference voltage.

The oscillation signal whose frequency has been halved to 4Of by the frequency divider H44 is shifted in phase by 90' for each IH in the phase shift circuit 43, and is heterodyned with the oscillation signal of frequency f3c output from the 03C47 in the side frequency converter 42. The combined high frequency signal of frequency fsc+4of□ is sent to the main frequency converter 41
Output to.

Next, a case where the double speed mode is selected will be explained.

As mentioned above, since the reproduced signal reproduced at double speed has twice the frequency of standard reproduction, HPF, LPF, EQ, D
All EFs are switched to double speed under the control of the MC circuit.

The FM luminance signal output from the Y/C separated plug-in vine 33 has its degraded frequency characteristics corrected by the EQ 31 in the peaking circuit 35, the AM signal is removed by the limiter 34, and is output to the external terminal T as a recording output. be done.

Similarly, the low frequency conversion chromaticity signal output from the ACC circuit 40 is output as is to the external terminal T1 as a recording output.

On the other hand, the FM luminance signal separated from the output of the limiter 33 as a monitor signal is sent to a countdown circuit 36 whose frequency is 1.
Since it is converted to /2 and output, the standard F M is the same as -1.
It can be demodulated by the demodulation circuit 37.

In addition, when the low frequency conversion chromaticity monitor signal separated from the ACC circuit output is frequency converted by the frequency converter 41, by switching the frequency of the high frequency oscillation signal that is heterogain coupled, a subcarrier of the same frequency as the standard mode is generated. is transported to and output.

That is, in the double speed mode, the side frequency converter 42 outputs 0SC47.
The oscillation signal from the VCO 45 that is heterogain coupled with the oscillation signal of the frequency fsc output from the MC circuit 16 is switched under the control of the MC circuit 16 and is input to the side frequency converter 42 without passing through the frequency divider 44. The frequency of the oscillation signal output by hetero gain coupling is fsc + 40f
It becomes Hx2.

The reproduced low-pass conversion chromaticity signal frequency input from the ACC circuit 40 to the main frequency converter 41 is 4Of□×2 as described above.
Therefore, the carrier color signal output from the main frequency converter 41 is (fsc+40hX2)-(40fgX2
) = fse.

In this embodiment, the mode-switchable APC circuit was constructed using a side frequency converter and a frequency divider by 2, but as shown in the modification shown in Fig. 3, the frequencies are different (fse + 40fH) and (fsc + 4of It is also possible to use two oscillators 54 and 55 that output oscillation signals with a frequency of .

FIG. 4 shows a detailed diagram of the S/MOP circuit.

In FIG. 4, 56 is a time axis conversion circuit, 57 is a decoder that converts a chromaticity signal into two color difference signals, 58 is an encoder that returns to a carrier color signal, 59 is a chromaticity processing circuit, 60 is a luminance processing circuit, 61. 62 is a mode changeover switch.

The operation will be explained. When the standard mode is selected, the switches 61 and 62 are set to the standard (S) side, and the luminance and chromaticity signals are subjected to the post-processing described above and output as reproduced Y/C separated signals to the external terminal T2.

When the double speed mode is selected, the input reproduced Y/C separated signal is subjected to time axis conversion processing by the time axis conversion circuit 56. As the time axis conversion circuit 56, a known conversion circuit including, for example, an A/D converter, a field memory, a memory control circuit, and a D/A converter can be used, and the memorized image signal is selectively output for each field. By doing this, the time-axis compressed input image signal is converted into an output signal with the same time axis as in the standard mode.

As described above, in this embodiment, the reproduced video signal is separated by 770, and the frequency of the FM luminance signal is reduced to 1/2 using a countdown circuit.
The input signal frequency from the local oscillator, which is input to the converter that converts the frequency of the low frequency converted chromaticity signal, is set to fsc + 40fHx2, and the obtained Y/C separated video signal is time-axis converted. Many circuit elements, including the FM demodulator, can be used in both standard mode and double speed mode. Therefore, by adding a small amount of additional circuitry, the video being dubbed at double speed can be monitored on a normal TV receiver. If the field memory used in the time base conversion circuit is also used as various digital processing circuits such as a noise reduction time base collector, the above effect will be further enhanced.

FIG. 5 shows another embodiment of the present invention in which the S/MOP circuit 12 is constructed using simple circuit elements.

In the same figure (a), 63 and 64 are horizontal and vertical synchronization signal separation circuits (hereinafter referred to as H3S and VSS circuits);
65, 66 is a 2 frequency divider, 67 is a synchronization signal switching circuit, 6
Reference numeral 8 denotes a mode changeover switch, and since the other parts are the same as those in FIGS. 1 and 4, the same reference numerals are given and explanations are omitted (the same applies hereinafter).

The operation will be explained.

When standard mode is selected, switch 68 is set to standard (S).
Since the Y/C side is selected, the reproduced video signal is subjected to the same post-processing as explained in FIG. 4 and is outputted to the external output terminal T2 as a reproduced Y/C separated signal.

When the playback mode is double speed mode, switch 68 is set to double speed (H
) side is selected, and after horizontal and vertical synchronizing signals are separated and extracted from the luminance signal demodulated by the H/SPB circuit in the H3S circuit 63 and the VSS circuit 64, respectively, the frequency divider 6
5 and 66, the frequency is halved to form synchronization signals with the same period as the standard mode, and the synchronization exchange circuit 6
7, it is replaced with a new synchronization signal. The obtained double speed monitor output is output from the external terminal T.

FIG. 6(a) shows an image displayed on a picture tube by inputting the double-speed monitor output according to this embodiment to the Y/C separation input terminal of a TV receiver. In this embodiment, since the reproduced image signal is not subjected to thinning processing or the like for each field, substantially the same image 72 divided into four parts is displayed as shown in the figure.

In this embodiment, since time axis conversion processing using digital processing is not performed, there is an advantage that the circuit can be configured without using an expensive large-capacity memory.

FIG. 5(b) shows that in the embodiment shown in FIG. 5(a),
This figure shows a modification example that makes it possible to replace a part of the four-divided image shown in FIG. 6(a) with a character display image or a non-display image.

In the figure, 69 is a blanking pulse generator, 70
71 is a blanking character superimposition circuit, and 71 is a blanking circuit. To explain the operation, the blanking pulse generator generates blanking pulses synchronized with horizontal and vertical synchronizing signals and supplies them to the blanking character superimposition circuit 70 and the blanking circuit 71. Blanking character superimposition circuit 70 and blanking circuit 71 superimpose a pulse signal on a luminance signal and a chromaticity signal, respectively, and apply a blanking pulse to an image area to be erased on a display screen, and a character information to an area where character information is to be superimposed. Superimpose information pulses. Therefore, according to this example, as shown in FIG. 6(b), for example, only one divided screen 72' of the four divided display screen is left and the other image areas are erased, and double speed dubbing is performed. Character information 73 can be displayed on the screen.

In this way, a 1/4 screen size monitor image can be displayed without any discomfort, and the operating status can be easily understood.

In the embodiments described above, we have described only those in which the high speed dubbing mode can select double speed, but if the sliding conditions between the magnetic head and the recording tape permit, of course
(N>2) Double speed dubbing is possible. For example, when dubbing at 3x speed, the frequency reduction in the countdown circuit 36 is reduced to 1/3, and the oscillation frequency of the VCO is set to 40fttx.
3.2 frequency divider 44 is a 3 frequency divider, the conversion ratio of the time axis conversion circuit 56 is tripled in the first embodiment, and 2 frequency dividers 65 and 66 are frequency divided by 3 in the second embodiment. It would be better to change it to a container.

Further, in the embodiment, a VH3 type VTR has been described, but the present invention can be applied in exactly the same way to a β type or 8ξ revideo in which the chromaticity signal phase is inverted line by line every other field.

〔Effect of the invention〕

As explained above, according to the present invention, the image signal reproduced at N times the speed is counted down to 1/N for the luminance signal, and then the frequency is demodulated, and for the chromaticity signal, the oscillation signal is input to the frequency converter. By adjusting the frequency, the subsequent reproducing circuit can be used in common with that of the standard mode, so it is possible to provide a VTR and its reproducing circuit that can monitor color images during high-speed dubbing without using expensive circuit elements.

Furthermore, by using circuit elements for high-speed mode and standard mode, the circuit design can be made compact and costs can be reduced.

[Brief explanation of drawings]

FIG. 1 is a VTR circuit block diagram of an embodiment of the present invention, and FIG.
4 to 4 are detailed views of the main circuit elements, FIG. 5 is a detailed view of the main circuit elements of another embodiment, and FIG. 6 is a monitor image displayed on the picture tube. . 9, lO...Magnetic head, 11...
...Double speed, standard mode playback circuit, 12...
...Standard mode, monitor output circuit, 13...
...Standard mode recording circuit, 41.42...
...Frequency converter, 45...Variable voltage control oscillator, 63...Horizontal synchronization separation circuit, 64...Vertical synchronization separation circuit. Agent Patent Attorney Kenji Takeshi (1 other person) Figure 5 (0) tb No. 6B1! 10 no (b)

Claims (1)

[Claims] 1. In a reproducing circuit of a magnetic recording/reproducing device capable of switching the rotational speed of the cylinder and the running speed of the recording tape between a standard mode and an N (N>1) times speed mode, the frequency is input to a frequency demodulator. A reproducing circuit for a magnetic recording/reproducing device, comprising a countdown circuit that reduces a reproduced frequency modulated luminance signal to a frequency of 1/N and outputs the reduced frequency. 2. In the reproducing circuit of a magnetic recording/reproducing device that can switch the rotational speed of the cylinder and the running speed of the recording tape between standard mode and N-times speed mode, the frequency at which the reproduced low-band conversion chromaticity signal is converted into the high-band transport chromaticity signal Generate an oscillation signal that makes the frequency of the oscillation signal supplied to the converter equal to the sum of the frequency of the standard mode high-band carrier chromaticity signal and the frequency of the low-band converted chromaticity signal multiplied by N. A reproducing circuit for a magnetic recording/reproducing device, comprising an oscillation signal generating circuit. 3. The oscillation signal generated from the oscillation signal generation circuit has an oscillation signal with a frequency of a high-frequency carrier chromaticity signal in the standard mode, and an oscillation signal with a frequency N times the frequency of the low-frequency conversion chromaticity signal. 3. The reproducing circuit for a magnetic recording/reproducing device according to claim 2, which is obtained by frequency conversion. 4. The magnetic recording and reproducing apparatus according to any one of claims 1 to 3, further comprising a synchronization signal changing circuit that converts horizontal and vertical synchronization signals included in the luminance signal reproduced in the N-times speed mode into synchronization signals thinned out to 1/N. regeneration circuit. 5. A magnetic recording and reproducing device comprising the reproducing circuit according to any one of claims 1 to 4.