JPH03206646A - Computing apparatus for interconnection capacity - Google Patents

Abstract

PURPOSE:To eliminate an error between a design and an actuality by a method wherein, when an interconnection is formed so as to be overlapped with other interconnection-layer regions, it is divided into parts to be overlapped and parts not to be overlapped, interconnection capacities of the individual divided parts are computed on the basis of a unit interconnection capacity stored in a storage device in advance and the interconnection capacities of the individual divided parts are totaled. CONSTITUTION:When an interconnection pattern is formed by using an automatic interconnection processing device and it is input from an input device 7, the pattern is stored in a memory 8 by using a computer 6. Unit interconnection capacities of individual interconnections 2 to 4, i.e. unit interconnection capacities in the X-direction and the Y-direction of the individual interconnections, and unit interconnection capacities formed when the individual interconnections are overlapped with a power-supply interconnection layer 5 are read out and stored in a memory 9. Then, coordinates D1 to D4 of intersecting points at boundaries between the individual interconnections 2 to 4 and the interconnection layer 5 are computed by using the computer 6; the individual interconnections 2 to 4 are divided by using the data D1 to D4; interconnection capacities of individual divided parts are computed on the basis of interconnection lengths and the unit interconnection capacities. After that, They are totaled; interconnections without a capacity error are arranged.

Description

[Detailed Description of the Invention] [Summary] Regarding a wiring capacitance calculation device that calculates the wiring capacitance of each wiring when designing a wiring pattern of a semiconductor integrated circuit, it is possible to calculate the wiring capacitance calculated at the design stage and the wiring capacitance on the actual integrated circuit. The purpose of the present invention is to provide a wiring capacitance calculation device that does not cause an error between the wiring capacitance and the wiring capacitance. a storage device that stores the unit wiring capacitance of , an input device that inputs data on the positional coordinates of various types of wiring layers and wirings, and a device that determines whether or not each wiring inputted by the input device overlaps with another wiring layer area. The unit wiring capacitance corresponding to each wiring part is read out from the storage device to calculate the wiring capacitance of each wiring part, and the wiring capacitance of each wiring part is totaled to calculate the wiring capacity of the wiring. The wiring capacitance calculation device calculates the wiring capacitance.

[Industrial application field]

The present invention relates to a wiring capacitance calculation device that calculates the wiring capacitance of each wiring when designing a wiring pattern of a semiconductor integrated circuit.

In recent years, semiconductor integrated circuits have adopted a multilayer wiring structure based on their high degree of integration, or have been designed in such a manner that the distances between each wiring have become closer to each other.

In such semiconductor integrated circuits, the wiring capacitance that occurs between each wiring has a large effect on its operation, so the wiring pattern is designed after calculating in advance whether the wiring capacitance between each wiring satisfies a predetermined value. has been done.

[Conventional technology]

The conventional procedure for calculating the wiring capacitance of an integrated circuit pattern as shown in FIG. 5 using a wiring capacitance calculation device is as follows.
In the figure, a memory section 1 in which a large number of memory elements are formed has first and second wiring lines 2 bent into a rectangular shape in the X-Y direction (the vertical direction is the X direction and the horizontal direction is the Y direction in the drawing). , 3 are connected, and a third straight line 4 in the Y direction is provided near the memory section l. Each wiring like this 2
, 3 and 4 in the X direction and the Y direction are formed in separate wiring layers in the vertical direction and are connected through contact holes 10, respectively.

In addition, as shown by dashed line hatching in the same figure, the memory section 1
A power supply wiring layer 5 for supplying power to the memory section 1 is formed in an upper layer having approximately the same area as the memory section 1.

The wiring capacitance of each wiring 2, 3.4 is calculated from the input device of the calculation device. When the X-Y coordinate data of 4 is input, the calculation device calculates the wiring capacitance of each wiring 2, 3.4 based on the wiring length in the X direction and the Y direction. That is, for example, in the first wiring 2, the unit wiring capacitance per unit length of the wiring part in the X direction, the unit wiring capacitance per unit length of the wiring part in the Y direction, and the wiring length in the X and Y directions are multiplied. The wiring capacitance is calculated, and for example, for the third wiring 4, the wiring capacitance is calculated by multiplying the unit wiring capacitance of the wiring in the Y direction by the wiring length.

[Problem to be solved by the invention]

The procedure for calculating the wiring capacitance by the calculation device as described above does not take into account at all the increase in unit wiring capacitance at the position where the first and second wirings 2 and 3 overlap the power supply wiring layer 5;
Since the area of the power supply wiring layer 5 is small and the length of the wiring overlapping with the power supply wiring layer 5 is relatively short, a large error did not occur between the calculated wiring capacitance and the actual wiring capacitance of each wiring 2 and 3.

However, due to the recent demand for faster speeds of the memory section 1, when the power supply wiring layer 5 is expanded over a wide area in the upper layer of the memory section 1 as shown in FIG. The problem is that because the portion that overlaps with the wiring layer 5 and increases the unit wiring capacitance increases, a large error occurs between the calculated wiring capacitance and the actual wiring capacitance, which may hinder the normal operation of this integrated circuit. was there.

An object of the present invention is to provide a wiring capacitance calculation device that does not cause an error between the calculated wiring capacitance at the design stage and the actual wiring capacitance on an integrated circuit.

[Means to solve the problem]

FIG. 1 is a diagram explaining the principle of the present invention. That is, the wiring capacitance calculation device includes a storage device 8 that stores a plurality of unit wiring capacitances when wirings are stacked in different wiring layer regions in a semiconductor integrated circuit having a multilayer wiring structure, and a storage device 8 that stores a plurality of unit wiring capacitances in a semiconductor integrated circuit having a multilayer wiring structure, and and an input device 7 for inputting wiring position coordinate data.
and dividing each wiring inputted by the input device 7 into a plurality of wiring parts based on whether or not it overlaps with other wiring layer regions,
A wiring capacitance calculating device that reads out the unit wiring capacitance corresponding to each wiring portion from the storage device 8, calculates the wiring capacitance of each wiring portion, and calculates the wiring capacitance of the wiring by summing up the wiring capacitance of each wiring portion. It consists of 6.

[Effect]

When a wiring is formed so as to overlap another wiring layer area, the wiring is divided into a part that overlaps with the other wiring layer area and a part that does not overlap, and each divided part is divided into the corresponding unit stored in advance in the storage device 8. The wire capacitance is calculated based on the wire capacitance, and the wire capacitance of each divided portion is totaled to calculate the wire capacitance of the wire.

〔Example〕

An embodiment embodying the present invention will be described below with reference to FIGS. 2 to 4. Incidentally, the same components as those in the above embodiment are given the same numbers and the explanation thereof will be omitted.

The basic configuration of the wiring capacitance calculation device of this embodiment will be explained with reference to FIG. 2. An input device 7 is connected to the computer 6, and various wiring layers or a large number of Position data on the X-Y coordinates of the wiring is input. A library 8 connected to the computer 6 stores a large number of unit wiring capacitances per unit length of wiring laid over the power supply wiring layer or other wiring layers. A memory 9, which is also connected to the computer 6, temporarily stores the results of calculations performed by the computer 6.

Next, the case where the wiring capacitance calculation device configured as described above calculates the wiring capacitance of a wiring pattern created by the automatic wiring processing device will be explained with reference to FIGS. 3 and 4. When a wiring pattern as shown in FIG. 4 is formed by the automatic wiring processing device and inputted from the input device 7, the computer 6 stores the wiring pattern in the memory 9.
(STEP L and below STEP are S), and from the library 8, the unit wiring capacitance of each wiring 2, 3.4, that is, the unit wiring capacitance of each wiring 2, 3.4 in the X direction and Y direction, and each Wiring 2, 3. 4 overlaps with the power supply wiring layer 5, and the unit wiring capacitance is read out and stored in the memory 9 (S2).

Next, the computer 6 connects the power supply wiring layer 5 and each wiring 2, 3.
．． Based on the X-Y coordinates of 4, coordinate data D1 to D4 of the intersections between each wiring 2, 3.4 and the boundary of the power supply wiring layer 5 are calculated as shown in FIG. 3 (S3). Then, each wiring 2, 3 . . is calculated (S4).

As described above, in this wiring capacitance calculation device, each wiring 2.3
．． 4 overlaps and does not overlap with the power wiring layer 5, the wiring capacitance is calculated based on the unit wiring capacitance stored in advance, so the calculated value of the wiring capacitance of each wiring 2, 3.4 and the actual It is possible to prevent an error from occurring in the wiring capacitance of each wiring 2, 3.4 in the manufactured integrated circuit.

Therefore, malfunction of the integrated circuit due to an error between the calculated wiring capacitance and the actual wiring capacitance of each wiring 2, 3.4 can be prevented.

〔Effect of the invention〕

As described in detail above, the present invention provides an excellent wiring capacitance calculation device that does not cause an error between the calculated wiring capacitance at the design stage and the wiring capacitance on the actual integrated circuit. be effective.

4

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the principle of the present invention. FIG. 2 is a block diagram showing a wiring capacitance calculation device according to an embodiment of the present invention. FIG. 3 is an explanatory diagram showing a procedure for calculating wiring capacitance according to an embodiment. The figure is a flowchart showing the operation of one embodiment, and FIGS. 5 and 6 are explanatory diagrams showing calculation procedures by a conventional wiring capacitance calculation device. In the figure, 6 is a wire capacitance calculation device (computer), 7 is an input device, and 8 is a unit wire capacitance storage device (library).

Claims (1)

[Claims] 1. A memory device (8) storing a plurality of unit wiring capacitances when wirings are formed in different wiring layer regions in a semiconductor integrated circuit having a multilayer wiring structure; an input device (7) for inputting wiring layer and wiring position coordinate data; and dividing each wiring inputted by the input device (7) into a plurality of wiring parts based on whether or not it overlaps with another wiring layer area. death,
The unit wiring capacitance corresponding to each wiring part is stored in the storage device (8).
), and calculates the wiring capacitance of each wiring portion, and calculates the wiring capacitance of the wiring by summing up the wiring capacitance of each wiring portion. Wiring capacity calculation device.