JPH03211619A - Data processor - Google Patents

Abstract

PURPOSE:To accurately accurately detect whether data rewritten into a substitution memory is normally stored or not by using the coincidence of passwords, sum check and the storage state of data. CONSTITUTION:When abnormality is detected in even one of states such as the coincidence of the passwords in ROM 11 and a FLASH memory 12 being the substituition memory, the result of the sum check of data stored in the memory 12 and the storage state of the memory 12, a central processing unit (MPU) 10 judges that data of the memory 12 is stored in an abnormal state. Consequently, it can accurately be detected that data rewritten into the substitu tion memory 12 is normally or abnormally stored. Thus, the abnormal operation of a data processor can easioly be prevented.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides a system for loading data stored in another memory instead of data stored in a read-only memory and performing operations according to the data. The present invention relates to a data processing device that executes the above, and particularly relates to a data processing device that detects a storage abnormality in the above-mentioned separate memory.

[Conventional technology]

Conventional data processing devices perform a sum check (SUScheck) to check whether the data (program) written to the memory is stored correctly. However, it is determined whether the program is stored abnormally or not to prevent malfunction of the device due to the abnormal program in the memory.

[Problem to be solved by the invention]

However, in a data processing device, a program that replaces data stored in a data read-only memory (ROM) is stored in an alternative memory (flash memory), and operations are performed according to the alternative data. To execute this, use the data indicating the version of the above device when the system was upgraded, for example, as the password.xc!
It must be stored in the ROM and flash memory, and if the passwords do not match, no matter how much data is rewritten to the flash memory and is stored normally, the above data cannot be used to replace the program stored in the ROM. It is not possible to do so. Therefore, there is a problem in that it cannot be determined whether the data in the flash memory is properly stored or not just by performing a sum check.

The present invention was made in view of the above problems, and uses a sum check and a data detection means other than the sum check.
It is an object of the present invention to provide a data processing device that can accurately detect whether data rewritten in a substitute memory is normally stored.

[Means to solve the problem]

In the present invention, a first storage means dedicated for reading data such as a ROM that stores data of a predetermined password, address data corresponding to each phase (data delimiter), and data corresponding to the address data; a readable/writable second storage means such as a flash memory, which stores the data, address data corresponding to the face, and data corresponding to the address data and replacing the data stored in the first storage means. In a data processing device that selects the storage means in which data used during operation is stored, loads desired data corresponding to address data from the selected storage means, and executes an operation according to the data. , password detection means for detecting a match between passwords in the first storage means and second storage means; sum check means for performing a sum check on the data stored in the second storage means; The second storage means includes a CPU comprising a state detection means for detecting the storage state of data stored in the second storage means, and a determination means for determining a memory abnormality of the second storage means in accordance with the detection.

[Effect]

From the rewritten data, the password matches, the sum check is performed, and the storage state of the data is detected, for example whether the last byte is in the erased state or the zero clear state. If the passwords match, and as a result of the sum check, the last byte is set to a predetermined value (for example, °
OO'') and the data storage state is a zero clear state, the determining means determines that the data is stored normally.

Therefore, it is possible to accurately detect abnormal storage of data rewritten in the alternative second storage means based on the above detection results, load the data stored in the second storage means, and perform the corresponding operation. Even if the program is executed, the malfunction of the device will not occur due to the abnormal program.

〔Example〕

Embodiments of the present invention will be described in detail based on the drawings of FIGS. 1 to 3.

FIG. 1 is a block diagram showing a schematic configuration of a data processing device according to the present invention. In the figure, the central processing unit (MP
U) 10 performs R according to instructions from the host computer 20.
The data (program) stored in the OMI 1 and a predetermined storage area in the FLASH memory 12 is loaded, and the operation according to the program is executed. It performs control such as writing control for manually writing a desired program from the computer 20 and detecting a memory abnormality of the written program.

Note that when writing the program sent from the host computer 20 to the FLASH memory 12, the MPU 1O is configured to check each processing state of the writing, for example, the F
“Zero clear” the condition of LASH memory 12
When setting 1" corresponding to "zero clear" to R above,
When storing the condition in the AM14 and setting the above condition to "erase" (a state in which a constant voltage is applied to the FLASH memory 12 for a fixed period of time), the "2'
is stored in the RAM 14, and the condition is set to “
To set the program to "3" corresponding to "program", store "3" in the RAM 14, and set the condition to "ready" (ready to read data).
When setting "0" corresponding to "ready" to R above,
The information is stored sequentially in AM14. Then, when the power is turned on, the FL
When a memory abnormality in the ASH memory 12 is detected, the RAM 14
The condition stored in the FLASH memory 12 is checked, and a message corresponding to the condition is displayed on the display section 15.

ROM II stores data indicating the version of the device when the system is upgraded (password data) and programs corresponding to each phase, and also stores addresses in the above ROM 1 corresponding to each phase (data delimiter). A phase table consisting of (address) data is stored, and by sequentially specifying address data, the MPU 10 can read a desired program from the corresponding storage area in the ROM II.

The FLASH memory 12 is a memory whose data can be rewritten by electrical control, and like the ROM 1l described above,
Password data, programs corresponding to each phase, and the above FLASH memory 12 corresponding to each phase
The ROM/FLASH division according to the present invention, which stores a phase table consisting of address data within and selects the memory (ROMI 1 or FLASH memory 12) from which the program is read for each phase, is data 1.
3 (see Figure 1). That is, ROM/
For example, if the memory from which the program is read is ROMII, data 13 for FLASH is written as "0" in the corresponding phase, and if the memory from which the program is read is FLASH memory 12, "0" is written in the corresponding phase. It is configured by writing data of 1”.

Note that the program data written to the FLASH memory 12 is configured in advance so that the last byte of the sum value as a result of the sum check is "00". In addition, the FLASH memory 12 is provided with MP
It can also be connected to Ul0, in such a case,
For example, when abnormal memory occurs, the FLASH memory can be replaced with a new one.

The MPU10 uses the data 13 to determine the ROM/FLASH division stored in the FLASH memory 12.
A program can be loaded from FLASH memory 12 to replace the program stored in ROMI.

Next, the write control operation for writing a desired program into the FLASH memory 12 according to the present invention will be explained based on the flowchart of FIG. host computer 20
When an instruction is given to rewrite the program in the FLASH memory 12 from, for example, the MPU10 first clears the condition of the FLASH memory stored in the RAM 14 to "zero", as shown in FIG.
In step 101), data of "0" is written in storage areas corresponding to all addresses of the FLASH memory 12 to be rewritten to zero out the program (step 102).

Then, it is determined whether "0° data has been successfully written to all of the storage areas of the FLASH memory 12" (
Step 103). Note that the above-mentioned data write determination is performed by, for example, performing a so-called verify check in which written data is read once to determine whether it has been properly stored. Furthermore, in FIG. 2, it is assumed that subsequent data writing decisions are also based on this verify check.

If "0" data cannot be written to the storage area normally, it is determined that there is a storage error (step 10).
4) Finish the write control operation (see FIG. 2(b)). In addition, if data “0” is successfully written to all storage areas, the next F
The condition of the LASH memory is set to "erase", that is, the corresponding "2" data (step 105), and "FF" data is written to the zero-cleared storage area to erase it (step 106).

Then, it is determined whether the "FF" data has been successfully written into all of the above storage areas (step 107).

Here, if the "FF" data cannot be written normally, the process proceeds to step 104, where it is determined that a storage error has occurred as described above, and the write control operation is terminated. In addition, if the data of "FF" is successfully written to all storage areas, then step 108), a program consisting of 1-byte data sent from the host computer 20 is sequentially written into the erased storage area (step 109), and it is determined whether the 1-byte program has been successfully written ( Step 110).

Here, if the writing of the 1-byte program is not completed normally, the process proceeds to step 104, where it is determined that a storage error has occurred as described above, and the write control operation is ended. If the 1-byte program is successfully written to the storage area and terminated, it is then determined whether all program data has been written (step 111).
).

Here, if writing of the program data is not completed, the process returns to step 109, writes the next 1-byte program, and repeats the above operation. Also,
When writing of all program data is completed, in FIG. 2(b), the remaining storage areas other than the storage area in which the above program has been written are cleared to zero (step 112). Then, determine whether data of “0” was successfully written to all of the remaining storage areas (
Step 113).

Here, if the data "0" cannot be written normally in the remaining storage area, the process proceeds to step 104 where it is determined that a storage error has occurred as described above, and the write control operation is terminated. In addition, if "0" data is successfully written, the condition of the FLASH memory stored in the RAM 14 is set to "ready", that is, the corresponding 0 data (step 114), and the FLASH memory is The write control operation of the program No. 12 is completed.

Next, the control operation for detecting the storage state of the program in the FLASH memory will be explained based on the flowchart of FIG. In the figure, MPU10 first connects the ROMI
The password stored in the memory and the above FLASH memory 1
It is determined whether the password matches the password stored in 2 (step 201).

Here, if the above passwords do not match, FL
It is determined that the program in the ASH memory 12 is stored abnormally (step 202), and then the program is stored in the RAM 14.
The condition of the FLASH memory stored in the memory is checked (step 203), and a message corresponding to the checked condition is displayed on the display section 15 (step 20).
4) End the program storage state detection. Also,
If the above passwords match, the program in the FLASH memory 12 is sum-checked to obtain the resulting sum value (step 204), and it is determined whether the last byte of the sum value is 00''. (Step 205).

Here, if the last byte of the sum value is not "00", the process proceeds to steps 202 and 203, where it is determined that the memory of the program module is abnormal, a message corresponding to the condition of the FLASH memory is displayed, and the above sum value is If the last byte of is “00°,” then the FLASH memory 12
It is determined whether the last byte of the storage area is "FF", that is, in an erased state (step 206).

Here, if the last byte of the storage area is "FF", the process proceeds to steps 202 and 203, where it is determined that there is a memory abnormality in the program, a message corresponding to the condition of the FLASH memory is displayed, and the above-mentioned If the last byte of the storage area is not "FF", then it is determined whether the last byte of the storage area is "00", that is, ready state (step 207).

Here, if the last byte of the above storage area is not "00°", the process proceeds to steps 202 and 203, where it is determined that there is an abnormality in the program memory, a message corresponding to the condition of the FLASH memory is displayed, and the above memory area is If the last byte of the area is "00°," it is determined that the program program in the memory 12 is normally stored (step 208), and the detection of the program storage state is ended.

Therefore, in the present invention, when it is determined that there is an abnormality in the storage of the program by detecting the storage state of the program, a message corresponding to the condition of the FLASH memory at that time is displayed to notify the operator, and the abnormal operation of the device due to the abnormal program is performed. It can also prevent
If it is determined that the memory is normal, the above FLASH memory 1
The ROM/FLASH portion stored in ROM/FLASH 2 is checked from the data 13 to determine the memory to be read from the program for each phase. When the above data is "1#", the above FLASH memory 1 corresponding to the address data is loaded.
It is possible to load a desired program to replace the program in ROMI 1 from the storage area in ROMI 2 and execute the operation corresponding to the loaded program.

〔Effect of the invention〕

As explained above, in the present invention, there is a match between the first period and the second storage means, which is an alternative memory, and a sum check of the data stored in the second storage means. If an abnormality is detected in any one of the results and the storage state of the storage means described above, it is determined that the data of the second memory p is stored in an abnormal state. Therefore, the second storage means device i
- It is possible to accurately detect whether the rewritten data is stored normally or abnormally, it is possible to easily prevent abnormal operation of the data processing device, and it is also possible to increase the versatility of the data processing device. The trend can be improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a data processing device according to the present invention, and FIG. 2 is a block diagram showing a schematic configuration of a data processing device according to the present invention, and FIG.
FIG. 3 is a flowchart for explaining the control operation for detecting the storage state of the program in the FLASH memory by the MPU according to the present invention. It is. 10-, central processing unit (MPU), 11・ROM, 1
2 ・= F L A S H me(-ri, 13-=RO
M/FLASH division is data, 14...RAM, 1
5...Display unit, 20...Host computer. Diagram

Claims (3)

[Claims] (1) A first storage means for storing data of a predetermined password, address data corresponding to each phase, and data corresponding to the address data, and data of the predetermined password, address data corresponding to the phase, and the address; a second storage means for storing data that corresponds to the data and replaces the data stored in the first storage means, and selects the storage means in which data used during operation is stored; In a data processing device that loads desired data corresponding to address data from a selected storage means and executes an operation according to the data, a match between passwords of the first storage means and the second storage means is detected. a password detection means, a sum check means for performing a sum check of the data stored in the second storage means, and a state detection means for detecting the storage state of the data stored in the second storage means; and determining means for determining whether or not there is a memory abnormality in the second storage means in accordance with each of the detections. (2) a first storage means for storing data of a predetermined password, address data corresponding to each phase, and data corresponding to the address data, and data of the predetermined password, address data corresponding to the phase, and the address; a second storage means for storing data that corresponds to the data and replaces the data stored in the first storage means, and selects the storage means in which data used during operation is stored; In a data processing device that loads desired data corresponding to address data from a selected storage means and executes an operation according to the data, when writing data to the second storage means, each process of the write processing is performed. The present invention is characterized by comprising: a third storage means for sequentially storing states; and a determination means for determining a memory abnormality in the second storage means according to the processing state stored in the third storage means. Data processing equipment. (3) a first storage means for storing data of a predetermined password, address data corresponding to each phase, and data corresponding to the address data, and data of the predetermined password, address data corresponding to the phase, and the address; a second storage means for storing data that corresponds to the data and replaces the data stored in the first storage means, and selects the storage means in which data used during operation is stored; In a data processing device that loads desired data corresponding to address data from a selected storage means and executes an operation according to the data, when writing data to the second storage means, each process of the write processing is performed. a third storage means for sequentially storing states; a password detection means for detecting a match between passwords of the first storage means and the second storage means; and a thumbnail of the data stored in the second storage means. a checking means for performing a check; a state detecting means for detecting a storage state of data stored in the second storage means; and a determining means for determining a memory abnormality in the second storage means according to each of the detections. and determining means for determining a memory abnormality in the second storage means according to the processing state stored in the third storage means; 1. A data processing device comprising: recognition means for recognizing a processing state in which the memory abnormality has occurred from a processing state in which the memory abnormality has occurred.