JPH03214341A - Path diagnostic system - Google Patents

Abstract

PURPOSE:To execute the fault test without invalidating a path having no relation to a fault, and also, to execute its test by a service processor without participation of a CPU by designating a path by the service processor and requesting a diagnosis to an input/output controller, at the time of diagnosing a faulty path. CONSTITUTION:The system is provided with a service processor 30 which is connected to a channel controller 5, designates one of plural paths provided on every input/output device 61 - 64 to the input/output devices 61 - 64, and request a diagnosis of a path to an input/output controller 4. Also, the system is constituted so that when the service processor 30 designated one of plural paths of every input/output device 61 - 64 to the channel controller 5, the chan nel controller 5 confirms a state of the input/output devices 61 - 64 by a designat ed path, and diagnoses normalness of the path. In such a way, a fault test can be executed without invalidating the path having no relation to the fault, and also, the service processor 30 can execute its test without participation of a CPU 1.

Description

[Detailed Description of the Invention] [Summary] With respect to an information processing device, the purpose of the present invention is to easily diagnose a data transfer path, and to provide an input/output request that includes a central processing unit and input/output device designation information from the central processing unit. a channel control device that selects one of a plurality of routes provided by the input/output control device to the designated input/output device when the input/output device is connected to the input/output device; On the other hand, among the plurality of routes provided for each input/output device,
a service processor that specifies one of the paths and requests the input/output control device to diagnose the path, and when the service processor specifies one of the plurality of paths for each input/output device to the channel control device; , the channel control device is configured to check the status of input/output devices on the designated route and diagnose the normality of the route.

[Industrial application field]

The present invention relates to control for easily diagnosing the validity of a path between an input/output device and a channel bag 1 of an information processing device.

[Conventional technology]

The types and number of input/output devices connected to information processing devices are increasing year by year as the amount of processing required increases.

Furthermore, a plurality of routes are developed between one input/output device 1 and the channel processor in order to improve reliability of the system.

Furthermore, in order to reduce the load on the central processing unit related to route selection when an input/output processing request is made for these multiple expanded routes, an architecture has been implemented that performs route selection processing on behalf of the central processing unit.

FIG. 4 shows an example of the configuration of an information processing device.

1 is the central processing unit (CPU), 2 is the main memory control unit! (M
3 is the main storage unit (MSU), 30 is the service processor (SVP), 5 is the channel processor (CHP)
), 4 is an I/O control device (IOC), and 61 to 64 are input/output devices, which are herein assumed to be disk devices.

The MCU2 requests access from the CPUI to the MSU3, or requests data transfer from the CHP5 to the MSU3.

The CHP 5 is a host device, in this case, executes input/output requests from the CPUI. For example, when the CPUI issues a data transfer request to the input/output device 61, the CHP 5 performs the request on behalf of the input/output device 61.

Within the CHPS there is an input/output processor (IOP) 51 and a channel (CH) 52.53.

When the CHP5 receives an I/O command from the CPUI,
Using a CH that is not currently transmitting data, IOC4
The disks 61 to 64 are accessed via.

10C4 has one channel on the CHPS side,
There are two boats. Also, the human output device 61~
There are two buses on the 64 side.

This route selection is performed by the CHP5.

The route selection will be explained below.

Multiple input/output devices (I/O devices, DEV# in Figure 4)
A plurality of paths are prepared (assuming DASD from O to DEV #3). The CU of the IOC4 is a control unit, and the CU#OX is connected to the individual DEs #0 to #3.

Further, CU#IX is also connected to the individual DEVs 40 to 3. That is, the IOC 4 can operate two DEVs at the same time.

PA, PB, PC, and PD indicate physical channel interfaces, and CHO of CHP5 connects PA, PC to C
HI is connected to PB and PD.

PA and PB are interfaces of CU#OX.

That is, CU#OX is connected to CH0 and CH1. Similarly, PC and PD are interfaces of CU#IX, and CU#OX is CHO. It is connected to two of 1.

In the configuration shown in Figure 4, the access path to DEV#0 is (1) CH O-OCU#OX (PA) → DEV#
0 (2) CHO===6CU#I X (PB) Mourning DE
V#0(3) CH 1→CtJ#OX (PC) Mourning DEV#0(4) CH 1-+CU#I X (PD)
There are 4 ways for middle DEV#0.

Let the above (1) to (4) be routes 1 to 3.

Assume that a start I/O command comes from the CPUI to the CHP5.

At this time, the CPUI only specifies the device, but does not specify the route. Assume that the CPU issues an access to DAV #0. The CHP 5 determines the usage status of the route of DAV#O from the subchannels and assigns a route.

Thereafter, access is performed using that route. This subchannel is normally stored in the hardware control area (HSA) of the MSU 3, and is information for controlling each CH. Subchannels are provided for human output devices. That subchannel is moved to the IOP and used as transfer control information thereafter.

The reason for providing a plurality of routes is, for example, to use the route on the CHI side when the route on the CHO side is already used for a certain access. This is PA, PB, PC, PD,
The same can be said for CU#OX and CU#IX.

In a system that adopts an architecture in which CHP performs route selection, CHP5 performs booting to DEV.
All you have to do is give instructions. The CHP 5 selects which path to select among the four routes shown in FIG. The busy state is basically managed by the CHP 5 as described above. For example, if activation to route 1 simply fails due to busyness, no report is made to the CPUI, and routes 2 to 4 are tried in the internal processing of the CHP 5.

Now, let us consider a case where a failure occurs in the configuration shown in FIG. The fault is located at the location indicated by the arrow in Figure 4. This affects aircraft numbers 1 and 3.

Suppose that a failure occurs and is recovered.

In that case, the route where the failure occurred is tried as a test, and if it is okay, it is determined that the failure has been recovered. It is assumed that the route where the failure occurred is stored in the log information. Specifically, the trial is performed by the CPU issuing a command to invalidate routes other than the above-mentioned route and cause the DEV to report the status.

The invalidation of the route is specified by the CPUI, which is
This is done by turning off the effective focus corresponding to the route provided in the subchannel. Therefore, it is necessary for the CPUI to issue an instruction to the CHP to turn off the valid bit, and this is done.

[Problem to be solved by the invention] However, when CPU 1 issues an instruction to turn off the effective bits,
Since the command to report the status is activated after issuing it to P, the number of commands increases.

Furthermore, since an action to invalidate the route is required, the route becomes unusable. In other words, the multiple routes that were designed to improve the efficiency and reliability of input/output processing cannot be used, resulting in delays in input/output processing, or if the failure has not been completely recovered, the system may have to continue processing. There is a possibility that it will not be possible. Furthermore, in a virtual computer system in which multiple OSs are running, OSs unrelated to the failure cannot use the route, resulting in a delay in information processing.

Furthermore, in a system with a multiprocessing configuration in which multiple CPUs (not shown) are connected to one MSU, other CPUs cannot be used in the same way.

Therefore, an object of the present invention is to be able to perform a fault test without invalidating routes unrelated to the fault, and to allow the SVP to perform the fault test without the intervention of the CPU.

(Means for Solving the Problems) For the purpose of easily diagnosing the data transfer path, when an input/output request comes from the central processing unit together with information specifying the input/output device, the specified input/output device a channel control device that selects one of a plurality of routes provided by the input/output control device; and a channel control device that is connected to the channel control device and provided for each input/output device. The service processor includes a service processor that specifies one of a plurality of routes and requests the input/output control device to diagnose the route, and the service processor requests one of the plurality of routes for each input/output device to the channel control device. When specified, the channel control device is configured to check the status of input/output devices on the specified path and diagnose the normality of the path.

[Effect]

If a failure occurs in one of the multiple paths of the input/output device,
Thereafter, when diagnosing the faulty route, the service processor specifies the route and requests the input/output control device to perform the diagnosis.

The input/output controller checks the status of the input/output device along its designated path.

〔Example〕

FIG. 4 is used as an example of the system configuration. Figure 3 shows
This is a configuration diagram of CHP5 in FIG. 4. 51 is IOP, 5
4 is a service processor request register, 55 is a service processor notification register, and 56 is a control storage, which is an IOP microprogram. The microprogram is shown in FIGS. 1 and 2.

The flow in FIG. 2 is an overall diagram of the operation of the IOP.

The flowchart in FIG. 4 will be explained.

Step 31: Determine whether there is a start input/output command from the CPU.

Step 32 If the stem 31 receives a command from the CPU, it receives and executes the ■/0 command.

Step 33 It is determined whether there is a processing request from the CH.

Step 34 If there is a request from the CH, the SteSub 33 performs processing corresponding to the request, such as starting I/O and accepting a CH report.

Stenop 35 Determine whether there is a processing request from the SVP.

Stenbu 36 If so, process it.

In the case of stop processing, the process stops the CHP operation and suspends interrupt requests from devices. This process is performed, for example, when an MSU is actively added.

Stem 37 This is the restart of the device that was stopped by the stop processing in step 36.

Step 38 Channel reset: This process is a process to attempt resetting if an error occurs in the CH.

In the case of a soft error, recovery can be performed using this process.

Stenop 39 CH group reset, which resets multiple CHs.

Step 309 Perform route diagnosis. This route diagnosis is added according to the present invention, and is shown in Fig. 1 below. This will be explained in detail using FIG.

Requests for route diagnosis from SVP are sent to SVP request register 5.
4 (Fig. 3).

Step 21 10P accepts the SVP command. The command must have a route specified (specified by the maintenance personnel).

Step 22 The IOP checks whether the channel is free.

Step 26 Assume that it is not vacant. That is, it notifies the SVP that the channel is busy.

Step 23 If the channel is not busy in step 22, a route such as DEVO is specified for the channel, and when passing through CHO, for example, route 1 is specified and a status report request is issued. The routing information is available in CHO
is sent to IOP4 via. IOP4's route 1
As specified, the status report request is sent to the specified device. Thereafter, the device that has received the status report request reports the status of its own device.

Step 24 Receives status from human output device.

If the status is not reported, it is determined. Normally, this is done when there is no report for a predetermined period of time.

Step 25 In order to notify the SVP of the status, status information is stored in the service processor notification register 55.

The status information is communicated to the SVP 12, allowing maintenance personnel to know the normality of the route.

If channel busy is reported in step 26, the SVP is notified and the maintenance personnel issues the command again.

The present invention has been described above in accordance with the embodiments. [Effects] The present invention eliminates the need for an operation to invalidate a route and a test program on the operating system side, making route diagnosis possible even during system operation.

Additionally, if additional input/output devices are added during system operation, connection confirmation can be easily performed in the same manner.

In architectures where CHP performs route selection, the CPU
Since you can specify a machine number different from the machine number used by , diagnosis can be performed using any route.

[Brief explanation of drawings]

FIGS. 1 and 2 show an IOP program according to an embodiment, FIG. 3 is a block diagram of a CHP according to an embodiment, and FIG. 4 is a block diagram of the entire system (conventional example and embodiment). In the figure, ■ is CP
U, 2 is MSU, 3 is MSU, 30 is SVP, 5 is CH
P and 4 are IOCs, and 61 to 64 are input/output devices.

Claims (1)

[Claims] An information processing device includes: a central processing unit (1); and input/output devices (61 to 64) from the central processing unit (1).
When an input/output request comes with the specified information, the input/output control device (4)
a channel control device (5) that selects one of a plurality of routes provided by the channel control device (5); Equipment (61
to 64), the service processor (20) specifies one of the plurality of routes provided for each channel and requests the input/output control device to diagnose the route, and the service processor (20) Control device(
In 5), when specifying any of the multiple routes for each input/output device (61 to 64), the channel control device checks the status of the input/output device on the specified route and determines whether the route is normal. A route diagnosis method characterized by diagnosing gender.