JPH03214652A - Semiconductor chip carrier - Google Patents

Semiconductor chip carrier

Info

Publication number
JPH03214652A
JPH03214652A JP2009406A JP940690A JPH03214652A JP H03214652 A JPH03214652 A JP H03214652A JP 2009406 A JP2009406 A JP 2009406A JP 940690 A JP940690 A JP 940690A JP H03214652 A JPH03214652 A JP H03214652A
Authority
JP
Japan
Prior art keywords
heat
metal
insulating layer
semiconductor chip
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009406A
Other languages
Japanese (ja)
Inventor
Koji Minami
浩司 南
Hitoshi Arai
荒井 斉
Akitsugu Maeda
晃嗣 前田
Takeshi Kano
武司 加納
Toru Higuchi
徹 樋口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP2009406A priority Critical patent/JPH03214652A/en
Publication of JPH03214652A publication Critical patent/JPH03214652A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To remove the limitation placed on the shape of a heat-dissipating body and to simply attach the heat-dissipating body by a method wherein a metal layer formed so as to protrude to be more than parts of other metal layers is provided on the surface of an insulating layer on a metal sheet. CONSTITUTION:In a metal layer 6 which has been formed on a first U-shaped part 3 for heat-dissipating use and on the surface of an insulating layer 1, a protruding part 7 of the metal layer 6 formed so as to protrude to be more than other metal layers is provided on the surface of the insulating layer 1 formed on a metal sheet 2. A heat-dissipating body 9 is attached, via a heat- conductive adhesive layer 8, to the protruding part 7 of the metal layer 6 formed so as to be united to the first U-shaped part 3. Thereby, regarding the heat- dissipating body 9 for heatdissipating use to the outside, the limitation on a shape when it is attached to the metal sheet 2 is removed, and the body in an arbitrary shape can be attached to the protruding part 7 of the metal layer 6 by using the heat-conductive adhesive layer 8.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体チップの搭載に用いられる半導体チ
ップキャリアに関するものであり、特に放熱性に優れた
半導体チップキャリアに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor chip carrier used for mounting a semiconductor chip, and particularly to a semiconductor chip carrier with excellent heat dissipation.

〔従来の技術] 半導体チップキャリアを構成する絶縁層にはガラス布を
基材としたエボキシ樹脂積層板などのプリント配線板が
、近年用いられるよ・うになってきている。しかし、こ
のようなプリン1・配線板では熱の伝導性が悪く、良好
に放熱をすることができない。
[Prior Art] In recent years, printed wiring boards such as epoxy resin laminates based on glass cloth have been used as insulating layers constituting semiconductor chip carriers. However, such a printer 1/wiring board has poor heat conductivity and cannot dissipate heat well.

先に本発明者らは、特開昭62−52992において、
絶縁層に金属板を埋入して配設し、この金属板の一部を
外部に露出させ、放熱性を良好にした樹脂積層板のプリ
ント配線板から構成される半導体チップキャリアを提供
した。このものに半導体チップを搭載した使用例を第6
図に示す。
Previously, the present inventors disclosed in Japanese Patent Application Laid-Open No. 62-52992,
A semiconductor chip carrier is provided which is composed of a resin laminated printed wiring board in which a metal plate is embedded in an insulating layer and a part of the metal plate is exposed to the outside to improve heat dissipation. The sixth example shows how this product is equipped with a semiconductor chip.
As shown in the figure.

このものは、絶縁層1が金属板2の周縁部から中央より
の部分まで被覆し、金属板2の中央部分を中心に絶縁層
のない凹部が金属板2の両面に形成され、これらの凹部
の底面には前記金属板2が露出してなり、一方の第1の
凹部3は放熱用に、他方の第2の凹部4は半導体チンプ
5搭載用にそれぞれ設けられてなることを特徴とする半
導体チンプキャリアで、金属板2が凹部で外部に露出し
ているために良好な放熱性と絶縁層1が金属仮2の周縁
部より中央よりの部分まで被覆しているごとによりプリ
ント配線板の絶縁層1に配設された端子ビンl3の領域
より内側に挿入された金属板2の動きを阻止し、さらに
絶縁層1と金属板2に生ずる隙間を密閉して耐湿性を高
めた半導体チップキャリアとしたところにその効果があ
った。
In this device, an insulating layer 1 covers a metal plate 2 from its periphery to the center, and recesses without an insulating layer are formed on both sides of the metal plate 2 around the center of the metal plate 2, and these recesses The metal plate 2 is exposed on the bottom surface of the device, and the first recess 3 is provided for heat radiation, and the second recess 4 is provided for mounting the semiconductor chip 5. In the semiconductor chimp carrier, the metal plate 2 is exposed to the outside in the recessed part, so it has good heat dissipation, and the insulating layer 1 covers the part from the periphery to the center of the metal temporary 2, which makes it possible to improve the printed wiring board. A semiconductor chip which prevents the movement of a metal plate 2 inserted inside the area of a terminal pin l3 arranged in an insulating layer 1, and further seals the gap between the insulating layer 1 and the metal plate 2 to improve moisture resistance. It was effective when I turned it into a career.

ところが、半導体チップの高速化、高集積化、高機能化
による半導体チップの発熱量の増大に伴って熱放散性の
一層優れた半導体チップキャリアの造出かますます大き
く期待される中で、放熱体9を前記半導体チップキャリ
アに取り付けるのに、金属板2が絶縁層1の表面より窪
んでいるため放熱体9の取り付け部が放熱用の凹部3よ
り小さな放熱体9に制限されるなど放熱体9の形状に制
限が加わり、放熱量の増大をはかる放熱体9の形状の自
由度が小さなものであった。
However, as the amount of heat generated by semiconductor chips increases due to higher speed, higher integration, and higher functionality of semiconductor chips, there are increasing expectations for the creation of semiconductor chip carriers with even better heat dissipation. When attaching the body 9 to the semiconductor chip carrier, since the metal plate 2 is recessed from the surface of the insulating layer 1, the mounting portion of the heat dissipation body 9 is limited to a heat dissipation body 9 smaller than the heat dissipation recess 3. The shape of the heat dissipating body 9 is restricted, and the degree of freedom in the shape of the heat dissipating body 9, which aims to increase the amount of heat dissipated, is small.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

熱放散性をさらに一層高めるために、放熱体の形状に加
わった制限を解除するとともに、放熱体を簡単に取り付
けできる構造の半導体チップキャリアを提供することに
ある。
In order to further improve heat dissipation performance, it is an object of the present invention to provide a semiconductor chip carrier having a structure that eliminates restrictions placed on the shape of a heat sink and allows the heat sink to be easily attached.

[課題を解決するための手段] 本発明は、前記課題を解決するために、絶縁層に埋入さ
れた金属板と穿設された絶縁層によって形成された凹部
を有し、この凹部と前記絶縁層の表面とにわたって形成
された金属層において、他の金属層の部分より突出して
形成された金属層を金属板上の絶縁層の表面に有するこ
とを特徴とする半導体チップキャリアを提供するもので
ある。
[Means for Solving the Problems] In order to solve the above problems, the present invention has a recess formed by a metal plate embedded in an insulating layer and a perforated insulating layer. Provided is a semiconductor chip carrier characterized in that the surface of the insulating layer on the metal plate has a metal layer formed over the surface of the insulating layer so as to protrude from other metal layer parts. It is.

〔実施例〕〔Example〕

以下に、本発明を図面に基づいて説明する。 The present invention will be explained below based on the drawings.

第1図は本発明の一実施例の斜視図,第2図は第1図の
X−Y断面図である。第2図の半導体チップキャリアは
絶縁層1に埋入された金属板2と,この金属板2の一方
の表面と絶縁層1とで形成された放熱用の第1の凹部3
と、金属板2のもう一方の表面と絶縁層1とで形成され
た半導体チップ5搭載用の第2の凹部4とを有し、前記
放熱用の第1の凹部3と絶縁層1の表面とに形成された
金属層6において、他の金属層より突出して形成されて
なる金属層6の突出部7を前記金属板2の上に形成され
た絶縁層1の表面に存する。この第1の凹部3と一体に
形成された金属層6の突出部7に、熱伝導性の接着層8
を介して放熱体9が取り付けられている。
FIG. 1 is a perspective view of an embodiment of the present invention, and FIG. 2 is an XY sectional view of FIG. 1. The semiconductor chip carrier shown in FIG. 2 includes a metal plate 2 embedded in an insulating layer 1, and a first recess 3 for heat dissipation formed between one surface of this metal plate 2 and the insulating layer 1.
and a second recess 4 for mounting a semiconductor chip 5 formed by the other surface of the metal plate 2 and the insulating layer 1, and the first recess 3 for heat dissipation and the surface of the insulating layer 1. In the metal layer 6 formed on the metal plate 2, a protrusion 7 of the metal layer 6 formed to protrude from other metal layers exists on the surface of the insulating layer 1 formed on the metal plate 2. A thermally conductive adhesive layer 8 is provided on the protrusion 7 of the metal layer 6 that is integrally formed with the first recess 3.
A heat radiator 9 is attached via.

なお、第1の凹部3や第2の凹部4の形状は四角柱状が
一般的であるが、特に制限するものではなく、円柱など
任意の形状を用いることができる。また、この突出部7
の形状は、第3図の如く四角柱状で細分化されたもので
もよく、第4図の如く1つの四角柱状でもよく、さらに
は、第5図の如《同心円を有する筒状とこれらの組合せ
た形状でもよく、特に制限するものではない。
Note that the shapes of the first recess 3 and the second recess 4 are generally quadrangular prisms, but are not particularly limited, and any shape such as a cylinder can be used. In addition, this protrusion 7
The shape may be a quadrangular prism subdivided as shown in FIG. 3, a single quadrangular prism as shown in FIG. It may have any shape, and is not particularly limited.

上記構造の半導体チップキャリアによって、外部への放
熱用の放熱体9においては金属板2への取り付けのため
の形状の制限ガ無くなり、任意の形状のものを、前記金
属層6の突出部7に熱伝導性の接着層8によって取り付
けることができる。
With the semiconductor chip carrier having the above structure, there is no restriction on the shape of the heat dissipation body 9 for external heat dissipation for attachment to the metal plate 2, and any shape can be attached to the protrusion 7 of the metal layer 6. It can be attached by means of a thermally conductive adhesive layer 8.

第2の凹部4に搭載された半導体チツプ5は、半導体チ
ップ5の搭載側の絶縁層1の表面に形成された導体回路
11に金属線12を介して接続される。この導体回路l
1は外部端子として働く端子ビン13を挿入するための
絶縁層1に形成されたスルホール14のスルホールメッ
キ層に接続している。
The semiconductor chip 5 mounted in the second recess 4 is connected via a metal wire 12 to a conductor circuit 11 formed on the surface of the insulating layer 1 on the side where the semiconductor chip 5 is mounted. This conductor circuit
1 is connected to a through-hole plating layer of a through-hole 14 formed in the insulating layer 1 into which a terminal pin 13 serving as an external terminal is inserted.

前記の半導体チップ5搭載用の凹部4に搭載された半導
体チップ5から発生する熱は、金属板2に吸収され、さ
らに熱伝導性に優れた金属板2の反対側において、金属
板2と一体に形成された金属層6に伝わり、この金属層
に熱伝導性の接着層8で取付けられた上面にフィン10
を有する放熱体9に移動し、空気中に効率良く放熱され
、熱が金属Fi.2にこもるがない。この作用によって
、半導体チップ5の高集積化、高機能化、高速化に対応
可能となる。
The heat generated from the semiconductor chip 5 mounted in the recess 4 for mounting the semiconductor chip 5 is absorbed by the metal plate 2, and is further integrated with the metal plate 2 on the opposite side of the metal plate 2, which has excellent thermal conductivity. A fin 10 is attached to the upper surface of the metal layer 6 formed on the metal layer 6 and attached to this metal layer with a thermally conductive adhesive layer 8.
The heat is transferred to the heat dissipation body 9 having a metal fi. There is no need to worry about 2. This effect makes it possible to respond to higher integration, higher functionality, and higher speed of the semiconductor chip 5.

上記構成の半導体チップキャリアにおいて、半導体チッ
プキャリアの形態としては、絶縁層1に対して放熱体9
の取りつく側と反対側に端子ピン13が突出するように
絶縁層1に形成されたスルホール14に配設されたもの
が、放熱を高めるのには好ましい。その理由は、この半
導体チップキャリアをマザーボードに実装したとき、放
熱体が外気に露出するのと、放熱体が端子ピンの配設領
域による制限を受けないで大きいものを取り付けること
ができるからである。
In the semiconductor chip carrier having the above configuration, the form of the semiconductor chip carrier is such that the heat sink 9 is connected to the insulating layer 1.
In order to improve heat dissipation, it is preferable that the terminal pins 13 be disposed in through holes 14 formed in the insulating layer 1 so as to protrude on the side opposite to the side to which the terminal pins 13 are attached. The reason for this is that when this semiconductor chip carrier is mounted on a motherboard, the heat sink is exposed to the outside air, and a large heat sink can be attached without being restricted by the area where the terminal pins are placed. .

放熱体9の形状も角柱で側面フィンを有するもの、ある
いは円柱で上面フィンを有するもの、または、これらの
組合せなど一般にヒートシンクとして用いらるものを用
いることができる。
The shape of the heat sink 9 may be a prism with side fins, a cylinder with top fins, or a combination thereof, which is generally used as a heat sink.

次に、使用材料について述べると、第2図の半導体チッ
プキャリアを構成する絶縁層1は、基材に樹脂を含浸乾
燥して得られたプリプレグの樹脂を硬化した絶縁材料が
用いられる。ここで絶縁材料の樹脂としては耐熱性、耐
湿性に優れかつ樹脂純度、特にイオン性不純物の少ない
ものが好ましい。具体的には、エポキシ樹脂、ポリイミ
ド樹脂、フッソ樹脂、フェノール樹脂、不飽和ポリエス
テル樹脂、PPO樹脂などが適している。なお絶縁材料
の基材としては、紙よりガラス繊維などの無機材料の方
が耐熱性、耐湿性などに優れ好ましい。
Next, regarding the materials used, the insulating layer 1 constituting the semiconductor chip carrier shown in FIG. 2 is made of an insulating material obtained by curing the resin of a prepreg obtained by impregnating a base material with a resin and drying it. Here, the resin used as the insulating material is preferably one that has excellent heat resistance and moisture resistance, and has high resin purity, particularly low ionic impurities. Specifically, epoxy resin, polyimide resin, fluorine resin, phenol resin, unsaturated polyester resin, PPO resin, etc. are suitable. Note that as the base material of the insulating material, an inorganic material such as glass fiber is preferable to paper because it has superior heat resistance and moisture resistance.

絶縁層1に埋入される金属板2としては銅板、銅合金板
、銅一インバ一一銅合金板、鉄−ニッケル合金板、その
他鋼板、鉄板、アルミニウム板などを、放熱体9として
は、窒化アルミ、炭化硅素、アルミナなどのセラミック
や銅板、銅合金板、銅一インバー一銅合金板、鉄一ニッ
ケル合金板、その他鋼板、鉄板、アルミニウム板などを
それぞれ使用することができる。
As the metal plate 2 embedded in the insulating layer 1, a copper plate, a copper alloy plate, a copper-invar-copper alloy plate, an iron-nickel alloy plate, other steel plates, iron plates, aluminum plates, etc. can be used, and as the heat sink 9, Ceramics such as aluminum nitride, silicon carbide, and alumina, copper plates, copper alloy plates, copper-invar-copper alloy plates, iron-nickel alloy plates, other steel plates, iron plates, aluminum plates, etc. can be used.

第1の凹部3と絶縁層1の表面とに一体に形成される金
属層6は、金めつき層、半田めっき層などで、これらは
無電解めっきにより形成することができる。金属層6の
突出部7もこれらのめっきにより形成することができる
The metal layer 6 integrally formed on the first recess 3 and the surface of the insulating layer 1 is a gold plating layer, a solder plating layer, etc., and these can be formed by electroless plating. The protrusions 7 of the metal layer 6 can also be formed by these platings.

金属層6の突出部7と放熱体9を接着する熱伝導性の接
着層8はエボキシ樹脂、ポリイミド樹脂、および、これ
らの変性樹脂に金や銀を含有する接着剤や、半田によっ
て形成することができる。
The thermally conductive adhesive layer 8 that adheres the protrusion 7 of the metal layer 6 and the heat sink 9 may be formed of epoxy resin, polyimide resin, an adhesive containing gold or silver in modified resin of these resins, or solder. I can do it.

〔発明の効果〕〔Effect of the invention〕

本発明に係る半導体チップキャリアは叙述の如く、絶縁
層に埋入された金属板と穿設された絶縁層で形成された
凹部を有し、この凹部と前記絶縁層の表面とにわたって
形成された金属層において、他の金属層の部分より突出
して形成された金属層を金属板上の絶縁層の表面に有す
る半導体チップキャリアによって、放熱体の形状に加わ
った制限を解除できるとともに、放熱体を簡単に取り付
けできる構造の半導体チップキャリアとなり、熱放散性
をさらに一層高めることができ、半導体チップの高集積
化、高機能化、高速化によって増大する半導体チップの
発熱に対応が可能な半導体チップキャリアとなるもので
ある。
As described above, the semiconductor chip carrier according to the present invention has a recess formed by a metal plate embedded in an insulating layer and a perforated insulating layer, and a recess formed between the recess and the surface of the insulating layer. A semiconductor chip carrier having a metal layer on the surface of an insulating layer on a metal plate, which is formed so as to protrude from other metal layers, can eliminate restrictions on the shape of the heat sink, and also allows the heat sink to be A semiconductor chip carrier with an easy-to-install structure that can further improve heat dissipation and cope with the increased heat generated by semiconductor chips due to higher integration, higher functionality, and faster speeds. This is the result.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す斜視図、第2図はその
X−Y断面図、 第3図は第2図の外部放熱体の無い時に、上か見た平面
図、 第4図は他の一実施例の第3図と同様での部分図、第5
図は他の別の一実施例の第3図と同様の部分図、 第6図は一従来例の断面図をそれぞれ示す。 1・・・絶縁層 3・・・第1の凹部 5・・・半導体チップ 7・・・突出部 9・・・放熱体 11・・・導体回路 13・・・端子ピン 2・・・金属板 4・・・第2の凹部 6・・・金属層 8・・・接着層 10・・・フィン 12・・・金属線 14・・・スルホール
Fig. 1 is a perspective view showing one embodiment of the present invention, Fig. 2 is an X-Y sectional view thereof, Fig. 3 is a top view of Fig. 2 when there is no external heat sink, and Fig. 4 The figure is a partial view similar to FIG. 3 of another embodiment, and FIG.
The figure shows a partial view similar to FIG. 3 of another embodiment, and FIG. 6 shows a sectional view of a conventional example. 1... Insulating layer 3... First recess 5... Semiconductor chip 7... Protrusion 9... Heat sink 11... Conductor circuit 13... Terminal pin 2... Metal plate 4... Second recess 6... Metal layer 8... Adhesive layer 10... Fin 12... Metal wire 14... Through hole

Claims (1)

【特許請求の範囲】[Claims] (1)絶縁層に埋入された金属板と穿設された絶縁層に
よって形成された凹部を有し、この凹部と前記絶縁層の
表面とにわたって形成された金属層において、他の金属
層の部分より突出して形成された金属層を金属板上の絶
縁層の表面に有することを特徴とする半導体チップキャ
リア。
(1) It has a recess formed by a metal plate embedded in an insulating layer and a perforated insulating layer, and in a metal layer formed across this recess and the surface of the insulating layer, the other metal layer is A semiconductor chip carrier characterized by having a metal layer formed to protrude from a portion on a surface of an insulating layer on a metal plate.
JP2009406A 1990-01-18 1990-01-18 Semiconductor chip carrier Pending JPH03214652A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009406A JPH03214652A (en) 1990-01-18 1990-01-18 Semiconductor chip carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009406A JPH03214652A (en) 1990-01-18 1990-01-18 Semiconductor chip carrier

Publications (1)

Publication Number Publication Date
JPH03214652A true JPH03214652A (en) 1991-09-19

Family

ID=11719533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009406A Pending JPH03214652A (en) 1990-01-18 1990-01-18 Semiconductor chip carrier

Country Status (1)

Country Link
JP (1) JPH03214652A (en)

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