JPH03218676A - Electrode for compound semiconductor and its manufacturing method - Google Patents

Electrode for compound semiconductor and its manufacturing method

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Publication number
JPH03218676A
JPH03218676A JP2013867A JP1386790A JPH03218676A JP H03218676 A JPH03218676 A JP H03218676A JP 2013867 A JP2013867 A JP 2013867A JP 1386790 A JP1386790 A JP 1386790A JP H03218676 A JPH03218676 A JP H03218676A
Authority
JP
Japan
Prior art keywords
electrode
layer
compound semiconductor
heat treatment
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2013867A
Other languages
Japanese (ja)
Inventor
Takashi Hirose
貴司 廣瀬
Masaki Inada
稲田 雅紀
Akira Tatsuji
龍治 彰
Toshimichi Ota
順道 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2013867A priority Critical patent/JPH03218676A/en
Publication of JPH03218676A publication Critical patent/JPH03218676A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、高度な情報処理や通信システムに必要とされ
る高速性能に優れた化合物半導体素子の電極として利用
できる、化合物半導体用電極およびその製造方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an electrode for compound semiconductors that can be used as an electrode for compound semiconductor devices with excellent high-speed performance required for advanced information processing and communication systems, and a method for manufacturing the same. It is related to.

従来の技術 近年における高度情報化社会の発達により、通信分野に
おける高周波化、ならびに情報処理分野における高速化
、大容量化がますます必要とされている。そしてこれら
を達成すべく、化合物半導体を用いた半導体素子の高速
化、高集積化等の研究開発がさかんに行われている。
BACKGROUND OF THE INVENTION With the recent development of a highly information-oriented society, there is an increasing need for higher frequencies in the communications field, as well as higher speeds and larger capacities in the information processing field. In order to achieve these goals, research and development efforts are being actively conducted to increase the speed and integration of semiconductor devices using compound semiconductors.

ここで、化合物半導体本来の高速性能を得るためには、
寄生抵抗および寄生容量を低減させることが必要である
。素子の微細化は、寄生容量低減には有効であるのに対
し、ある程度微細化が進むと、半導体と電極との接触面
積の減少によって接触抵抗の増加をもたらし、寄生抵抗
の増加につながる。このため接触抵抗の低い電極の開発
が重要となる。
Here, in order to obtain the high-speed performance inherent to compound semiconductors,
It is necessary to reduce parasitic resistance and capacitance. While element miniaturization is effective in reducing parasitic capacitance, when miniaturization progresses to a certain extent, the contact area between the semiconductor and the electrode decreases, leading to an increase in contact resistance, leading to an increase in parasitic resistance. Therefore, it is important to develop electrodes with low contact resistance.

以下、図面を参照しながら従来の化合物半導体用電極お
よびその製造方法について説明する。
Hereinafter, a conventional compound semiconductor electrode and its manufacturing method will be described with reference to the drawings.

第2図は、従来の化合物半導体用電極を示した構造断面
図、第3図は、従来および本発明の化合物半導体用電極
の製造方法における接触抵抗率の熱処理温度特性曲線図
である。
FIG. 2 is a structural sectional view showing a conventional compound semiconductor electrode, and FIG. 3 is a heat treatment temperature characteristic curve of contact resistivity in the conventional method and the method of manufacturing a compound semiconductor electrode according to the present invention.

第2図において、1はGaAs半絶縁性基板、2はp型
GaAs層、3、4は前記p型GaAs層2の電極とな
るそれぞれAuZn合金層およびAu層である。
In FIG. 2, 1 is a GaAs semi-insulating substrate, 2 is a p-type GaAs layer, and 3 and 4 are an AuZn alloy layer and an Au layer, which serve as electrodes of the p-type GaAs layer 2, respectively.

以上の構成による従来の化合物半導体用電極およびその
製造方法を、以下に説明する。
A conventional compound semiconductor electrode having the above structure and a method for manufacturing the same will be described below.

まず、GaAs半絶縁性基板1上のp型GaAS層2(
不純物濃度: 4xlO”c+r”、膜厚: I00n
m)の表面に、膜厚50nmのAuZn層3 (Zn:
 5vt%)と膜厚10QnmのAu層4とからなる金
属多層膜を、真空蒸着法により形成する。次に、赤外線
炉で熱処理することにより、前記金属多層膜からなる前
記p型GaAs層2に対する電極が完成する。 (例え
ば、クローン等著、ザ ジャーナル オブエレクトロケ
ミカル ソサエティー 第116巻、第507頁〜第5
08頁、1969年(TheJournal  of 
 Electrochemical  Society
s   Vol.118,pp507〜508  (1
989))  参照。 )第3図中に、以上のようにし
て得られるAuZn / A u系電極における接触抵
抗率の、前記熱処理の温度による依存性(熱処理時間は
20秒)を示す。熱処理温度が約340℃から400゜
Cの範囲において、接触抵抗率−は約0.9x10−6
Ωcm2から1.OxlO”Ωcm”の低い値が得られ
る。
First, a p-type GaAS layer 2 (
Impurity concentration: 4xlO"c+r", film thickness: I00n
m) is coated with an AuZn layer 3 (Zn:
5vt%) and an Au layer 4 with a thickness of 10 Qnm is formed by vacuum evaporation. Next, an electrode for the p-type GaAs layer 2 made of the metal multilayer film is completed by heat treatment in an infrared furnace. (For example, Krohn et al., The Journal of the Electrochemical Society, Vol. 116, pp. 507-5.
08 pages, 1969 (The Journal of
Electrochemical Society
s Vol. 118, pp507-508 (1
989)) Reference. ) Figure 3 shows the dependence of the contact resistivity of the AuZn/Au-based electrode obtained as described above on the temperature of the heat treatment (the heat treatment time was 20 seconds). When the heat treatment temperature ranges from about 340°C to 400°C, the contact resistivity is about 0.9x10-6.
Ωcm2 to 1. A low value of OxlO "Ωcm" is obtained.

発明が解決しようとする課題 しかしながら上記のような構成および方法では、第3図
中に示されるように、低い接触抵抗率を得るためには約
350℃、20秒間の熱処理が必要であり、また、40
0℃以上の熱処理では急激な接触抵抗率の増加を生じる
。このことから、低い接触抵抗率を得るための熱処理は
、前述の約350℃から約400℃の狭い温度範囲で正
確に行う必要がある。また半導体素子製造工程において
、本電極の形成後には400℃以上の熱処理を必要とす
る工程を適用することはもちろんできず、これより低い
温度であっても、一般に長時間の熱処理はそれより高い
温度での短時間の熱処理と同様の影響を電極に及ぼすこ
とから、例えば通常のパツシベーション膜形成工程(約
300℃、1時間程度)が、本電極の接触抵抗率を高く
する要因となる可能性があるという問題点を有していた
Problems to be Solved by the Invention However, with the above configuration and method, heat treatment at approximately 350°C for 20 seconds is required to obtain a low contact resistivity, as shown in FIG. , 40
Heat treatment at 0° C. or higher causes a rapid increase in contact resistivity. For this reason, the heat treatment for obtaining low contact resistivity needs to be performed accurately within the narrow temperature range of about 350°C to about 400°C. In addition, in the semiconductor device manufacturing process, it is of course impossible to apply a process that requires heat treatment at 400°C or higher after forming this electrode, and even if the temperature is lower than this, long-term heat treatment is generally higher than that. Since it has the same effect on the electrode as short-time heat treatment at high temperatures, for example, the normal passivation film formation process (approximately 300°C, about 1 hour) is a factor that increases the contact resistivity of this electrode. The problem was that there was a possibility that

本発明は上記問題点に鑑み、従来に比べ、低い熱処理温
度でもって低い接触抵抗率が得られるとともに、低い接
触抵抗率が得られる熱処理温度の範囲が広く、熱処理の
温度制御が容易となり、かつ電極形成後の、熱処理を伴
う半導体素子製造工程においても、前記電極の接触抵抗
率を低く保つことが可能となる化合物半導体用電極およ
びその製造方法を提供するものである。
In view of the above-mentioned problems, the present invention provides lower contact resistivity at a lower heat treatment temperature than conventional methods, a wider range of heat treatment temperatures for obtaining low contact resistivity, and easier temperature control for heat treatment. The present invention provides an electrode for a compound semiconductor and a method for manufacturing the same, which makes it possible to keep the contact resistivity of the electrode low even in a semiconductor element manufacturing process that involves heat treatment after electrode formation.

課題を解決するための手段 上記問題点を解決するために、本発明の化合物半導体用
電極およびその製造方法は、電極構成として、p型■−
■族化合物半導体に対する電極であって、前記p型II
I−V族化合物半導体とZn層もしくはAuZn合金層
との間にNNI層を有するものであり、またその製造方
法は、p型■−■族化合物半導体上に、Ni層、Zn層
もしくはAuZn合金層、Au層の順からなる金属多層
膜を真空蒸着法により形成する工程と、前記金属多層膜
を有する前記p型■−■族化合物半導体を、赤外線炉で
熱処理する工程とを含んだものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the compound semiconductor electrode of the present invention and its manufacturing method have a p-type -
(2) An electrode for a group compound semiconductor, the p-type II
It has an NNI layer between the IV group compound semiconductor and the Zn layer or the AuZn alloy layer, and its manufacturing method involves forming an Ni layer, Zn layer or AuZn alloy layer on the p-type ■-■ group compound semiconductor. The method includes the steps of forming a metal multilayer film consisting of an Au layer and an Au layer in this order by vacuum evaporation, and heat-treating the p-type ■-■ group compound semiconductor having the metal multilayer film in an infrared furnace. be.

作用 本発明では、上記した構成および方法によって、従来に
比べ、低い熱処理温度でもって低い接触抵抗率が得られ
るきともに、熱処理の温度制御が容易となり、かつ電極
形成後の、熱処理を伴う半導体素子製造工程においても
、前記電極の接触抵抗率を低《保つことが可能となる。
Effect of the Invention In the present invention, with the above-described configuration and method, lower contact resistivity can be obtained at a lower heat treatment temperature than in the past, and the temperature control of the heat treatment can be easily controlled, and semiconductor elements that require heat treatment after electrode formation can be obtained. Even in the manufacturing process, it is possible to maintain the contact resistivity of the electrode at a low level.

実施例 以下、本発明の一実施例としての化合物半導体用電極お
よびその製造方法について、図面を参照しながら説明す
る。
EXAMPLE Hereinafter, an electrode for a compound semiconductor and a method for manufacturing the same as an example of the present invention will be described with reference to the drawings.

第1図は、本発明の一実施例における化合物半導体用電
極を示した構造断面図、第3図は、従来例の説明におい
て既に示した、従来および本発明の化合物半導体用電極
の製造方法における接触抵抗率の熱処理温度特性曲線図
である。
FIG. 1 is a structural cross-sectional view showing an electrode for a compound semiconductor according to an embodiment of the present invention, and FIG. It is a heat treatment temperature characteristic curve diagram of contact resistivity.

まず、第1図を用い、本発明の一実施例における化合物
半導体用電極およびその製造方法について以下に説明す
る。なお、第1図において、その構成の一部は、第2図
に示した従来の化合物半導体用電極と同じであるので、
同一構成部分には同一番号を付している。
First, referring to FIG. 1, an electrode for a compound semiconductor and a method for manufacturing the same in one embodiment of the present invention will be described below. Note that in FIG. 1, part of the structure is the same as the conventional compound semiconductor electrode shown in FIG.
Identical components are given the same numbers.

第1図において、1はGaAs半絶縁性基板、2はp型
GaAs層、5、6、7は前記p型GaAs層2の電極
となるそれぞれNi層、Zn層およびA u層である。
In FIG. 1, 1 is a GaAs semi-insulating substrate, 2 is a p-type GaAs layer, and 5, 6, and 7 are a Ni layer, a Zn layer, and an Au layer, which serve as electrodes of the p-type GaAs layer 2, respectively.

まず、GaAs半絶縁性基板1上のp型GaAS層2(
不純物濃度: 4xl019c『3、膜厚: 100n
m)の表面に、膜厚50nmのNi層5と膜厚40nm
のZn層と膜厚40nmのAu層7とからなる金属多層
膜を、真空蒸着法により形成する。次に、赤外線炉で熱
処理することにより、前記金属多層膜からなる前記p型
GaAs層2に対する電極が完成する。
First, a p-type GaAS layer 2 (
Impurity concentration: 4xl019c'3, film thickness: 100n
m) with a Ni layer 5 having a thickness of 50 nm and a Ni layer 5 having a thickness of 40 nm.
A metal multilayer film consisting of a Zn layer and an Au layer 7 with a thickness of 40 nm is formed by vacuum evaporation. Next, an electrode for the p-type GaAs layer 2 made of the metal multilayer film is completed by heat treatment in an infrared furnace.

次に第3図を用い、以上のようにして得られる本発明の
一実施例の旧/Zn/Au系電極における接触抵抗率の
前記熱処理の温度による依存性(熱処理時間は20秒)
を示す。熱処理温度が約200℃から460℃の広い範
囲において、接触抵抗率は1.OxlO−”ΩQm”以
下の低い値が得られ、特に熱処理温度が約330℃付近
において、接触抵抗率は約0.7xlO−”ΩcII1
2が得られる。
Next, using FIG. 3, the dependence of the contact resistivity of the old/Zn/Au based electrode of one example of the present invention obtained as described above on the temperature of the heat treatment (heat treatment time is 20 seconds)
shows. In a wide range of heat treatment temperatures from about 200°C to 460°C, the contact resistivity is 1. A low value of less than OxlO-"ΩQm" was obtained, and the contact resistivity was approximately 0.7xlO-"ΩcII1 especially when the heat treatment temperature was around 330°C.
2 is obtained.

以上のように第1図に示す実施例によれば、第3図から
明らかなように、約200℃という、従来(約350℃
)に比べ、低い熱処理温度でもって1 .OxlO−6
Ωcm2以下の低い接触抵抗率が得られる。また、1 
.OxlO−”ΩcII12以下の低い接触抵抗率が得
られる熱処理温度の範囲が広く、熱処理の温度制御が容
易となる。さらに、約500℃以上の高温の熱処理によ
る接触抵抗率の増加の程度が従来に比べ緩やかであるこ
とから、本電極形成後の、熱処理を伴う半導体素子製造
工程においても、本電極の接触抵抗率を従来に比べ低く
保つことが可能となる。
As described above, according to the embodiment shown in FIG. 1, as is clear from FIG.
), the heat treatment temperature is lower than that of 1. OxlO-6
A low contact resistivity of Ωcm2 or less can be obtained. Also, 1
.. There is a wide range of heat treatment temperatures at which a low contact resistivity of OxlO-"ΩcII12 or less can be obtained, making it easier to control the temperature of the heat treatment. Furthermore, the degree of increase in contact resistivity due to heat treatment at a high temperature of approximately 500°C or higher is lower than that of conventional methods. Since this is relatively gentle, it is possible to maintain the contact resistivity of the present electrode lower than in the past even in the semiconductor element manufacturing process that involves heat treatment after the formation of the present electrode.

なお、第1図における上記実施例では、NI層をp型■
−■族化合物半導体とZn層との間に形成したが、前記
Zn層はZnの供給源となる層であればよく、例えばA
uZn合金層としてもよい。
In the above embodiment shown in FIG. 1, the NI layer is p-type
- Although the Zn layer is formed between the group compound semiconductor and the Zn layer, the Zn layer may be any layer that serves as a supply source of Zn, for example, A
It may also be a uZn alloy layer.

発明の効果 以上のように本発明の化合物半導体用電極およびその製
造方法は、電極構成として、p型■−■族化合物半導体
に対する電極であって、前記p型III−V族化合物半
導体とZn層もしくはAuZn合金層との間に、Ni層
を有することを特徴とし、その製造方法として、p型■
−■族化合物半導体上に、Ni層、Zn層もしくはAu
Zn合金層、Au層の順からなる金属多層膜を真空蒸着
法により形成する工程払 前記金属多層膜を有する前記
p型■−■族化合物半導体を、赤外線炉で熱処理する工
程とを含むことを特徴とする。
Effects of the Invention As described above, the compound semiconductor electrode and the manufacturing method thereof of the present invention are electrodes for p-type ■-■ group compound semiconductors as the electrode structure, and the electrodes include the p-type III-V group compound semiconductor and the Zn layer. Alternatively, it is characterized by having a Ni layer between it and the AuZn alloy layer, and its manufacturing method includes p-type ■
-Ni layer, Zn layer or Au layer on the ■group compound semiconductor
A step of forming a metal multilayer film consisting of a Zn alloy layer and an Au layer in that order by vacuum evaporation; and a step of heat-treating the p-type ■-■ group compound semiconductor having the metal multilayer film in an infrared furnace. Features.

本発明の化合物半導体用電極およびその製造方法を用い
ることにより、従来に比べ、低い熱処理温度でもって低
い接触抵抗率が得られるとともに、熱処理の温度制御が
容易きなり、かつ本電極形成後の、熱処理を伴う半導体
素子製造工程においても、本電極の接触抵抗率を低く保
つことが可能となる。
By using the electrode for compound semiconductors and the manufacturing method thereof of the present invention, lower contact resistivity can be obtained at a lower heat treatment temperature than before, and the temperature of the heat treatment can be easily controlled immediately, and the heat treatment after forming the electrode can be performed easily. Even in the semiconductor device manufacturing process involving the above, it is possible to maintain the contact resistivity of the electrode at a low level.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例における化合物半導体用電
極を示した構造断面図、第2図は、従来の化合物半導体
用電極を示した構造断面図、第3図は、従来および本発
明の化合物半導体用電極の製造方法における接触抵抗率
の熱処理温度特性曲線図である。 1・・・GaAs半絶縁性基板、2・・・p型GaAs
層、 3・・・AnZn合金層、 4,7・・・Au層
、 5・・・Ni層、 6・・・Zn層。
FIG. 1 is a structural cross-sectional view showing a compound semiconductor electrode according to an embodiment of the present invention, FIG. 2 is a structural cross-sectional view showing a conventional compound semiconductor electrode, and FIG. 3 is a structural cross-sectional view showing the conventional compound semiconductor electrode and the present invention. FIG. 3 is a diagram showing a heat treatment temperature characteristic curve of contact resistivity in the method for manufacturing an electrode for a compound semiconductor. 1...GaAs semi-insulating substrate, 2...p-type GaAs
3... AnZn alloy layer, 4, 7... Au layer, 5... Ni layer, 6... Zn layer.

Claims (5)

【特許請求の範囲】[Claims] (1)p型III−V族化合物半導体に対する電極であっ
て、前記p型III−V族化合物半導体とZn層もしくは
AuZn合金層との間に、Ni層を有することを特徴と
した化合物半導体用電極。
(1) An electrode for a p-type III-V group compound semiconductor, characterized in that it has a Ni layer between the p-type III-V group compound semiconductor and a Zn layer or an AuZn alloy layer. electrode.
(2)III−V族化合物半導体が、GaAsからなるこ
とを特徴とする請求項1記載の化合物半導体用電極。
(2) The electrode for a compound semiconductor according to claim 1, wherein the III-V group compound semiconductor is made of GaAs.
(3)p型III−V族化合物半導体上に、Ni層、Zn
層もしくはAuZn合金層、Au層の順からなる金属多
層膜を真空蒸着法により形成する工程と、前記金属多層
膜を有する前記p型III−V族化合物半導体を、赤外線
炉で熱処理する工程とを含むことを特徴とした化合物半
導体用電極の製造方法。
(3) Ni layer, Zn layer on p-type III-V group compound semiconductor
a step of forming a metal multilayer film consisting of a layer or an AuZn alloy layer and an Au layer in this order by a vacuum evaporation method; and a step of heat-treating the p-type III-V group compound semiconductor having the metal multilayer film in an infrared furnace. A method for producing an electrode for a compound semiconductor, comprising:
(4)熱処理が、200℃から460℃までの温度範囲
で、20秒間であることを特徴とする請求項3記載の化
合物半導体用電極の製造方法。
(4) The method for manufacturing an electrode for a compound semiconductor according to claim 3, wherein the heat treatment is performed at a temperature range of 200° C. to 460° C. for 20 seconds.
(5)III−V族化合物半導体が、GaAsからなるこ
とを特徴とする請求項3記載の化合物半導体用電極の製
造方法。
(5) The method for manufacturing an electrode for a compound semiconductor according to claim 3, wherein the III-V compound semiconductor is made of GaAs.
JP2013867A 1990-01-24 1990-01-24 Electrode for compound semiconductor and its manufacturing method Pending JPH03218676A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2013867A JPH03218676A (en) 1990-01-24 1990-01-24 Electrode for compound semiconductor and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013867A JPH03218676A (en) 1990-01-24 1990-01-24 Electrode for compound semiconductor and its manufacturing method

Publications (1)

Publication Number Publication Date
JPH03218676A true JPH03218676A (en) 1991-09-26

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JP2013867A Pending JPH03218676A (en) 1990-01-24 1990-01-24 Electrode for compound semiconductor and its manufacturing method

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JP (1) JPH03218676A (en)

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