JPH03227066A - Manufacture of schottky barrier diode - Google Patents

Manufacture of schottky barrier diode

Info

Publication number
JPH03227066A
JPH03227066A JP2264990A JP2264990A JPH03227066A JP H03227066 A JPH03227066 A JP H03227066A JP 2264990 A JP2264990 A JP 2264990A JP 2264990 A JP2264990 A JP 2264990A JP H03227066 A JPH03227066 A JP H03227066A
Authority
JP
Japan
Prior art keywords
film
opening
polysilicon film
schottky barrier
barrier diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2264990A
Other languages
Japanese (ja)
Inventor
Naoya Matsumoto
直哉 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2264990A priority Critical patent/JPH03227066A/en
Publication of JPH03227066A publication Critical patent/JPH03227066A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable a Schottky barrier diode used for a bipolar integrated circuit adapted for high speed operation and high integration by a method wherein a P-type diffusion layer is formed in a substrate through a thermal treatment using a polysilicon film formed in an opening as a diffusion source, and a metal electrode containing a metal silicide layer is formed on the opening. CONSTITUTION:A silicon oxide film 2, a BSG film 3, and a silicon nitride film 4 are formed on the surface of a silicon substrate 1. Then, an opening is formed, a polysilicon film is formed, and boron is made to diffuse into all the polysilicon film on the side wall of the opening through a thermal treatment to form a P-type polysilicon film 5a and a non-doped polysilicon film 5b in which no boron is diffused. In succession, the non-doped silicon film 5b is selectively etched, which is then thermally treated in an atmosphere of nitrogen to form a P-type diffusion layer 6 which serves as a guard ring, a platinum silicide layer 7 is formed, and a Ti-W film 8 and an aluminum electrode 9 are formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はショットキバリアダイオードの製造方法に関し
、特にバイポーラ集積回路用のショットキバリアダイオ
ードの製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a Schottky barrier diode, and more particularly to a method for manufacturing a Schottky barrier diode for bipolar integrated circuits.

〔従来の技術〕[Conventional technology]

バイポーラRAMやTTLなどのバイポーラ集積回路に
おいて、レベルシフトや基準電圧発生のためにショット
キバリアダイオードが組み込まれている。
Schottky barrier diodes are incorporated in bipolar integrated circuits such as bipolar RAM and TTL for level shifting and reference voltage generation.

ここで用いられるショットキバリアダイオードはN型シ
リコン基板の表面に堆積された絶縁膜に開口を形成し、
金属シリサイド層からなるショットキ電極を形成して素
子部が完成する。
The Schottky barrier diode used here forms an opening in an insulating film deposited on the surface of an N-type silicon substrate.
A Schottky electrode made of a metal silicide layer is formed to complete the element section.

しかしこの構造では、ショットキバリア接合周辺部に電
界が集中して逆耐圧劣化が生じ易く、−旦逆耐圧劣化が
生じると逆飽和電流の増加、順方向電流(IF値)の変
動などの不可逆変化が生じる。
However, in this structure, the electric field concentrates around the Schottky barrier junction, which tends to cause deterioration of the reverse breakdown voltage. occurs.

そのために開口部周辺にP型ガードリングを形成して、
P−N接合で電界集中を防ぐ方法が用られている。
For this purpose, a P-type guard ring is formed around the opening.
A method is used to prevent electric field concentration at a P-N junction.

従来技術によるガードリングの形成方法について、第2
図を参照して説明する。
Regarding the method of forming a guard ring using the conventional technology, the second
This will be explained with reference to the figures.

N型シリコン基板1の表面に酸化シリコン膜2を形成し
、フォトレジスト10をマスクとして硼素をイオン注入
して、ガードリングとなるP型拡散層6を形成する。
A silicon oxide film 2 is formed on the surface of an N-type silicon substrate 1, and boron ions are implanted using the photoresist 10 as a mask to form a P-type diffusion layer 6 that will serve as a guard ring.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来技術によるショットキバリアダイオードにおいては
、フォトリソグラフィを用いているのでガードリングの
面積が大きくなる。
In the Schottky barrier diode according to the prior art, since photolithography is used, the area of the guard ring becomes large.

そのためP−N接合容量が寄生容量として高速化の障害
になり、過大なチップ面積を要するため高集積化の障害
になっている。
Therefore, the PN junction capacitance acts as a parasitic capacitance and becomes an obstacle to increasing speed, and requires an excessively large chip area, which becomes an obstacle to increasing integration.

動作領域として10×10μm2のショットキバリアダ
イオードが必要なとき、幅0.5μmのガードリングを
形成しようとすると、フォトリソグラフィーの位置合せ
精度とエツチング精度と合せて片側0,5μmとして、 (0,5+10+o、5)x (0,5+1o+0.5
)=121μm2 と動作領域の2割増しの開口面積が必要になり、ガード
リングの面積は121〜100=21μm2となる。
When a Schottky barrier diode of 10 x 10 μm2 is required as the operating area, if you are trying to form a guard ring with a width of 0.5 μm, one side will be 0.5 μm in combination with the alignment accuracy of photolithography and etching accuracy, (0.5 + 10 + o ,5)x (0,5+1o+0.5
)=121 μm2, which is 20% larger than the operating area, and the area of the guard ring is 121 to 100=21 μm2.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のショットキバリアダイオードは、N型シリコン
基板の表面に、第1の絶縁膜、BSG膜、第2の絶縁膜
を順次堆積する工程と、積層膜に開口を設けてから、ポ
リシリコン膜を堆積して熱処理することにより、BSG
膜を拡散源として開口部側壁のポリシリコン膜に硼素を
拡散する工程と、硼素が拡散されていないポリシリコン
膜を選択エツチングしてから、熱処理して開口部のポリ
シリコン膜を拡散源として基板にP型拡散層を形成する
工程と、開口部に金属シリサイド層を含む金属電極を形
成する工程から構成されている。
The Schottky barrier diode of the present invention includes a step of sequentially depositing a first insulating film, a BSG film, and a second insulating film on the surface of an N-type silicon substrate, and after forming an opening in the laminated film, a polysilicon film is deposited. By depositing and heat treating, BSG
A process of diffusing boron into the polysilicon film on the side wall of the opening using the film as a diffusion source, selectively etching the polysilicon film in which boron has not been diffused, and then heat-treating the polysilicon film on the opening as a diffusion source. The process consists of a step of forming a P-type diffusion layer in the opening, and a step of forming a metal electrode including a metal silicide layer in the opening.

〔実施例〕〔Example〕

本発明の一実施例について、第1図(a)〜(e)を参
照して説明する。
An embodiment of the present invention will be described with reference to FIGS. 1(a) to (e).

はじめに第1図(a)に示すように、900〜1000
℃のスチーム酸化を行なうことにより、シリコン基板1
の表面に厚さ500〜1000人の酸化シリコン膜2を
形成し、有機ボロンガラス溶液をスピンコードしてから
800〜900℃の熱処理をして、厚さ500〜100
0人のBSG膜3を形成し、CVD法により厚さ500
〜1000人の窒化シリコン膜4を形成する。
First, as shown in Figure 1(a), 900 to 1000
By performing steam oxidation at ℃, silicon substrate 1
A silicon oxide film 2 with a thickness of 500 to 1000 nm is formed on the surface of the film, and after spin-coding an organic boron glass solution, heat treatment is performed at 800 to 900°C to form a silicon oxide film 2 with a thickness of 500 to 1000 nm.
A BSG film 3 with a thickness of 500 mm was formed using the CVD method.
~1000 silicon nitride films 4 are formed.

つぎに第1図(b)に示すように、フォトリソグラフィ
により開口を形成し、厚さ2000人のポリシリコン膜
を形成してから、熱処理して開口部側壁のポリシリコン
膜全体に硼素を拡散して、P型ポリシリコン膜5aと、
硼素が拡散されていないノンドープポリシリコン膜5b
とを形成する。
Next, as shown in Figure 1(b), an opening is formed by photolithography, a polysilicon film with a thickness of 2000 nm is formed, and then boron is diffused into the entire polysilicon film on the side wall of the opening by heat treatment. Then, a P-type polysilicon film 5a,
Non-doped polysilicon film 5b in which boron is not diffused
and form.

つぎに第1図(c)に示すように、KOHやヒドラジン
などのアルカリ溶液で、ノンドープポリシリコン膜5b
を選択エツチングしてから900〜1000℃の窒素雰
囲気中で熱処理を行ない、ガードリングとなるP型拡散
層6を形成する。
Next, as shown in FIG. 1(c), the non-doped polysilicon film 5b is coated with an alkaline solution such as KOH or hydrazine.
After selective etching, heat treatment is performed in a nitrogen atmosphere at 900 to 1000 DEG C. to form a P-type diffusion layer 6 that will serve as a guard ring.

つぎに第1図(d)に示すように、スパッタ法により厚
さ200〜500人の白金を堆積し、400〜600℃
の熱処理で白金シリサイド層7を形成してから、反応し
ていない白金をHNO3:HCρ=1:3の王水でエツ
チングする。
Next, as shown in FIG. 1(d), platinum was deposited to a thickness of 200 to 500 layers by sputtering and heated at 400 to 600°C.
After the platinum silicide layer 7 is formed by heat treatment, unreacted platinum is etched with aqua regia of HNO3:HCρ=1:3.

つぎに第1図(e)に示すように、バリアとしてのTi
−W膜8とアルミニウム電極9とを形成して、ショット
キバリアダイオードの素子部が完成する。
Next, as shown in Fig. 1(e), Ti is used as a barrier.
-W film 8 and aluminum electrode 9 are formed to complete the element portion of the Schottky barrier diode.

〔発明の効果〕〔Effect of the invention〕

本発明において、開口部に対して自己整合的(セルファ
ライン)に狭いガードリングを形成することができる。
In the present invention, a narrow guard ring can be formed in a self-aligned manner (self-alignment) with respect to the opening.

動作領域として10×10μm2のショットキバリアダ
イオードが必要なとき、ポリシリコンの膜厚だけ拡げれ
ばいいので、 (10+0.5)X (10+0.5)=11025μ
m2 となり、ガードリングの面積は110.25−100=
10.25μm2となり、従来技術の場合の占有面積の
半分まで削減される。
When a Schottky barrier diode of 10 x 10 μm2 is required as the operating area, it is only necessary to increase the thickness of the polysilicon film, so (10 + 0.5) x (10 + 0.5) = 11025 μ
m2, and the area of the guard ring is 110.25-100=
The area is 10.25 μm2, which is reduced to half of the area occupied by the conventional technology.

このようにして、高速化、高集積化に適したバイポーラ
集積回路用のショットキバリアダイオードの形成が可能
になった。
In this way, it has become possible to form a Schottky barrier diode for bipolar integrated circuits that is suitable for high speed and high integration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(e)は本発明の一実施例を製造工程順
に示す断面図、第2図は従来技術によるショットキバリ
アダイオードのガードリングの製造工程を示す断面図で
ある。 1・・・N型シリコン基板、2・・・酸化シリコン膜、
3・・・BSG膜、4・・・窒化シリコン膜、5a・・
・P型ポリシリコン膜、5b・・・ノンドープポリシリ
コン膜、6・・・P型拡散層、7・・・白金シリサイド
層、8・・・Ti−W膜、9・・・アルミニウム電極、
10フオトレジスト。
FIGS. 1A to 1E are cross-sectional views showing an embodiment of the present invention in the order of manufacturing steps, and FIG. 2 is a cross-sectional view showing the manufacturing process of a guard ring for a Schottky barrier diode according to the prior art. 1... N-type silicon substrate, 2... silicon oxide film,
3...BSG film, 4...Silicon nitride film, 5a...
- P-type polysilicon film, 5b... Non-doped polysilicon film, 6... P-type diffusion layer, 7... Platinum silicide layer, 8... Ti-W film, 9... Aluminum electrode,
10 photo resist.

Claims (1)

【特許請求の範囲】[Claims] N型シリコン基板の表面に、第1の絶縁膜、BSG膜、
第2の絶縁膜を順次堆積する工程と、前記積層膜に開口
を設けて前記基板の一部を露出させる工程と、ポリシリ
コン膜を堆積して熱処理することにより、前記BSG膜
を拡散源として前記開口部側壁の前記ポリシリコン膜に
硼素を拡散する工程と、硼素が拡散されていない前記ポ
リシリコン膜を選択エッチングする工程と、熱処理によ
つて前記開口部のポリシリコン膜を拡散源として前記基
板にP型拡散層を形成する工程と、前記開口部に金属シ
リサイド層を含む金属電極を形成することを特徴とする
ショットキバリアダイオードの製造方法。
A first insulating film, a BSG film,
By sequentially depositing a second insulating film, forming an opening in the laminated film to expose a part of the substrate, and depositing and heat-treating a polysilicon film, the BSG film is used as a diffusion source. A step of diffusing boron into the polysilicon film on the side wall of the opening, a step of selectively etching the polysilicon film in which boron is not diffused, and a heat treatment using the polysilicon film of the opening as a diffusion source. A method for manufacturing a Schottky barrier diode, comprising the steps of forming a P-type diffusion layer on a substrate, and forming a metal electrode including a metal silicide layer in the opening.
JP2264990A 1990-01-31 1990-01-31 Manufacture of schottky barrier diode Pending JPH03227066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2264990A JPH03227066A (en) 1990-01-31 1990-01-31 Manufacture of schottky barrier diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2264990A JPH03227066A (en) 1990-01-31 1990-01-31 Manufacture of schottky barrier diode

Publications (1)

Publication Number Publication Date
JPH03227066A true JPH03227066A (en) 1991-10-08

Family

ID=12088698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2264990A Pending JPH03227066A (en) 1990-01-31 1990-01-31 Manufacture of schottky barrier diode

Country Status (1)

Country Link
JP (1) JPH03227066A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5696025A (en) * 1996-02-02 1997-12-09 Micron Technology, Inc. Method of forming guard ringed schottky diode
WO1999062124A1 (en) * 1998-05-26 1999-12-02 Siemens Aktiengesellschaft Method for producing schottky diodes
KR100317606B1 (en) * 1999-06-03 2001-12-22 곽정소 Method for fabricating Schottky barrier diode
US7307329B2 (en) * 2003-07-08 2007-12-11 Infineon Technologies Ag Electronic device with guard ring

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5696025A (en) * 1996-02-02 1997-12-09 Micron Technology, Inc. Method of forming guard ringed schottky diode
WO1999062124A1 (en) * 1998-05-26 1999-12-02 Siemens Aktiengesellschaft Method for producing schottky diodes
KR100317606B1 (en) * 1999-06-03 2001-12-22 곽정소 Method for fabricating Schottky barrier diode
US7307329B2 (en) * 2003-07-08 2007-12-11 Infineon Technologies Ag Electronic device with guard ring

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