JPH0322785A - phase detection device - Google Patents

Abstract

PURPOSE:To always execute an exact phase detection by eliminating the information of a burst period disturbed by a defect and detecting a phase from only correct information. CONSTITUTION:A defect detecting means 3 detects a defective part of a video signal and outputs a defect detecting signal, and a flag generating means 4 inputs the defect detecting signal, and outputs whether the defect detecting signal is generated in a burst period held in a buffer 2 or not, as a flag. A selecting and averaging means 5 selects only burst information of a period which is not influenced by a defect by using the flag and inputs it from the buffer 2, and derives an average with regard to a burst signal in one horizontal scanning period. An arithmetic means 6 a calculates phase of the burst signal of its horizontal scanning period from this averaged information. In such a way, the burst period in which there is a defect in a video signal is eliminated from the operation, therefore, an exact phase detection can always be executed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a phase detection device for detecting the phase of a burst signal in a video signal sampled at a 1,t% clock with respect to a reference clock. When a video signal recorded on a conventional recording medium such as a VTR or a video disk is reproduced, the video signal generally contains a time axis error (jitter). If there is such jitter in the reproduced signal, its effect will be directly on the video signal as described in the same page. At the same time, if the video signal is a composite color signal, it causes color unevenness and degrades the WI quality. Therefore, in this type of playback device,
Time axis correction that removes jitter from the video signal by generating a clock that follows the fluctuations in the time axis of the video signal, writing the video signal into memory in synchronization with this clock, and reading it from the memory using a stable fixed clock. equipment is often used. In order to realize such a time axis correction device, it is necessary to accurately detect time axis fluctuations of a video signal. Methods for detecting time axis information from television signals include methods that use horizontal synchronization signals and methods that use burst signals (for example, Japanese Patent Laid-Open No. 58
-124385).

Problems to be Solved by the Invention In conventional phase detection devices, there is no protection against defects in the video signal, so there is a problem in that it is not possible to accurately detect the phase when the burst signal is disturbed by a defect. be. Means for Solving the Problems In order to solve the above problems, the phase detection device of the present invention has the following features:
a sampling means for sampling a video signal in synchronization with a reference clock; a buffer for holding in information corresponding to one period of a burst signal in the sampled video signal; and a buffer for detecting defects in the video signal. a defect detection means for outputting a defect detection signal; a flag generation means for storing the presence or absence of the defect detection signal during one cycle of the nost signal as a flag; The information corresponding to the burst period that did not exist is selectively taken in from the vanofa using the flag (average phase calculation means for calculating the burst average phase for 11 chronographs) is provided.

The average phase detection means includes a bus averaging means that selectively takes in and averages information corresponding to burst periods in which no defects are detected from the buffer using a flag, and information averaged by the selective averaging means. It is preferable to use calculation means for determining the burst phase relative to the reference chronograph based on the chronograph.

Function: With the above-described configuration, the present invention detects the phase only from correct information, excluding burst period information disturbed by defects, so that phase detection is always accurate. It can be done. Embodiment Hereinafter, a phase detection device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a phase detection device according to an embodiment of the present invention, where l is a sampling means, 2 is a buffer, 3 is a defect detection means, 4 is a flag generation means, and 5 is a block diagram of a phase detection device according to an embodiment of the present invention.
Hai! 6 is a calculation means. Further, 7 indicated by a broken line is a pronoc corresponding to the average phase calculation means. A reference clock is input from terminal A, and a video signal is input from terminal B. The a1 converting means 1 samples the video signal in synchronization with the reference clock. Although the sampled signal can be handled as is, it is generally more convenient to handle it as a digital signal, and in that case, it is also converted into a digital code at the same time as sampling. The sampled video signal is sent to the buffer 2, and the hff information for a period corresponding to one cycle of the burst signal is always held internally. On the other hand, the defect detection means 3 detects a defective location in the video signal and outputs a defect detection signal. Defect detection may be performed using any method as long as it can detect signal loss or deterioration due to scratches or dirt on a recording medium such as a disk or tape, and various methods are known. The flag generating means 4 inputs the defect detection signal and generates the Hanofa 2.
It outputs as a flag whether a defect detection signal was generated/JEL during the burst ilJl held in . Selection average 1,000 steps 5 uses flags to select only Shumei's burst information that is not affected by defects and inputs it from the bath sofa.
Find the average of the burst signal in one horizontal scan interval.

The calculating means 6 calculates the phase of the Hurst signal between the water and the horizontal scans from the averaged information obtained in the 1,000 steps 5. In this way, since the defect detection signal is used to remove from the calculation the Haas 1 period in which the video signal has a defect, positive value eight phase detection can always be performed.

Next, with reference to FIG. 2, a more specific example of the configuration of the main parts of the phase detection means according to an embodiment of the present invention will be explained. FIG. 2 shows a buffer 2 of the phase detection means in an embodiment of the present invention.
3 is a circuit diagram of a flag generating means 4 and an encounter averaging means 5. FIG. In Figure 2, 2l22.23, 24, 55.56 are registers, 4l is a shift register, 25.26 is a freeze counter,
53.54 is added! '): device, 42, 51. 52 is an AND gate, and 57 is a timing pulse generator. Further, portions corresponding to the banofer 2, the flag generation stage 4, and the selection averaging means 5 are each shown surrounded by broken lines. A basic clock is input from terminal C. Also, terminal D
A video signal that has been sampled and converted into a digital code is input from the . Registers 21 to 24 input video signals in synchronization with the reference clock and shift them in order. )lf
The frequency of the n clock is in this case the burst frequency, ie, four times the frequency of the color subcarrier. Therefore, the registers 21 to 24 always hold a digital code corresponding to one cycle of the burst signal. fJW: The devices 25 and 26 calculate the difference between the contents of every other register. This means finding the difference between sample points of the burst signal that are in opposite phases to each other, and thereby removing the direct current signal from the sample data. Further, the outputs of the two subtractors are out of phase with each other by 90 degrees. For example, if the output of the subtractor 25 is a sine component, the output of the subtractor 26 is a cosine component. On the other hand, a defect detection signal is input from terminal E, and II! +! A delay equal to the delay of the image signal, that is, a delay of four cycles of the reference clock is provided by the shift register 4l. The output of each binoto of the shift register 4l is given to an AND gate 42. Now, if the missing detection signal returns to "L" indicating a defect, when the contents of the shift register are all "H" level, the li power of the AND gate 42 will be
It becomes II゛Lehel.

In other words, the output of the AND gate 42 becomes "!1" level only when the contents of the resists 21 to 24 are all information on sample points where no defects are detected. Gate 1.51.52 is operated by the output of logic gate 42,
It works to pass the sine and cosine components only when there is no information about a sample point where a defect has been detected in the buffer, and otherwise close the gate. In this case, it is assumed that the digital code is expressed as a two's complement number. Therefore,
When the gate is closed, all bits are 'L' level.
In other words, a digital code of 0 is given. Adders 53 and 54 and registers 55 and 56 constitute two integral circuits that cumulatively add sine and cosine components, and their operation is controlled by a timing pulse generator 57. The device 57 generates pulses with a burst period during the burst period of the image S; based on the S clock pulse to perform an integral operation for each power, and also generates a seven-note pulse before the burst period to register the register. Reset the contents. However, as mentioned above, when the buffer contains information about detected defects, the integral input is set to 0 by the gates 51 and 52, so only accurate information that does not contain defects is taken into the integration circuit. It will be.

Thereafter, the phase is determined by the calculation means in the same manner as in the Tsuchiki phase detection device. That is, the tangent is obtained by dividing the sine predetermined by the cosine, and the phase can be obtained by obtaining the arctangent of this value using a ROM table or the like.

In addition, in the embodiment shown in FIG. 2, the information on the burst cycle is maintained as it is in Hanofa. } L. The selective averaging means takes the average of a certain amount of sine and cosine, but it is not limited to this structure. For example, the difference is first taken at the buffer 1 input stage and the sine and cosine coefficient Alternatively, the inverted C burst signal may be sent as it is to the selective averaging means to take the average value.

Further, in FIG. 1, an example is shown in which the averaging 1γ output means 7 is composed of the selection averaging means 5 and the performance II means 6, but for example, the phase of each burst period is first determined by the calculating means, It is also possible to adopt a configuration in which averaging is selectively performed with reference to a flag at the final stage.

Effects of the Invention As described above, according to the present invention, when the image L'Sj includes a defect, the influence thereof can be removed and the accurate burst phase can be detected using the defective information.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of a phase detector according to the present invention, and FIG. 2 is a circuit diagram of the main parts of an embodiment of the phase detector of the present invention. 1... Sampling means, 2... Buffer,
3... Defect detection means, 4... Flag generation means, 5... Selection averaging means, 6...
Calculating means, 7... Mean phase calculating means.

Claims (2)

[Claims] (1) A sampling means for sampling a video signal in synchronization with a reference clock, a buffer for holding information corresponding to one period of a burst signal in the sampled video signal, and a buffer for holding information corresponding to one period of a burst signal in the sampled video signal; a defect detection means for detecting a defect in a video signal and outputting a defect detection signal; a flag generation means for storing the presence or absence of the defect detection signal during one cycle of the burst signal as a flag; and average phase calculation means for selectively fetching information corresponding to a burst period in which no defect is detected from the burst signal from the buffer using the flag, and calculating an average burst phase with respect to a reference clock. Detection device. (2) The average phase detection means includes a selective averaging means that selectively takes in and averages information corresponding to burst periods in which no defects are detected from the buffer using a flag, and information that is averaged by the selective averaging means. 2. The phase detection device according to claim 1, further comprising arithmetic means for determining the burst phase relative to the reference clock based on the information.