JPH0323708Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a quadrature phase signal generation circuit.

(Prior Art) For example, phase detection requires orthogonal two-phase clocks having the same frequency as the input signal.

Conventionally, therefore, to create such an orthogonal two-phase clock, a circuit constructed of two D-type flip-flops 1 and 2, for example, as shown in FIG. 3, has been used. In Figure 3,
A first clock having the same frequency f as the input signal is applied to the D input terminal of the flip-flop 1 at the front stage, and an output signal from the D output terminal of the flip-flop 1 at the front stage is applied to the D input terminal of the flip-flop 2 at the rear stage. , of each flip-flop 1 and 2.
A second clock having a frequency 4f four times that of the input signal is applied to the CK terminal.

With this configuration, two-phase clocks having the same frequency f and having a 90° phase difference can be obtained from the D output terminal of the flip-flop 1 at the front stage and the D output terminal of the flip-flop 2 at the rear stage.

(Problem to be solved by the invention) However, according to such a conventional configuration, the first clock having the same frequency f as the input signal and the second clock having the frequency 4f four times that of the input signal are connected. However, there is a problem in that the circuit configuration becomes complicated.

The present invention focuses on these points, and its purpose is to generate a signal that can obtain orthogonal two-phase clocks based on one type of signal having the same frequency f as the input signal with a simple circuit configuration. The purpose is to provide circuits.

(Means for Solving the Problems) The present invention that achieves the above object has a sine wave signal source and an intermediate output terminal for extracting 1/2 delay time, and outputs the output signal of the sine wave signal source. The output signal of the sine wave signal source is directly applied to the non-inverting input terminal, and the output signal of the sine wave signal source is applied to the inverting input terminal via the delay circuit. a first operational amplifier;
The output signal of the sine wave signal source is applied from the intermediate output terminal of the delay circuit to the non-inverting input terminal, and the second operational amplifier is connected to the common potential point to the inverting input terminal. from the output terminal
It is characterized by obtaining output signals with a 90° phase difference.

(Example) Hereinafter, an example of the present invention will be described in detail using the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention. In FIG. 1, 1 is a sine wave signal source.
2 is a delay circuit which has an intermediate output terminal for taking out a 1/2 delay time and generates a delay time Td shorter than the period of the output signal _S1 of the sine wave signal source 1.
3 is a first operational amplifier, to which the output signal S ₁ of the sine wave signal source 1 is directly applied to the non-inverting input terminal;
The output signal S ₁ of the sine wave signal source 1 is applied to the inverting input terminal via the delay circuit 2 as S ₂ . 4
is a second operational amplifier, the output signal _S1 of the sine wave signal source 1 is applied as _S3 from the intermediate output terminal of the delay circuit 2 to the non-inverting input terminal, and the common potential point is connected to the inverting input terminal. has been done.

The operation of the apparatus configured as described above will be explained using the timing chart shown in FIG. In FIG. 2, a is the output signal S ₁ of the sine wave signal source 1
, b indicates the output signal S ₄ of the first operational amplifier 3, and c indicates the output signal S ₅ of the second operational amplifier 4.

First, the first operational amplifier 3 operates as a maximum (minimum) value detection circuit. That is, the output signal S ₄ is 1/1/of the delay time Td of the delay circuit ₂ from the maximum value point Pmax of the input signal S ₁ at which the input signal S ₁ of the non-inverting input terminal is smaller than the input signal S 2 of the inverting input terminal. 2
The minimum value point of the input signal S1, which changes from H level to L level at the shifted time point A, and the input signal _S1 of the non-inverting input terminal becomes larger than the input signal _S2 of the inverting input terminal _.
The signal changes from L level to H level at time B, which is 1/2 the delay time Td of the delay circuit 2 from Pmin.

On the other hand, the second operational amplifier 4 operates as a zero detection circuit. Here, an output signal S ₃ from an intermediate output terminal, which extracts 1/2 the delay time of the delay circuit 2, is applied to the non-inverting input terminal of the second operational amplifier 4. Therefore, the output signal _S5 of the second operational amplifier 4 is the input signal of the non-inverting input terminal of the first operational amplifier 3.
Delay time Td of delay circuit 2 from the point where S ₁ crosses the zero level in the process from the local minimum value to the local maximum value
The level changes from the L level to the H level at a time point C shifted by 1/2 from the point where the input signal _S1 at the non-inverting input terminal of the first operational amplifier 3 crosses the zero level in the process of going from the maximum value to the minimum value. Delay time of delay circuit 2
At time D, which is shifted by 1/2 of Td, the level changes from H level to L level.

The phase difference between the output signal S ₄ of the first operational amplifier 3 and the output signal S ₅ of the second operational amplifier 4 thus obtained is 90°.

According to such a configuration, only one type of sine wave signal with a reference phase is required as the signal type, and the circuit configuration is simpler than the conventional circuit consisting of two D-type flip-flops. It is suitable, for example, as a clock circuit for a phase detector.

Note that the sine wave signal source may be an independent oscillation circuit, or may be one that shapes the waveform of the detected signal, for example.

(Effects of the invention) As explained above, according to the invention, orthogonal phase signals can be obtained with a simple circuit configuration to obtain orthogonal two-phase clocks based on one type of signal having the same frequency f as the input signal. A generation circuit can be realized, and the practical effects are great.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention;
1 is a timing chart for explaining the operation of FIG. 1, and FIG. 3 is a circuit diagram showing an example of a conventional quadrature signal generation circuit. 1...Sine wave signal source, 2...Delay circuit, 3, 4
...Operation amplifier.

Claims (1)

[Scope of utility model registration request] A sine wave signal source, a delay circuit that has an intermediate output terminal for extracting a 1/2 delay time and generates a delay time shorter than the period of the output signal of the sine wave signal source, and a sine wave signal source for the non-inverting input terminal. a first operational amplifier to which an output signal of a wave signal source is directly applied, an output signal of a sine wave signal source is applied to an inverting input terminal via a delay circuit, and a non-inverting input terminal receives an output signal from an intermediate output terminal of the delay circuit; and a second operational amplifier to which the output signal of the sine wave signal source is applied and whose inverting input terminal is connected to a common potential point, and output signals having a phase difference of 90° are obtained from the output terminals of these operational amplifiers. A quadrature-phase signal generation circuit characterized by: