JPH03237363A - Power meter circuit - Google Patents

Abstract

PURPOSE:To attain an accurate measurement of power energy by finding the integrated power energy in the manner of subtracting the power energy obtd. by accumulating and multiplying respectively a voltage and a current from the power energy obtained by accumulating the multiplication of the voltage and current which are subjected to an A/D conversion. CONSTITUTION:A voltage signal 1 and a current signal 2 are converted to digital voltage/current signals 5, 6 respectively through the A/D converters 3, 4. The signals 5, 6 are inputted to a multiplier 7 to obtain power signals 8. The signals 8 are accumulated and added by an accumulating/adding device B for every sample of the signals 1 and 2 to output the accumulated power energy 13. On the other hand, the signals 5, 6 are inputted respectively to accumulating/adding devices A, C and outputted as the accumulated voltage/ current signals 12, 14. The signals 12, 14 are multiplied by a multiplier 21 and outputted as the accumulated power energy 22. Subsequently, a subtraction is made for the accumulated power energy 13, 22 by a subtracting device 23 to output the integrated power energy 24. An offset caused by the A/D converter is thereby eliminated and the exact power energy can be measured.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power meter circuit that converts voltage and current into digital values, multiplies them by one-digit data, and then integrates the data to obtain integrated power amount data.

[Conventional technology] Here is one example of a conventional power meter circuit of this type.

The configuration shown in FIG. 2 is known.

Referring to FIG. 2, a voltage signal 25 and a current signal 26 are input to analog-to-digital converters 27 and 28, respectively, where they are converted into a digital voltage signal 29 and a digital current signal 30.

These digital voltage signal 29 and digital current signal 30 are multiplied by 1 by a digital multiplier 31 and output as a multiplied digital signal (digital power signal) 32. This digital power signal 32 is given to a cumulative adder having an adder 33 and a delay device 35, where it is cumulatively added and power il (digital power ji) is output.

[Problems to be Solved by the Invention] By the way, in the case of the above-mentioned power meter circuit, an error occurs when measuring the amount of power due to the offset in the analog-to-digital converter. In other words, there is a problem that the amount of electric power cannot be measured accurately.

An object of the present invention is to provide a power meter circuit that can accurately measure the amount of power.

[Means for Solving the Problems] The power meter circuit of the present invention includes a first multiplier that multiplies a digital voltage signal and a digital current signal to output a digital power signal, and a first multiplier that outputs a digital power signal by multiplying a digital voltage signal and a digital current signal; a first accumulating means for determining a first amount of power; and a second accumulating means for accumulating the digital voltage signals to obtain a cumulative digital voltage signal.

a third accumulating means for accumulating the digital current signal to obtain a cumulative digital current signal; a second multiplying means for multiplying the cumulative digital voltage signal and the cumulative digital current signal to obtain a second electric energy; It is characterized by having a subtraction means for subtracting the second electric energy from the electric energy and outputting the integrated electric energy.

[Example] The present invention will be explained below with reference to Examples.

Referring to FIG. 1, a voltage signal 1 and a current signal 2 are input to analog-to-digital converters 3 and 4, respectively, where they are converted into a digital voltage signal 5 and a digital current signal 6. These digital voltage signal 5 and digital current signal 6 are input to a multiplier 7 to obtain a single multiplied digital signal (digital power signal) 8. This digital power signal 8 is cumulatively added for each sample of the voltage signal 1 and the current signal 2 in an accumulator B which is connected to an adder 10 and a delay device 16, and a first accumulated digital signal 13 is output.

On the other hand, the digital voltage signal 5 is sent to the adder 9 and the delay device 15.
where the voltage signal 1
is cumulatively added for each sample.

Then, it is output as a cumulative digital voltage signal 2. Similarly, the digital current signal 6 is applied to a cumulative adder C comprising an adder 11 and a delay device 16, where:
Cumulative addition is performed for each sample of current signal 2. Then, it is output as a cumulative digital current signal 14.

The cumulative digital voltage signal 12 and the cumulative digital current signal 14 are applied to a 1 multiplier 21, where they are multiplied and
It is output as a second cumulative digital signal 22.

The first and second cumulative digital signals 13 and 22 are input to a subtracter 23 and subtracted.

here.

The voltage signal is expressed as v−ASln(ωt+θ)×α...■(
α: offset amount, A: amplitude) illEll branch flow 1-BSin (ω = 10 + φ) +
β...■ (β: offset amount, B: amplitude, φ: phase difference), power Pv-i is expressed by the following equation.

v-i-ABSin (ωt 10) Siri (
ωt +θ+φ)+AβSin (ωt 10) +Bα5in(ωt +θ+φ) +α ◆ β−1
/2 AB (cos φ−cos(2ωt+2
0+φ)) +ABSin (ω t 10)+
BαSin (ω t +θ+φ)+α ◆ β■・
When i is integrated over time t, the ω component term becomes 01; as a result.

J'v・i dt-1/2 A B cosφfdt+
α, f'dtxβfdt...■.

On the other hand, when voltage signal V and current signal i are integrated over time t, the ω component term becomes 0, resulting in 2 fvdt-afdt'...■J
'1dt-β, l'dt...
■It becomes. Now, multiplying the formula ■ by the formula ■.

J' vdt-f idt -a J' dtβfdt
−・・■. And if we subtract the formula ■ from the formula ■.

J' v e 1dt-f vdl f idt-l/
2 A B cos φf tit+ a f d
tβfdt−αfdtβj” dt −1/2 A
B cos φfdt-0, ■.

Here, assuming that there is no offset between the voltage signal V and the current signal i, the power (v-i) is.

vi −AB fsIn (ωt+θ) 5in(
ω to 1θ+φ)) 11/2 AB (cosφ−cos(2ωt + 2
θ+0)) ...■. The energy is obtained by integrating y*i over time t, and the ω component term becomes 0, resulting in.

f v-i dt-1/2 A Bcos φfdt
- becomes @r.

Comparing the equation (2) and the [phase] equation, the results match, so the offset amount is removed from the output from the subtracter 23, that is, the amount of electric power.

[Effects of the Invention] As explained above, in the present invention, the digital voltage signal and the digital current signal are multiplied to obtain electric power, and this electric power is accumulated to obtain the first electric energy. and digital current signals respectively,
Since the cumulative digital voltage and cumulative digital current are determined, the second power amount is determined by multiplying these, and the second power amount is subtracted from the first power amount, the regular power amount is determined. This has the effect of being able to remove the offset amount from the regular power amount.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a power meter circuit according to the present invention, and FIG. 2 is a block diagram of a conventional power meter circuit. 1.25...Analog voltage signal, 2.26...Analog current signal, 3, 4, 27.28...Analog-digital converter, 5.29...Digital voltage signal. 6.30...Digital current signal, 7,21.31.
... Multiplier, 8.32 ... Instantaneous power, 9, 10, 11
゜33... Adder, 12.18... Voltage side cumulative adder output, 13, 19, 34.36... Power cumulative adder output (power amount), 14.20... Current side cumulative Adder output, 15, 16, 17.35...Delay unit, 22...
Multiplication output of voltage and current cumulative value, 23... Subtractor, 24
... Output of the subtractor (power amount with offset removed). A, B, C, D...cumulative adder (integrator). Figure 1 Figure 2

Claims (1)

[Claims] 1. In a power meter circuit that converts a voltage signal and a current signal into a digital voltage signal and a digital current signal, respectively, and calculates an integrated power amount using the digital voltage signal and the digital current signal, the digital voltage signal and the digital current a first multiplier that outputs a digital power signal by multiplying the digital power signal; and a first accumulator that accumulates the digital power signal to obtain a first amount of power;
a second accumulating means for accumulating the digital voltage signal to obtain a cumulative digital voltage signal; a third accumulating means for accumulating the digital current signal to obtain a cumulative digital current signal; a second multiplier that calculates a second amount of power by multiplying the second amount of power by the digital current signal; and a second multiplier that subtracts the second amount of power from the first amount of power and outputs the subtracted amount of power as the integrated amount of power. A power meter circuit characterized in that it has a subtraction means.