JPH03249846A - Demodulator - Google Patents

Abstract

PURPOSE:To prevent the malfunction of a line quality supervisory system and line switching by outputting a second pulse as an error pulse when the step-out of the carrier of an input signal and a reproduced carrier occurs and a first pulse is prevented from being outputted. CONSTITUTION:A means 1 syncronously detects the input signal (a) by the reproduced carrier (i) from VCO 8 and outputs a base band signal (c), and a means 2 outputting the first pulse (h) showing malfunction when the level of the base band signal (c) comes beyond a reference value are provided. A means 9 generating the second pulse (j) instead of the first pulse (b) and a means 10 which outputs the first pulse (h) when the carrier (b) of the input signal (e) is synchronized with the reproduced carrier (i) and which outputs the second pulse (j) at the time of step-out are provided. Thus, the malfunction of the supervisory system and the line switching can be prevented.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a PSK or QAM modulation demodulator.

[Conventional technology]

The error pulse output from a conventional demodulator is divided into two parts: a main discriminator that identifies the input signal at a predetermined level, an open discriminator that identifies the input signal at a discrimination level different from the discrimination level of this main discriminator, and A method is known in which an output signal from a sub-discriminator is input to a comparator and an error pulse is output when the discrimination results are different.

FIG. 2 is a block diagram showing an example of a conventional demodulator.

An input signal a of an n-value PSK or QAM modulation system is synchronously detected by a phase detector 1 using a recovered carrier wave i from a vcos, and the signal is input to an identification section 2. The discriminator 2 converts the input signal into a baseband signal C and supplies it to the main discriminator 3 and the discriminator 4, and the output signals d and e from the main and sub discriminators 3 and 4 are sent to the comparator. 5 is input. The comparator 5 outputs a pulse f when the output signals d and e rise. i! Betsugun 2
outputs the pulse f as an error pulse, and
The APC control signal is output to the upper PC detection circuit 6. AP
In the C detection circuit 6, the input APC control signal is
A C signal is output to control vcos, and VC○8 outputs a reproduced carrier wave i. The baseband signal output from the phase detector 1 is also input to the clock regeneration circuit 9, and the output signal j of the clock regeneration circuit 9 is input to the identification section 2.

Note that the error pulse outputted from the identification unit 2 is used for a line quality monitoring system, line switching, and the like.

[Problem to be solved by the invention]

In the conventional demodulator described above, the outputs of the main discriminator 3 and the discriminator 4 become uncertain due to the loss of synchronization between the carrier wave of the input signal and the reproduced carrier wave in the phase detector l, and the error pulse k may not occur. However, it has the disadvantage of causing the monitoring system, line switching, etc. to malfunction.

[Means to solve the problem]

The demodulator of the present invention includes means for synchronously detecting an n-value PSK or QAM modulated input signal using a regenerated carrier wave from a cO and outputting a baseband signal, and a means for outputting a baseband signal when the level of the baseband signal deviates from a reference value. means for outputting a first pulse indicating a malfunction when the
and means for outputting the first pulse when the carrier wave of the input signal and the reproduced carrier wave are synchronized, and outputting the second pulse when the carrier wave of the input signal and the reproduced carrier wave are asynchronous. ing.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

This embodiment includes a phase detector 1 that synchronously detects an n-value PSK or QAM modulated input signal a using a regenerated carrier wave i from a vcos and outputs it as a signal, and a phase detector 1 that detects a baseband signal C obtained from the signal. The main and sub-discriminators 3 and 4 distinguish based on the level and output as detection signals d and e, the comparator 5 outputs a pulse f when the detection signals d and e are different, and the malfunction occurs when the pulse f is output. an identification unit 2 which outputs an error pulse indicating the error pulse and a phase information signal g; a clock regeneration circuit 9 which inputs the signal S and generates a clock pulse j; and a clock regeneration circuit 9 which inputs the phase information signal g and outputs the APC signal V CQ 8.
4. : An APC detection 1iii circuit 6 that outputs, a carrier asynchronous detection circuit 7 that outputs a signal when the carrier of the input signal a and the reproduced carrier i are asynchronous due to the APC signal, and an error pulse when the signal is input. The switch circuit 10 outputs a clock pulse j instead of the clock pulse j.

Next, the operation will be explained.

The phase detector 1 receives a signal a of n-value PSK or n-value QAM system.
The input and synchronously detected signals are supplied to the identification section 2 and the clock recovery circuit. The discriminator 2 converts the input signal into a baseband signal C and supplies it to the main discriminator 3 and the splitter 4. The main discriminator 3 discriminates the baseband signal C at a predetermined level and outputs it as a detection signal d. The discriminator 4 identifies the baseband signal C at a different discrimination level from the main discriminator 3 and outputs it as a detection signal e.

The comparator 5 receives the input detection signal d from the main and sub discriminator 3.4.
, e are compared, and when the detection signals d and e are different, a pulse f is generated. When the pulse f is output, the identification unit 2 outputs an error pulse k to the switch circuit 10 and also sends a phase information signal g identified by phase information to the APC detection circuit 6.

The APC detection circuit 6 receives the phase information signal g and supplies the APC signal to the vcos and the carrier wave asynchronization detection circuit 7. vcos controls the frequency of the output regenerated carrier wave i to match the frequency and phase of the carrier wave of the input signal a of the phase detector 1.The clock regeneration circuit 9 controls the tarock signal generated by the signal from the phase detector 1. j is supplied to the identification section 2 and the switch circuit 10. Carrier wave asynchronous detection circuit 7
is a signal when the carrier wave of the input signal a and the reproduced carrier wave i are in a synchronous state or asynchronous state due to the APC signal. is detected, and when it is determined that the signal is in a synchronous state, the switch circuit 10 is caused to select the error pulse K from the identification section 2 by the signal, and when it is determined that the signal is in an asynchronous state, the switch circuit 10 is caused to select the error pulse K from the identification section 2. The signal j@- is selected and output as an error pulse M.

In this way, even if the synchronous detection of the phase detector 1 is unstable and the outputs of the main and sub discriminators 3 and 4 are uncertain, and no error pulse K is generated, the clock pulse j from the clock generation circuit 9 is generated as an error. It can be output as a pulse M.

〔Effect of the invention〕

As explained above, the present invention provides a first pulse when the propagation path of radio waves is degraded due to fading or the like, and the receiving state of the input signal is disrupted, and the carrier wave of the input signal and the regenerated carrier wave are out of synchronization, and the first pulse is not output. By outputting the second pulse as an error pulse, there is an effect that malfunctions of the line quality monitoring system, line switching, etc. can be prevented.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional demodulator. 1... Phase detector, 2... Discriminator, 3, 4... Main and sub discriminator, 5... Comparator, 6... APC detection circuit, 7... Carrier wave asynchronous detection Circuit, 8...VCO1
9... Clock regeneration circuit, 10... Switch circuit.

Claims (1)

[Claims] n-value PSK or QAM modulated input signal to VC
means for synchronously detecting a baseband signal using a regenerated carrier wave from O; means for outputting a first pulse indicating a malfunction when the level of the baseband signal deviates from a reference value; means for generating an alternative second pulse; and means for outputting the first pulse when the carrier wave of the input signal and the regenerated carrier wave are synchronized, and outputting the second pulse when the carrier wave of the input signal is asynchronous. A demodulator comprising: