JPH0327157B2 - - Google Patents

Info

Publication number
JPH0327157B2
JPH0327157B2 JP24714084A JP24714084A JPH0327157B2 JP H0327157 B2 JPH0327157 B2 JP H0327157B2 JP 24714084 A JP24714084 A JP 24714084A JP 24714084 A JP24714084 A JP 24714084A JP H0327157 B2 JPH0327157 B2 JP H0327157B2
Authority
JP
Japan
Prior art keywords
circuit
impedance
signal
output
balanced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP24714084A
Other languages
Japanese (ja)
Other versions
JPS61126893A (en
Inventor
Isamu Ueki
Kazuo Hamasato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP24714084A priority Critical patent/JPS61126893A/en
Publication of JPS61126893A publication Critical patent/JPS61126893A/en
Publication of JPH0327157B2 publication Critical patent/JPH0327157B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/18—Automatic or semi-automatic exchanges with means for reducing interference or noise; with means for reducing effects due to line faults with means for protecting lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q1/00—Details of selecting apparatus or arrangements
    • H04Q1/18—Electrical details
    • H04Q1/30—Signalling arrangements; Manipulation of signalling currents
    • H04Q1/44—Signalling arrangements; Manipulation of signalling currents using alternate current
    • H04Q1/444—Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies
    • H04Q1/45—Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling
    • H04Q1/453—Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling in which m-out-of-n signalling frequencies are transmitted

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Interface Circuits In Exchanges (AREA)

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、電話交換機において2線式加入者回
線に接続される加入者回路に係り、特に電子化す
るのに好適な信号伝達回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a subscriber circuit connected to a two-wire subscriber line in a telephone exchange, and particularly to a signal transmission circuit suitable for computerization.

〔従来技術〕[Prior art]

従来、この種の信号伝達回路として第1図に示
すような回路が考えられている。第1図において
1は加入者端末(電話機)であり、2および3は
2線式加入者回線Lに接続される一対の端子であ
る、4は電話機1より出力される差動信号(平衡
信号)を検出する検出回路であり、5は平衡信号
を不平衡信号に変換する平衡/不平衡変換回路、
6はコンデンサ7と抵抗8で成るインピーダンス
回路で、平衡/不平衡変換回路5の出力信号に含
まれる直流成分を除去する機能を有している。ま
た、9は増幅回路で、インピーダンス回路6の出
力を反転入力端子に加えかつ非反転入力端子が接
地されている演算増幅器10と、出力端子11
と、該出力端子11と演算増幅器10の反転入力
端子との間に接続されたインピーダンス素子12
と、電源端子13及び14とで構成されている。
この種の信号伝達回路は、電話機から出力された
信号(平衡信号)を不平衡信号に変換して、他の
装置に任意の利得を有して信号を送出することが
できる。
Conventionally, a circuit as shown in FIG. 1 has been considered as this type of signal transmission circuit. In FIG. 1, 1 is a subscriber terminal (telephone), 2 and 3 are a pair of terminals connected to the two-wire subscriber line L, and 4 is a differential signal (balanced signal) output from the telephone 1. ); 5 is a balanced/unbalanced conversion circuit that converts a balanced signal into an unbalanced signal;
Reference numeral 6 denotes an impedance circuit consisting of a capacitor 7 and a resistor 8, which has the function of removing a DC component contained in the output signal of the balanced/unbalanced conversion circuit 5. Further, 9 is an amplifier circuit, which includes an operational amplifier 10 whose inverting input terminal receives the output of the impedance circuit 6 and whose non-inverting input terminal is grounded, and an output terminal 11.
and an impedance element 12 connected between the output terminal 11 and the inverting input terminal of the operational amplifier 10.
and power supply terminals 13 and 14.
This type of signal transmission circuit converts a signal (balanced signal) output from a telephone into an unbalanced signal, and can send the signal to other devices with an arbitrary gain.

しかしながら、例えば電話機が押しボタン式の
場合、ボタンを押すと多周波信号が出力されて直
流抵抗が変化することがあり、この抵抗変化によ
り電話機に流れる直流電流も変化し、加入者回線
Lに発生する差動信号(平衡信号)は第2図aの
ような波形となる。抵抗変化によつて発生する信
号は多周波信号に比べ大きな電圧変化であるた
め、第1図の回路構成では演算増幅器10の電源
電圧が低い場合には、演算増幅器10のダイナミ
ツクレンジが不足して多周波信号の瞬断が発生す
るという点がある。(第2図bの波形) この瞬断時間tは、インピーダンス回路6のイ
ンピーダンスとインピーダンス素子12のインピ
ーダンスと演算増幅器10のダイナミツクレンジ
とによつて決まる。通常、インピーダンス回路6
のインピーダンスとインピーダンス素子12のイ
ンピーダンスは大きく、すなわちコンデンサ7に
蓄積された電荷の放電時定数が大きく、しかも演
算増幅器10の電源電圧が低い(±5V)ため、
瞬断時間tは長くなる。
However, for example, if the telephone is a push-button type, when the button is pressed, a multi-frequency signal may be output and the DC resistance may change, and this change in resistance causes the DC current flowing through the telephone to also change, which is generated in the subscriber line L. The differential signal (balanced signal) thus generated has a waveform as shown in FIG. 2a. Since a signal generated by a resistance change has a large voltage change compared to a multi-frequency signal, in the circuit configuration shown in FIG. 1, when the power supply voltage of the operational amplifier 10 is low, the dynamic range of the operational amplifier 10 is insufficient. There is a point that momentary interruptions of multi-frequency signals occur. (Waveform in FIG. 2b) This instantaneous interruption time t is determined by the impedance of the impedance circuit 6, the impedance of the impedance element 12, and the dynamic range of the operational amplifier 10. Normally, impedance circuit 6
The impedance of the impedance and the impedance of the impedance element 12 are large, that is, the discharge time constant of the charge accumulated in the capacitor 7 is large, and the power supply voltage of the operational amplifier 10 is low (±5V).
The instantaneous interruption time t becomes longer.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上述の欠点を除去し、電話交
換器の加入者回路として良好な特性を有しかつ簡
単な回路構成で、IC化、LSI化を実現出来る信号
伝達回路を提供することにある。
An object of the present invention is to eliminate the above-mentioned drawbacks, to provide a signal transmission circuit that has good characteristics as a subscriber circuit of a telephone exchange, has a simple circuit configuration, and can be implemented as an IC or LSI. be.

〔発明の構成〕[Structure of the invention]

本発明の信号伝達回路は、 加入者端末に接続された2線式加入者回線に発
生する平衡信号を検出する検出回路と、 該検出回路の出力を平衝信号に変換する平衡/
不平衡変換回路と、 該平衡/不平衡変換回路に接続されたコンデン
サを直列素子として含むインピーダンス回路と、 該インピーダンス回路からの出力を一方の入力
端子に加え、基準電位を他方の入力端子に加える
増幅器と、 前記コンデンサの出力側から前記増幅器の入力
端子までの間の任意の点と前記基準電位との間に
設けられ、前記任意の点の最大交流信号電圧以上
のクランプ電圧を有するクランプ素子とを備えた
ことを特徴とする。
The signal transmission circuit of the present invention includes a detection circuit that detects a balanced signal generated in a two-wire subscriber line connected to a subscriber terminal, and a balanced/balanced signal that converts the output of the detection circuit into a balanced signal.
an unbalanced conversion circuit; an impedance circuit including a capacitor connected to the balanced/unbalanced conversion circuit as a series element; an output from the impedance circuit is applied to one input terminal, and a reference potential is applied to the other input terminal. an amplifier; and a clamp element provided between an arbitrary point between the output side of the capacitor and the input terminal of the amplifier and the reference potential, and having a clamp voltage equal to or higher than a maximum AC signal voltage at the arbitrary point. It is characterized by having the following.

〔実施例〕〔Example〕

以下、本発明の実施例を図面を参照して説明す
る。範囲は本発明の一実施例を示す回路図であ
る。なお、第1図に示した符号と同一符号の部材
は機能を有するものであり、その説明は省略す
る。従来の構成と異なる点は、クランプ回路15
を付加したことである。クランプ回路15は、逆
並列接続された2つのダイオード16及び17か
ら成り、インピーダンス回路6と増幅回路9との
間に一方を接地して並列に介設されている。
Embodiments of the present invention will be described below with reference to the drawings. The range is a circuit diagram showing one embodiment of the present invention. Note that the members having the same reference numerals as those shown in FIG. 1 have functions, and their explanations will be omitted. The difference from the conventional configuration is that the clamp circuit 15
This is the addition of . The clamp circuit 15 consists of two diodes 16 and 17 connected in antiparallel, and is interposed in parallel between the impedance circuit 6 and the amplifier circuit 9 with one side grounded.

本実施例による回路構成によれば、第2図aに
示すような信号が加入者回線Lに発生した場合で
も、演算増幅器10の反転入力端子がクランプ回
路15の底インピーダンスによりほぼグランド電
位に保たれており、さらにコンデンサ7に充電さ
れた電荷がクランプ回路15のダイオード16,
17を通して放電されるために、多周波信号の瞬
断時間を短縮することができる。これは、ダイオ
ードのインピーダンスが極めて小さいため、放電
時定数が小さくなるからである。
According to the circuit configuration according to this embodiment, even if a signal as shown in FIG. Furthermore, the electric charge charged in the capacitor 7 is transferred to the diode 16 of the clamp circuit 15,
17, the instantaneous interruption time of the multi-frequency signal can be shortened. This is because the impedance of the diode is extremely small, so the discharge time constant is small.

すなわち、インピーダンス回路6の入力と、演
算増幅器10の基準電位(+側端子)との間の電
圧をVINとすると、演算増幅器10の出力電圧VO
は、 VO=VIN・Z/Zi 但し、 Zi:インピーダンス回路6のインピーダンス、 Z:インピーダンス素子12のインピーダンス、
となる。
That is, if the voltage between the input of the impedance circuit 6 and the reference potential (+ side terminal) of the operational amplifier 10 is V IN , then the output voltage of the operational amplifier 10 is V O
is, V O =V IN・Z/Z i , where Z i : impedance of impedance circuit 6, Z: impedance of impedance element 12,
becomes.

上式から計算されるVOが演算増幅器10の電
源電圧以上となるとこの増幅器10の出力は飽和
し、増幅器10の+、−端子間の電位差は零では
なくなる。したがつてインピーダンス回路6のコ
ンデンサ7の放電時定数は、インピーダンスZiと
Zで決まる。
When V O calculated from the above equation exceeds the power supply voltage of the operational amplifier 10, the output of the amplifier 10 is saturated, and the potential difference between the + and - terminals of the amplifier 10 is no longer zero. Therefore, the discharge time constant of the capacitor 7 of the impedance circuit 6 is determined by the impedances Z i and Z.

通常、Zのインピーダンスは大きいため放電時
間は大きくなり、演算増幅器10の出力が飽和か
ら正常状態となるまでの時間は長くなる。第3図
のようにクランプ回路15があると演算増幅器1
0の出力が飽和し、この増幅器10の+、−端子
間の電位差はクランプ回路15で制限される。し
たがつてインピーダンス回路6のコンデンサ7の
放電時定数はZiとクランプ回路15のインピーダ
ンスとで決まる。このクランプ回路15のインピ
ーダンスは素子12のインピーダンスZより小さ
いため放電時間は短かくなり演算増幅器10の出
力が飽和から正常状態となるまでの時間は短くな
る。
Normally, since the impedance of Z is large, the discharge time is long, and the time it takes for the output of the operational amplifier 10 to go from saturation to a normal state becomes long. If there is a clamp circuit 15 as shown in FIG.
0 saturates, and the potential difference between the + and - terminals of this amplifier 10 is limited by the clamp circuit 15. Therefore, the discharge time constant of the capacitor 7 of the impedance circuit 6 is determined by Z i and the impedance of the clamp circuit 15. Since the impedance of the clamp circuit 15 is smaller than the impedance Z of the element 12, the discharge time is shortened, and the time it takes for the output of the operational amplifier 10 to go from saturation to the normal state is shortened.

本実施例ではクランプ素子としてダイオードの
逆並列接続回路を用いた列を示したが、電界効果
トランジスタを用いたクランプ回路や、ダイオー
ドと電圧源を組合せたクランプ回路等、公知のク
ランプ回路の適用も可能であり、クランプ素子の
構成にかかわらず本発明に適用できることはいう
までもない。
In this example, a column using an anti-parallel connection circuit of diodes is shown as a clamp element, but known clamp circuits such as a clamp circuit using a field effect transistor or a clamp circuit combining a diode and a voltage source can also be applied. It goes without saying that this is possible and can be applied to the present invention regardless of the configuration of the clamp element.

なお、クランプ回路の電圧降下(本実施例では
約0.75V)はクランプ回路接続点の最大交流信号
レベル以上あれば良い。本実施例では演算増幅器
の反転入力端子にクランプ回路を接続しており、
0.75Vあれば十分である。さらに、クランプ回路
の接続位置は増幅器の入力点に限らず、インピー
ダンス回路6に直列素子として含まれるコンデン
サ7の増幅器側から増幅器の入力点までの任意の
位置でも同様の効果が得られる。
Note that the voltage drop in the clamp circuit (approximately 0.75 V in this embodiment) needs only to be equal to or higher than the maximum AC signal level at the connection point of the clamp circuit. In this example, a clamp circuit is connected to the inverting input terminal of the operational amplifier.
0.75V is sufficient. Furthermore, the connection position of the clamp circuit is not limited to the input point of the amplifier, but the same effect can be obtained at any position from the amplifier side of the capacitor 7 included as a series element in the impedance circuit 6 to the input point of the amplifier.

〔発明の効果〕〔Effect of the invention〕

本発明は以上説明したように、クランプ素子を
付加することにより信号の瞬断時間を短縮し、電
話交換器の加入者回路として良好な特性を有し、
かつIC化、LSI化を実現可能とする効果がある。
As explained above, the present invention reduces the instantaneous signal interruption time by adding a clamp element, and has good characteristics as a subscriber circuit of a telephone exchange.
It also has the effect of making IC and LSI implementation possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の信号伝達回路を示す回路図、第
2図a,bは第1図に示す回路の入出力波形を示
す概略図、第3図は本発明の一実施例を示す回路
図である。 1……加入者端末(電話機)、4……検出回路、
5……平衡/不平衡変換回路、6……インピーダ
ンス回路、7……コンデンサ、8……抵抗、9…
…増幅回路、10……演算増幅器、15……クラ
ンプ回路、16,17……ダイオード、L……2
線式加入者回線。
FIG. 1 is a circuit diagram showing a conventional signal transmission circuit, FIGS. 2a and b are schematic diagrams showing input and output waveforms of the circuit shown in FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of the present invention. It is. 1...Subscriber terminal (telephone), 4...Detection circuit,
5... Balanced/unbalanced conversion circuit, 6... Impedance circuit, 7... Capacitor, 8... Resistor, 9...
...Amplification circuit, 10...Operation amplifier, 15...Clamp circuit, 16, 17...Diode, L...2
Wired subscriber line.

Claims (1)

【特許請求の範囲】 1 加入者端末に接続された2線式加入者回線に
発生する平衡信号を検出する検出回路と、 該検出回路の出力を不平衡衝信号に変換する平
衡/不平衡変換回路と、 該平衡/不平衡変換回路に接続されたコンデン
サを直列素子として含むインピーダンス回路と、 該インピーダンス回路からの出力を一方の入力
端子に加え、基準電位を他方の入力端子に加える
増幅器と、 前記コンデンサの出力側から前記増幅器の入力
端子までの間の任意の点と前記基準電位との間に
設けられ、前記任意の点の最大交流信号電圧以上
のクランプ電圧を有するクランプ素子とを備えた
ことを特徴とする信号伝達回路。
[Claims] 1. A detection circuit that detects a balanced signal generated in a two-wire subscriber line connected to a subscriber terminal, and a balanced/unbalanced conversion that converts the output of the detection circuit into an unbalanced signal. an impedance circuit including a capacitor connected to the balanced/unbalanced conversion circuit as a series element; an amplifier that applies an output from the impedance circuit to one input terminal and a reference potential to the other input terminal; a clamp element that is provided between an arbitrary point between the output side of the capacitor and the input terminal of the amplifier and the reference potential, and has a clamp voltage that is greater than or equal to the maximum AC signal voltage at the arbitrary point. A signal transmission circuit characterized by:
JP24714084A 1984-11-22 1984-11-22 Signal transmission circuit Granted JPS61126893A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24714084A JPS61126893A (en) 1984-11-22 1984-11-22 Signal transmission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24714084A JPS61126893A (en) 1984-11-22 1984-11-22 Signal transmission circuit

Publications (2)

Publication Number Publication Date
JPS61126893A JPS61126893A (en) 1986-06-14
JPH0327157B2 true JPH0327157B2 (en) 1991-04-15

Family

ID=17159023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24714084A Granted JPS61126893A (en) 1984-11-22 1984-11-22 Signal transmission circuit

Country Status (1)

Country Link
JP (1) JPS61126893A (en)

Also Published As

Publication number Publication date
JPS61126893A (en) 1986-06-14

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