JPH03280180A - Ic card - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an IC card, and particularly to an IC card that has a built-in rewritable semiconductor memory, is connected to a predetermined host device, and performs data input/output to the semiconductor memory. It is something.

[Prior Art] Conventionally, IC cards have been used as external storage devices instead of magnetic disks in word processors, personal computers, and various small electronic devices.

In this type of IC card, the protection of the stored contents is often taken into account for the entire card in the same way as with magnetic disks, but there is a unified specification for the protection mechanism for each data file in the IC card. is not determined,
In many cases, control is left to the host device side. Also, for IC cards using semiconductor memory elements, it has been proposed that each element is protected by providing an external switch.

[Problem to be Solved by the Invention] In the conventional configuration, if the entire IC card is write-protected, in the case of an IC card that has a large capacity and can store a large number of files, for example, even if one file is erased, the write-protected state must be applied one by one. have to change,
Data management is troublesome.

On the other hand, it is dangerous to rely solely on software control of the host device to protect important files. This is because data may be lost due to software malfunction or user error.

By the way, with conventional storage media such as magnetic disks, even when deleting a file, it is not efficient to initialize all the data; in reality, only the file management information is rewritten, so data blocks are stored on the disk. Immediately after erasing the data, it is often possible to recover the data by using appropriate software.

However, since data can be accessed at high speed with an IC card, all data may be erased, and even if data blocks remain, as with magnetic disks, there is a possibility that the stored contents will be completely lost. This is because there are specifications for backing up only the area where valid data is stored using a battery or the like.

Furthermore, in the conventional protection for each element using an external switch, etc., there is a drawback that a switch is required for each element, and it is difficult to perform fine control.

An object of the present invention is to solve the above-mentioned problems in data management of IC cards.

[Means for Solving the Problems] In order to solve the above problems, the present invention provides an IC that incorporates a rewritable semiconductor memory, is connected to a predetermined host device, and performs data input/output to the semiconductor memory. In the card, a configuration is adopted in which a control means is provided for permitting or prohibiting data access to the storage area of the semiconductor memory for each data block area of a predetermined size.

[Operation] According to the above configuration, data access to the semiconductor memory in the IC card can be managed for each data block area of any size independent of the size of the semiconductor memory element.

[Example] Hereinafter, the present invention will be described in detail based on the example shown in the drawings.

FIG. 1 shows the structure of an IC card adopting the present invention. In FIG. 1, reference numeral 102 is a memory block consisting of a RAM or the like, which is used to store data files. The memory block 102 consists of a plurality of blocks that are each managed separately.

Further, the internal CPU ], 05 is a CPU comprised of a microcomputer or the like, which manages data input/output to and from the memory block 102 by controlling data transfer with the host device, and also performs memory management to be described later.

The memory block 102 is connected to a data buffer 106 via an internal data bus II5, and the data buffer 106 is connected to a host device such as a personal computer via a bus 114.

Data input/output control with the host is performed via an access request signal 107 and a host side R/W signal 110. When the host device wants to output data to the memory block 102, it activates the access request signal 107 and also specifies the input/output direction of the data using the host side R/W signal 110. These signals are recognized by internal CPU 105.

For example, when writing to the memory block 102, the internal CPU 105 responds to the access request signal 107 and the host-side R/W signal 110 to write internal R/W signals 111. The memory block 102 is accessed using the memory access signal 112, and the data transferred to the data buffer 106 is transferred to the internal data bus 115.
The data is written to the designated address of the memory block 102 via the .

In the case of reading, the host side R/W signal 110, internal R/W
The same processing as above is performed only that the status of signal 1]1 is different or the input/output direction of data on the bus is reversed.

Whether data input or data output to the memory block 102 is permitted in response to a request from the host is stored in the data block management information table 103 and the file management information table 104, and is stored in the data block management information table 103 and the file management information table 104.
109, the internal CPU 1
05 controls. Prohibition and permission of actual human output are internal C
The PU 105 opens and closes the data buffer 106 by controlling the data bus enable signal 113.

Here, the management information of the memory block 102 will be explained with reference to FIG.

The memory block 102 is divided into small blocks of a certain size (for example, blocks of 512 bytes, lk bytes, etc.), and each block has management information.

For example, as shown in FIG.
has blocks 1 to 16 (column 301), and files 1.2.3.5 are stored using these blocks, respectively.

Here, among the file numbers (column 302) assigned to each data block, the code connected with a hyphen (for example, "2" in files 1-2) indicates the number of the data block constituting the file. ing.

These data blocks 1 to 16 are accessed randomly or sequentially as in the case of magnetic disks.

In this embodiment, access permission/prohibition is controlled individually for each data block 1 to 16. For this purpose, a data block management information table 103 configured as shown in FIG. 4 corresponding to each block is used. For example, column 40
As shown in 2, data block 2 is permitted to be written (W) and read (R), but data block 4 is permitted only to be read (R). These pieces of information are recorded by turning on/off bits in a predetermined data field of the data block management information table 103 corresponding to column 402 in FIG. 4.

Further, the data block management information table 103 stores information about which file is stored in the block (columns 403 and 404). If a file is recorded in that block, the column 404 records the next block number in which the continuation of that file is recorded.

FIG. 5 shows the structure of a file management information (allocation) table 104 that associates file numbers with blocks of the memory block 102. As shown,
For each file number (column 501), in this table, the first block number of the file is recorded as shown in column 502.

By using tables such as those shown in FIGS. 3 to 5, file access is performed as follows.

For example, it can be seen from table 104 in FIG. 5 that the first block of file 1 is block 4. It can be seen from the table 103 in FIG. 4 that the continuation of the file to be accessed following this block is block 5.

Furthermore, the subsequent block is block 7 in the same way, but this block is the last block, and in this case, "-1" is written in column 404 to indicate that it is the last block. ing.

As described above, files on the memory block 102 can be accessed, and when reading or writing them, the column 40
The attribute tank No. 2 is referred to.

Next, the operation of the above configuration will be explained with reference to FIG. 2. FIG. 2 shows the flow of the access control program (here, file writing) for the memory block 102 of the internal CPU 105 shown in FIG.

In step Sl in FIG. 2, an access request signal 107 is input from the host device, requesting writing to a predetermined file. At step s2, at the same time, the host side R
/W signal 119 is input to internal CPU 05 and data buffer 106.

In step S3, the internal CPTJ 105 searches the file management information table 104 in FIG. 5 and extracts the file management information (108 in FIG. 1).

In step S4, from the given file management information,
The data block management information table 103 is searched and the data block management information [109 in FIG. 1: column 402 in FIG.
information).

In step S5, the attribute information (109 in FIG. 1) of the data block management information 109 is referred to, and in step S6 it is checked whether writing (W) is possible.

If writing (W) is possible, the process advances to step S7, where the internal R/W signal 111 for the memory block 102 is set to write mode and the memory access signal 112 is activated, thereby writing to a predetermined block of the memory block 102. Creates a writable state.

In step S8, the data bus enable signal 113 is input to the data buffer 106, the data on the host side data bus 114 is input to the memory block 102 via the data buffer 106 and the internal data bus 115, and writing is executed.

On the other hand, if writing (W) is not possible in step S6, the process proceeds to step S9, where the internal R/W signal 111 and the memory access signal 112 are made inactive, and in step S]O, the data in the data buffer 106 is The bus enable signal 113 is not input, thereby inhibiting writing to the memory block 102.

As described above, in the IC card, memory blocks can be managed for each block of a predetermined size, and writing and reading can be permitted or prohibited.

Although Figure 2 shows an example of file writing, similar control is also possible for reading. You can allow or prohibit access to data files.

In addition, in the above description, R is applied to the memory block 102 by intelligent control using the internal CPU 105.
/W is controlled, but since access control to the memory element can be easily achieved by controlling only the R/W signal, similar effects can be expected by simpler and cheaper methods such as using logic gates.

U Effects of the Invention] As is clear from the above, according to the present invention, a rewritable semiconductor memory is built in, connected to a predetermined host device,
The IC card for outputting data to the semiconductor memory is provided with a control means for permitting or prohibiting data access to the storage area of the semiconductor memory for each data block area of an arbitrary size independent of the size of the semiconductor memory element. structure, data access to semiconductor memory can be managed for each data block area of a predetermined size, and even if there is a runaway software or an erroneous operation due to user misunderstanding,
It is possible to provide an excellent IC card that can reliably guarantee the data itself in the IC card or its m-density.

In addition, the IC card does not require any mechanical mechanism such as a special protection switch, and it can be used with arbitrary boundaries and sizes, regardless of the number or unit of elements, no matter what kind of memory elements the IC card is internally configured with. Since the range of protection can be determined, the degree of freedom in configuring an IC card that requires a protection mechanism is greatly improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the structure of a control system of an IC card employing the present invention, and FIG. 2 is a flowchart showing a control procedure of the internal CPU of FIG. Fig. 3 is an explanatory diagram showing the contents of the memory block in Fig. 1, Fig. 4 is an explanatory diagram showing the contents of the data block management information table in Fig. 1, and Fig. 5 is an explanatory diagram showing the contents of the data block management information table in Fig. 1. FIG. 2 is an explanatory diagram showing the contents of a table. 101--IC card 102--Memory block 103 that does not depend on the semiconductor memory element unit--Data block management information table 104-
m-File management information table 105--Internal CPU 106--Data buffer 107--Access request signal 108--File management information 109--Data probe management information 110--Host side R/ W signal 111--Internal R/W signal 112--Memory access signal 113--Data bus enable signal 114--Host side data bus 115...Internal data path

Claims (1)

[Claims] 1) In an IC card that has a built-in rewritable semiconductor memory, is connected to a predetermined host device, and performs data input/output to the semiconductor memory, data access to the storage area of the semiconductor memory does not depend on each semiconductor memory element. An IC card characterized by being provided with electrical control means for permitting or prohibiting each data block area in an arbitrary range.