JPH0330331B2 - - Google Patents

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Publication number
JPH0330331B2
JPH0330331B2 JP1903586A JP1903586A JPH0330331B2 JP H0330331 B2 JPH0330331 B2 JP H0330331B2 JP 1903586 A JP1903586 A JP 1903586A JP 1903586 A JP1903586 A JP 1903586A JP H0330331 B2 JPH0330331 B2 JP H0330331B2
Authority
JP
Japan
Prior art keywords
data
receiver
frequency
output
correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1903586A
Other languages
Japanese (ja)
Other versions
JPS62176335A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1903586A priority Critical patent/JPS62176335A/en
Publication of JPS62176335A publication Critical patent/JPS62176335A/en
Publication of JPH0330331B2 publication Critical patent/JPH0330331B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は受信機の信号強度を指示する信号強度
指示装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a signal strength indicating device for indicating the signal strength of a receiver.

(従来の技術) 無線受信用受信機には、受信信号の強度を知る
為に信号強度指示器を備えている。第3図に従来
から行われてきた受信機の構成例を示す。1はア
ンテナ、2は高周波増幅回路、3はミクサ回路、
は中間周波増幅回路、5は音声検波回路、6は
AGC検波回路、7は受信周波数設定器、8は局
部発振回路、9は指示器で、指針式のメータ以外
に発光式の表示器等がある。第3図のように従来
の受信機では、AGC検波回路6の出力電圧を受
信機のそのまゝの特性で指示器9に与えていた。
(Prior Art) A radio receiver is equipped with a signal strength indicator to determine the strength of a received signal. FIG. 3 shows an example of the configuration of a conventional receiver. 1 is an antenna, 2 is a high frequency amplifier circuit, 3 is a mixer circuit,
is an intermediate frequency amplification circuit, 5 is an audio detection circuit, and 6 is an intermediate frequency amplification circuit.
An AGC detection circuit, 7 a reception frequency setter, 8 a local oscillation circuit, and 9 an indicator, which includes a light-emitting indicator in addition to a pointer-type meter. As shown in FIG. 3, in the conventional receiver, the output voltage of the AGC detection circuit 6 is applied to the indicator 9 with the same characteristics of the receiver.

(発明が解決しようとする問題点) しかし、AGC検波回路6の出力には、受信機
を構成する素子の特性(周波数特性、増幅率等に
よる影響が含まれている。たとえば、信号強度が
一定でも受信する周波数により指示値が異なる欠
点がある。また、指示器の目盛が均等でない為
に、読み取りにくい等の欠点ぱあつた。このよう
なことから従来の指示器は簡単な目安として利用
されるにすぎなかつた。
(Problem to be solved by the invention) However, the output of the AGC detection circuit 6 includes the effects of the characteristics (frequency characteristics, amplification factor, etc.) of the elements that make up the receiver. For example, the signal strength is constant. However, the disadvantage is that the indicated value varies depending on the receiving frequency.Also, the scale of the indicator is not uniform, making it difficult to read.For these reasons, conventional indicators are used as a simple guide. It was nothing more than a simple thing.

(問題点を解決するための手段) 本発明はこれらの欠点を解決するため、受信機
を構成する素子の特性の違いによるAGC検波出
力電圧の違いを、周波数特性と入出力特性につい
て受信機毎に予め測定して、結果を周波数特性デ
ータメモリと入出力特性データメモリに書き込ん
でおき、また指示器の目盛の不均等を補正する補
正値や対数(デジベル)指示を行わせる補正値等
を目盛補正データメモリに書き込んでおいて、
AGC検波回路の出力電圧を補正し、指示器に指
示するようにしたものである。第1図は本発明の
要部の構成を示すブロツク図である。6,7,9
は従来例の第3図の同一符号と同一または相当す
る部分を示し、10は指示モード設定器、11は
A/D変換回路、12は周波数特性データメモ
リ、13は入出力特性データメモリ、14は周波
数データ選択回路、15は周波数特性補正回路、
16は入出力データ選択回路、17は目盛の補正
データ選択回路、18は電圧補正回路、19は指
示電圧処理回路、20は目盛補正データメモリで
ある。
(Means for Solving the Problems) In order to solve these drawbacks, the present invention calculates the difference in the AGC detection output voltage due to the difference in the characteristics of the elements constituting the receiver by analyzing the frequency characteristics and input/output characteristics of each receiver. Measure in advance and write the results to the frequency characteristic data memory and input/output characteristic data memory, and also set the correction value to correct the unevenness of the scale of the indicator, the correction value to perform logarithmic (decibel) indication, etc. to the scale. Write it to the correction data memory,
This corrects the output voltage of the AGC detection circuit and sends an indication to the indicator. FIG. 1 is a block diagram showing the configuration of essential parts of the present invention. 6,7,9
1 indicates the same or corresponding parts as the same reference numerals in FIG. 3 of the conventional example, 10 is an instruction mode setter, 11 is an A/D conversion circuit, 12 is a frequency characteristic data memory, 13 is an input/output characteristic data memory, 14 15 is a frequency data selection circuit, 15 is a frequency characteristic correction circuit,
16 is an input/output data selection circuit, 17 is a scale correction data selection circuit, 18 is a voltage correction circuit, 19 is a command voltage processing circuit, and 20 is a scale correction data memory.

(実施例) 第2図は第1図のブロツク図を用いた場合の本
発明の一実施例のブロツク図を示す。図において
6,7,9,10,11,12,13,20は第
1図および第3図の同一符号と同一または相当す
る部分を示し、21はプログラムメモリ、22は
マイクロコンピユータである。ただしマイクロコ
ンピユータ22の入出力インターフエイス等の周
辺デバイスは省略して、メモリのデータライン、
アドレスライン等を簡略して図示してある。
(Embodiment) FIG. 2 shows a block diagram of an embodiment of the present invention when the block diagram of FIG. 1 is used. In the figure, 6, 7, 9, 10, 11, 12, 13, and 20 indicate the same or corresponding parts as the same reference numerals in FIGS. 1 and 3, 21 is a program memory, and 22 is a microcomputer. However, peripheral devices such as the input/output interface of the microcomputer 22 are omitted, and the data line of the memory,
Address lines and the like are shown in a simplified manner.

(作用) 第1図において、AGC検波回路6の出力電圧
をA/D変換器11によつてデジタル値に変換す
る。周波数データ選択回路14において、受信周
波数設定器7からの情報で周波数特性データメモ
リ12から該当データを読み出し、周波数特性補
正回路15において、A/D変換回路11からの
デジタル出力電圧(以下指示電圧と称する)を補
正し、受信周波数による信号強度指示値の違いを
無くする。次に入出力データ選択回路16におい
て、周波数特性補正回路15からの周波数特性補
正ずみの指示電圧に対比して、入出力特性データ
メモリ13から該当データを読み出し、さらに補
正データ選択回路17において、指示モード設定
器10からの非補正目盛、直線目盛、対数目盛、
部分拡大目盛等の選択情報で、目盛補正データメ
モリ20から該当データを読み出し、電圧補正回
路18において指示電圧を補正する。指示電圧処
理回路19において、平均値や尖頭値などの時間
当りの指示値の補正を行う。この指示モードの選
択も指示モード設定器10で行う。指示器で信号
強度を指示させるのであるが、指示器が指針式の
メータである場合には当然D/A変換回路が必要
であり、必然的なものとして指示器9に含め、特
に図示していない。
(Function) In FIG. 1, the output voltage of the AGC detection circuit 6 is converted into a digital value by the A/D converter 11. The frequency data selection circuit 14 reads the corresponding data from the frequency characteristic data memory 12 based on the information from the receiving frequency setter 7, and the frequency characteristic correction circuit 15 reads out the digital output voltage (hereinafter referred to as instruction voltage) from the A/D conversion circuit 11. ) to eliminate differences in signal strength indication values depending on reception frequency. Next, the input/output data selection circuit 16 reads corresponding data from the input/output characteristic data memory 13 in comparison with the frequency characteristic corrected instruction voltage from the frequency characteristic correction circuit 15, and furthermore, the correction data selection circuit 17 reads out the specified data from the input/output characteristic data memory 13. Uncorrected scale, linear scale, logarithmic scale,
Based on selection information such as a partially enlarged scale, the corresponding data is read from the scale correction data memory 20, and the voltage correction circuit 18 corrects the indicated voltage. In the command voltage processing circuit 19, the command values per time, such as average values and peak values, are corrected. Selection of this instruction mode is also performed by the instruction mode setter 10. The signal strength is indicated by the indicator, but if the indicator is a pointer-type meter, a D/A conversion circuit is naturally required, and it is necessarily included in the indicator 9 and is not particularly shown. do not have.

第2図の実施例は、プログラムメモリ21とマ
イクロコンピユータ22とで、第1図の周波数特
性選択回路14、周波数特性補正回路15、入出
力データ選択回路16、補正データ選択回路1
7、電圧補正回路18、指示電圧処理回路19を
構成したものであり、各回路の行う処理手順はプ
ログラムメモリ21にプログラムとして格納され
ていて、前述と同様の作用を果す。
The embodiment shown in FIG. 2 includes a program memory 21 and a microcomputer 22, and includes a frequency characteristic selection circuit 14, a frequency characteristic correction circuit 15, an input/output data selection circuit 16, and a correction data selection circuit 1 shown in FIG.
7. The voltage correction circuit 18 and the command voltage processing circuit 19 are constructed, and the processing procedures performed by each circuit are stored as a program in the program memory 21, and the same functions as described above are achieved.

(発明の効果) 以上説明したように、予め測定してメモリに書
き込んでおいた受信機の周波数特性や入出力特性
のデータをもとに信号強度指示値を補正する手段
を備えることにより、指示値を受信周波数に無関
係な正確なものとすることができ、また直線、対
数、部分拡大等の指示も可能となり、受信機の性
能や機能を向上させる利点ある。
(Effects of the Invention) As explained above, by providing means for correcting the signal strength indication value based on data on the frequency characteristics and input/output characteristics of the receiver that have been measured and written in the memory in advance, the indication The value can be accurate regardless of the receiving frequency, and it is also possible to specify linear, logarithmic, partial expansion, etc., which has the advantage of improving the performance and functionality of the receiver.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の要部の構成を示すブロツク
図、第2図は本発明の一実施例を示すブロツク
図、第3図は従来の受信機の構成例を示すブロツ
ク図である。 6……AGC検波回路、7……受信周波数設定
器、9……指示器、10……指示モード設定器、
11……A/D変換回路、12……周波数特性デ
ータメモリ、13……入出力特性データメモリ、
14……周波数データ選択回路、15……周波数
特性補正回路、16……入出力データ選択回路、
17……補正データ選択回路、18……電圧補正
回路、19……指示電圧処理回路、20……目盛
補正データメモリ、21……プログラムメモリ、
22……マイクロコンピユータ。
FIG. 1 is a block diagram showing the configuration of essential parts of the present invention, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a block diagram showing an example of the configuration of a conventional receiver. 6...AGC detection circuit, 7...Reception frequency setter, 9...Indicator, 10...Indication mode setter,
11... A/D conversion circuit, 12... Frequency characteristic data memory, 13... Input/output characteristic data memory,
14... Frequency data selection circuit, 15... Frequency characteristic correction circuit, 16... Input/output data selection circuit,
17... Correction data selection circuit, 18... Voltage correction circuit, 19... Instruction voltage processing circuit, 20... Scale correction data memory, 21... Program memory,
22...Microcomputer.

Claims (1)

【特許請求の範囲】 1 受信機の信号強度指示装置において、受信機
の周波数特性を予め記憶しておく周波数特性デー
タメモリと、受信機の入出力特性を予め記憶して
おく入出力特性データメモリと、任意の指示モー
ドに信号強度指示器の指示値を補正するデータを
記憶しておく目盛補正データメモリとを備え、受
信周波数情報に従つて前記周波数特性データメモ
リからデータを選択し読出す周波数データ選択手
段と、選択されたデータに基いて受信機のAGC
検波出力電圧を補正する周波数特性補正手段と、
補正された電圧に対比して前記入出力特性データ
メモリからデータを選択し読出す入出力データ選
択手段と、選択された入出力特性データと指示モ
ード設定器からの設定情報とによつて前記目盛補
正データメモリからデータを選択し読出す補正デ
ータ選択手段と、選択された目盛補正データに基
いて前記周波数特性補正手段の出力電圧を補正す
る電圧補正手段とで構成されたことを特徴とする
受信機の信号強度指示装置。 2 信号強度指示器の時間当りの指示値を処理す
る指示電圧処理手段を備えたことを特徴とする特
許請求の範囲の1項に記載の受信機の信号強度指
示装置。
[Claims] 1. A signal strength indicating device for a receiver, which includes a frequency characteristic data memory in which the frequency characteristics of the receiver are stored in advance, and an input/output characteristic data memory in which the input/output characteristics of the receiver are stored in advance. and a scale correction data memory for storing data for correcting the indication value of the signal strength indicator in any indication mode, and a frequency for selecting and reading out data from the frequency characteristic data memory according to received frequency information. data selection means and receiver AGC based on the selected data;
a frequency characteristic correction means for correcting the detection output voltage;
input/output data selection means for selecting and reading out data from the input/output characteristic data memory in comparison with the corrected voltage; A receiver comprising: correction data selection means for selecting and reading data from a correction data memory; and voltage correction means for correcting the output voltage of the frequency characteristic correction means based on the selected scale correction data. Aircraft signal strength indicator. 2. The signal strength indicating device for a receiver according to claim 1, further comprising an indicating voltage processing means for processing the indicated value per time of the signal strength indicator.
JP1903586A 1986-01-30 1986-01-30 Signal intensity indicator for receiver Granted JPS62176335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1903586A JPS62176335A (en) 1986-01-30 1986-01-30 Signal intensity indicator for receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1903586A JPS62176335A (en) 1986-01-30 1986-01-30 Signal intensity indicator for receiver

Publications (2)

Publication Number Publication Date
JPS62176335A JPS62176335A (en) 1987-08-03
JPH0330331B2 true JPH0330331B2 (en) 1991-04-30

Family

ID=11988180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1903586A Granted JPS62176335A (en) 1986-01-30 1986-01-30 Signal intensity indicator for receiver

Country Status (1)

Country Link
JP (1) JPS62176335A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4805287B2 (en) 2008-02-08 2011-11-02 株式会社リコー Wireless communication device

Also Published As

Publication number Publication date
JPS62176335A (en) 1987-08-03

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