JPH033456A - Circuit for detecting ratio of carrier power to noise power - Google Patents
Circuit for detecting ratio of carrier power to noise powerInfo
- Publication number
- JPH033456A JPH033456A JP1135908A JP13590889A JPH033456A JP H033456 A JPH033456 A JP H033456A JP 1135908 A JP1135908 A JP 1135908A JP 13590889 A JP13590889 A JP 13590889A JP H033456 A JPH033456 A JP H033456A
- Authority
- JP
- Japan
- Prior art keywords
- pass filter
- signal
- noise
- power
- noise component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims abstract description 34
- 230000003321 amplification Effects 0.000 claims abstract description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 5
- 239000000284 extract Substances 0.000 claims description 5
- 238000000605 extraction Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000005070 sampling Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000012050 conventional carrier Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、デジタル通信における復調器に人力される受
信信号の搬送波電力対雑音電力比を検出する回路に関し
、特に簡単な構成で精度のよい搬送波電力対雑音電力比
検出が行える搬送波電力対雑音電力比検出回路に関する
。Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a circuit for detecting the carrier power to noise power ratio of a received signal manually inputted to a demodulator in digital communication, and in particular a circuit that has a simple configuration and high accuracy. The present invention relates to a carrier power to noise power ratio detection circuit capable of detecting a carrier power to noise power ratio.
従来のこの種の搬送波電力対雑音電力比検出回路(C/
N検出回路)は、デジタル通信における復調器に入力さ
れる受信信号の搬送波電力対雑音電力比を検出する回路
として知られている。Conventional carrier power to noise power ratio detection circuit (C/
The N detection circuit is known as a circuit that detects the carrier power to noise power ratio of a received signal input to a demodulator in digital communication.
第2図は上述した従来のC/N検出回路を示すブロック
図である。FIG. 2 is a block diagram showing the conventional C/N detection circuit mentioned above.
第2図において、C/N検出回路1と、復調装置2とは
、分配器3の出力端子にそれぞれ接続されており、受信
信号100が分配されて与えられるようになっている。In FIG. 2, a C/N detection circuit 1 and a demodulator 2 are connected to the output terminals of a distributor 3, respectively, so that a received signal 100 is distributed and given to them.
C/N検出回路lは、電圧制御増幅器10と、分配器1
1と、帯域ろ波器12と、検波器13と、帯域ろ波器1
4と、検波器15と、増幅器16とから構成されている
。また、増幅器16は、抵抗R0〜R2と、演算増幅器
OPとから構成されている。The C/N detection circuit 1 includes a voltage control amplifier 10 and a divider 1.
1, bandpass filter 12, detector 13, bandpass filter 1
4, a detector 15, and an amplifier 16. Further, the amplifier 16 includes resistors R0 to R2 and an operational amplifier OP.
このようなC/N検出回路1によれば、分配器3からの
出力信号は、電圧制御増幅器10と、分配器11と、帯
域ろ波器12と、検波器13とからなる自動利得制御器
に入力される。この自動利得制御器では、所望の信号の
電力が一定となるように自動利得制御をかけている。こ
の場合、帯域ろ波器12の帯域は、信号帯域と等しくな
っている。According to such a C/N detection circuit 1, the output signal from the divider 3 is transmitted through an automatic gain controller consisting of a voltage control amplifier 10, a divider 11, a bandpass filter 12, and a wave detector 13. is input. This automatic gain controller performs automatic gain control so that the power of a desired signal is constant. In this case, the band of the bandpass filter 12 is equal to the signal band.
一方、分配器11の他方の出力信号は、帯域ろ波器14
に入力される。帯域ろ波器14は、帯域ろ波器12とは
中心周波数が異なっており、雑音成分のみを抽出する。On the other hand, the other output signal of the divider 11 is passed through the bandpass filter 14.
is input. The bandpass filter 14 has a different center frequency from the bandpass filter 12, and extracts only noise components.
この帯域ろ波器14からの出力信号は、検波器15で検
波される。検波器15で検波されて信号は、増幅1IS
16で所定の増幅度で増幅されることにより、C/N検
出電圧が得られる。つまり、従来は、信号電力を一定に
なるように自動利得制御をかけ、その信号の雑音成分を
検出して、その検出電圧の大小により、C/N検出を行
っていた。The output signal from the bandpass filter 14 is detected by a detector 15. The signal detected by the detector 15 is amplified 1IS
A C/N detection voltage is obtained by amplifying the signal at a predetermined amplification degree in step 16. That is, conventionally, automatic gain control was applied to keep the signal power constant, noise components of the signal were detected, and C/N detection was performed based on the magnitude of the detected voltage.
〔解決すべき課題〕
上述した従来のC/N検出回路は、電圧制′4B増幅器
10、分配器11、帯域ろ波器12.検波器13からな
る自動利得制御器と、信号成分および雑音成分を抽出す
る帯域ろ波器12.14が必要であり、部品点数がおお
くなり、かつ装置規模が大きくなるという問題点があっ
た。[Problems to be Solved] The conventional C/N detection circuit described above includes a voltage-limited 4B amplifier 10, a divider 11, a bandpass filter 12 . An automatic gain controller consisting of a wave detector 13 and bandpass filters 12 and 14 for extracting signal components and noise components are required, resulting in problems in that the number of parts increases and the scale of the device increases.
本発明は、上記問題点にかんがみてなされたもので、部
品点数を少なくして装置規模も小さくしたC/N検出回
路の提供を目的とする。The present invention has been made in view of the above-mentioned problems, and aims to provide a C/N detection circuit that has a reduced number of parts and a smaller device size.
上記目的を達成するため本発明のC/N検出回路は、デ
ジタル通信における復調器に入力される受信信号の搬送
波電力対雑音電力比を検出する回路において、復調器内
の搬送波抽出ループ内の位相誤差検出信号を取り込み雑
音成分を取り出す高域通過ろ波器と、高域通過ろ波器か
らの雑音成分゛を検波して出力する検波器と、前記検波
器からの出力信号を所定の増幅度で増幅して搬送波電力
対雑音電力比検出信号として出力する増幅回路とから構
成されてことを特徴とするものである。To achieve the above object, the C/N detection circuit of the present invention is a circuit for detecting the carrier power to noise power ratio of a received signal input to a demodulator in digital communication. A high-pass filter that takes in the error detection signal and extracts the noise component; a detector that detects and outputs the noise component from the high-pass filter; and an amplifier circuit that amplifies the carrier wave power to noise power ratio and outputs the signal as a carrier power-to-noise power ratio detection signal.
(実施例〕
以下、本発明の一実施例について図面を参照して詳細に
説明する。(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.
第1図は本発明のC/N検出回路の実施例を示すブロッ
ク図である。FIG. 1 is a block diagram showing an embodiment of the C/N detection circuit of the present invention.
第1図に示す回路において、第2図の装置と同一構成要
素には同一符号を付して説明する。第1図において、C
/N検出回路IAと、復調装置2とが設けられている。In the circuit shown in FIG. 1, the same components as those in the device shown in FIG. 2 will be described with the same reference numerals. In Figure 1, C
/N detection circuit IA and demodulator 2 are provided.
復調装置2は、受信信号100を取り込み、所定のデジ
タル変換して復調信号200として出力できるようにな
っている。すなわち、復調装置2は、電圧制御増幅器2
0と、混合器21.22と、受信低域通過ろ波器23,
24と、アナログ・デジタル変換器25.26と、クロ
ック抽出器27と、位相誤差検出器28と、デジタル・
アナログ変換器29と、ループ低域通過ろ波器30と、
電圧制御発振器31と、位相偏移32と、検波器33と
から構成されている。The demodulator 2 is capable of taking in the received signal 100, performing predetermined digital conversion, and outputting it as a demodulated signal 200. That is, the demodulator 2 has a voltage control amplifier 2
0, mixer 21, 22, receiving low-pass filter 23,
24, analog/digital converters 25, 26, clock extractor 27, phase error detector 28, and digital/digital converters 25, 26, clock extractor 27, phase error detector 28,
an analog converter 29, a loop low-pass filter 30,
It is composed of a voltage controlled oscillator 31, a phase shifter 32, and a wave detector 33.
C/N検出回路IAは、復調装置2内の搬送波抽出ルー
プ内のデジタル・アナログ変換器29からの位相誤差検
出信号を取り込み雑音成分を取り出す高域通過ろ波器1
7と、高域通過ろ波器17からの雑音成分を検波して出
力する検波器15と、検波器15からの出力信号を所定
の増幅度で増幅してC/N検出信号として出力する増幅
回路16から構成されている。The C/N detection circuit IA is a high-pass filter 1 that takes in the phase error detection signal from the digital-to-analog converter 29 in the carrier extraction loop in the demodulator 2 and extracts the noise component.
7, a detector 15 that detects and outputs the noise component from the high-pass filter 17, and an amplifier that amplifies the output signal from the detector 15 at a predetermined amplification degree and outputs it as a C/N detection signal. It is composed of a circuit 16.
上述したように構成した実施例の作用を説明する。The operation of the embodiment configured as described above will be explained.
受信信号100は、復調装置2の電圧制御増幅!!20
に人力される。電圧制fil増幅器20の出力は、混合
器21.22にそれぞれ入力される。混合器21.22
からの出力信号は、受信低域通過ろ波器23,24を介
してアナログ・デジタル変換器−25,26に供給され
る。The received signal 100 is voltage-controlled amplified by the demodulator 2! ! 20
is man-powered. The outputs of the voltage controlled fil amplifiers 20 are input to mixers 21 and 22, respectively. Mixer 21.22
The output signals from are fed to analog-to-digital converters 25, 26 via receiving low-pass filters 23, 24.
一方、受信低域通過ろ波器24の出力信号は、クロック
抽出器27および検波器33に供給される。検波器33
の出力信号は、電圧制御増幅器20のfl[信号となり
、アイパターンのレベルが一定となるように自動利得制
御をかける。On the other hand, the output signal of the receiving low-pass filter 24 is supplied to the clock extractor 27 and the wave detector 33. Detector 33
The output signal becomes the fl[ signal of the voltage control amplifier 20, and automatic gain control is applied so that the level of the eye pattern is constant.
また、クロック抽出器27から抽出されたクロック信号
は、アナログ・デジタル変換器25.26のサンプリン
グクロック信号として使用される。Further, the clock signal extracted from the clock extractor 27 is used as a sampling clock signal of the analog-to-digital converters 25 and 26.
そのサンプリングタイミングは、アイパターンの収束点
で行われる。The sampling timing is performed at the convergence point of the eye pattern.
受信低域通過ろ波H23,24の各出力信号は、復調信
号200として出力されるとともに、搬送波抽出用ルー
プの位相誤差検出器28に供給される0位相誤差検出器
28の出力信号は、デジタル・アナログ変換器29でア
ナログ信号に変換されて、ループ低域通過ろ波H30と
C/N検出回路IAとに供給される。ループ低域通過ろ
波器30に供給された信号は、電圧制御発振器31で入
力電圧に応じた周波数の信号とされて位相偏移32およ
び混合器21.22に供給される。Each output signal of the receiving low-pass filters H23 and H24 is output as a demodulated signal 200, and the output signal of the zero phase error detector 28, which is supplied to the phase error detector 28 of the carrier extraction loop, is a digital signal. - It is converted into an analog signal by the analog converter 29 and supplied to the loop low-pass filter H30 and the C/N detection circuit IA. The signal supplied to the loop low-pass filter 30 is converted into a signal with a frequency according to the input voltage by a voltage controlled oscillator 31, and is supplied to a phase shifter 32 and a mixer 21.22.
ここで、C/N検出回路IAに供給された位相誤差検出
信号は、高域通過ろ波器17に供給されて、位相誤差検
出信号、中から雑音成分だけを抽出する。この雑音成分
は、受信低域通過ろ波!123゜24により、高域が帯
域制限されているので、結果として高域通過ろ波器17
の出力信号は、帯域通過ろ波器の出力と等価となる。こ
の高域通過ろ波H17からの雑音成分の出力信号は、検
波器15により電圧に変換されて、増幅器16に供給さ
れる。増幅器16では、所定の増幅度で増幅されて、所
望のC/N検出信号300が得られることになる。Here, the phase error detection signal supplied to the C/N detection circuit IA is supplied to a high-pass filter 17 to extract only noise components from the phase error detection signal. This noise component is low-pass filtered! Since the high frequency band is limited by 123°24, as a result, the high-pass filter 17
The output signal of is equivalent to the output of a bandpass filter. The noise component output signal from the high-pass filter H17 is converted into a voltage by the detector 15 and supplied to the amplifier 16. The amplifier 16 amplifies the signal at a predetermined amplification degree to obtain a desired C/N detection signal 300.
以上説明したように本発明は、復調装置の搬送波抽出ル
ープ内の位相誤差検出信号から雑音成分だけを抽出し検
波することにより、装W規槙が小さく、精度のよいC/
N検出信号が得られるという効果がある。As explained above, the present invention extracts and detects only the noise component from the phase error detection signal in the carrier extraction loop of the demodulator, thereby achieving a high-precision C//
This has the effect that N detection signals can be obtained.
第1図は本発明の実施例を示すブロック図、第2図は従
来装置を示すブロック図である。
IA・・・C/N検出回路、2・・・復調装置、15・
・・検波器、16・・・増幅器、17・・・高域通過ろ
波器。FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional device. IA... C/N detection circuit, 2... Demodulator, 15.
...Detector, 16...Amplifier, 17...High-pass filter.
Claims (1)
送波電力対雑音電力比を検出する回路において、復調器
内の搬送波抽出ループ内の位相誤差検出信号を取り込み
雑音成分を取り出す高域通過ろ波器と、高域通過ろ波器
からの雑音成分を検波して出力する検波器と、前記検波
器からの出力信号を所定の増幅度で増幅して搬送波電力
対雑音電力比検出信号として出力する増幅回路とから構
成されてことを特徴とする搬送波電力対雑音電力比検出
回路。In a circuit that detects the carrier power to noise power ratio of a received signal input to a demodulator in digital communication, a high-pass filter that takes in a phase error detection signal in a carrier extraction loop in the demodulator and extracts a noise component. , a detector that detects and outputs the noise component from the high-pass filter, and an amplifier circuit that amplifies the output signal from the detector at a predetermined amplification degree and outputs it as a carrier power to noise power ratio detection signal. A carrier power to noise power ratio detection circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1135908A JP2513315B2 (en) | 1989-05-31 | 1989-05-31 | Carrier power to noise power ratio detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1135908A JP2513315B2 (en) | 1989-05-31 | 1989-05-31 | Carrier power to noise power ratio detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH033456A true JPH033456A (en) | 1991-01-09 |
| JP2513315B2 JP2513315B2 (en) | 1996-07-03 |
Family
ID=15162644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1135908A Expired - Lifetime JP2513315B2 (en) | 1989-05-31 | 1989-05-31 | Carrier power to noise power ratio detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2513315B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190013736A (en) * | 2016-05-30 | 2019-02-11 | 닛산 가가쿠 가부시키가이샤 | The polymerizable silane compound |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58187872A (en) * | 1982-04-27 | 1983-11-02 | Nec Corp | Carrier/noise detector |
| JPS59158136A (en) * | 1983-02-28 | 1984-09-07 | Nec Corp | Detector for ratio of carrier to electric noise power |
| JPS64843A (en) * | 1987-06-23 | 1989-01-05 | Nec Corp | C/n measuring circuit |
| JPH01173918A (en) * | 1987-12-28 | 1989-07-10 | Japan Radio Co Ltd | C/n detector |
| JPH02205144A (en) * | 1989-02-03 | 1990-08-15 | Anritsu Corp | C/n measuring circuit in psk demodulator |
-
1989
- 1989-05-31 JP JP1135908A patent/JP2513315B2/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58187872A (en) * | 1982-04-27 | 1983-11-02 | Nec Corp | Carrier/noise detector |
| JPS59158136A (en) * | 1983-02-28 | 1984-09-07 | Nec Corp | Detector for ratio of carrier to electric noise power |
| JPS64843A (en) * | 1987-06-23 | 1989-01-05 | Nec Corp | C/n measuring circuit |
| JPH01173918A (en) * | 1987-12-28 | 1989-07-10 | Japan Radio Co Ltd | C/n detector |
| JPH02205144A (en) * | 1989-02-03 | 1990-08-15 | Anritsu Corp | C/n measuring circuit in psk demodulator |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190013736A (en) * | 2016-05-30 | 2019-02-11 | 닛산 가가쿠 가부시키가이샤 | The polymerizable silane compound |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2513315B2 (en) | 1996-07-03 |
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