JPH0340470A - Insulated-gate field-effect transistor - Google Patents

Abstract

PURPOSE:To improve a field effect transistor of this design in long term reliability by a method wherein a light transmissive conductive film whose main component is prescribed is brought into close contact with a silicon carbide semiconductor layer which forms an N-conductivity type semiconductor that is formed into a source and a drain. CONSTITUTION:In an insulated gate type FET provided with a source and a drain both of N-type conductivity semiconductor, the semiconductor concerned is formed of a two-layered structure composed of a silicon non-single crystal semiconductor layer and a silicon carbide semiconductor SixC1-x layer, where X is so set to satisfy a formula, 0<x<1. When a light transmissive conductive film whose main component is indium oxide is brought into close contact with the silicon carbide semiconductor layer, as silicon carbide has a blocking effect on oxygen, insulator is prevented from being generated at an interface, in result the close contact part is possessed to excellent ohmic resistance and a FET of this design can be enhanced in long-term reliability.

Description

Detailed Description of the Invention This invention has long-term reliability in electrodes on insulated gate field effect semiconductors (hereinafter referred to as FETs) having N (source), I (channel forming region), N (drain) or PIF junctions. It is related to the structure to be used.

Conventionally, in these FETs, it has been known that aluminum is formed on P or N type amorphous silicon by a vacuum evaporation method. However, when such an electrode made of amorphous silicon and aluminum is heat-treated at 10° C. for about 50 hours, the aluminum migrates into the semiconductor (abnormal diffusion), causing electrical deterioration. For this reason, in the PI or Nl junction, this aluminum leads to an extremely deep<PI or Nl junction, deteriorating the junction characteristics.

For this reason, attempts have been made to form an oxide conductive film on a P- or N-type semiconductor, rather than vacuum-depositing such a metal. That is, for P-type amorphous silicon, tin oxide is used as a light-transmitting conductive oxide film (hereinafter referred to as CTO), and for N-type amorphous silicon, CTO containing indium oxide as a main component, that is, ITO (tin oxide 10
Attempts have been made to bring oxidized indium (indium oxide added in an amount of less than % by weight) into close contact with each other. Furthermore, if necessary, this C
A method of forming reflective metals such as aluminum or silver on TO is known.

With a structure like this, even if it is made at 150'C, the
Until 00 hours, deterioration of electrical characteristics could be prevented to within 10%. However, after 500 hours to 2000 hours, for example, in PvC with PIN junction, the initial efficiency was 8.3% (1,05d), but the amount of change was 5% (500 hours) to 25% ( 2000 hours) characteristic deterioration (decrease) occurred.

A detailed study of the cause revealed that a thin layer of silicon oxide was formed at the interface between the amorphous semiconductor in the P or N region and the CTO. In particular, PSG (phosphorus glass) is used for N-type amorphous silicon, and BSG (boron glass) is used for P-type amorphous silicon.
is formed. These glasses ultimately have insulating properties, and this was found to be the cause of the deterioration of characteristics.

Since amorphous silicon is chemically more unstable and more reactive than crystalline semiconductors, it has been found that these deteriorations are unique to amorphous semiconductors.

Furthermore, when a semiconductor having microcrystalline or polycrystalline properties is used instead of amorphous silicon, the amorphous component in the component is approximately 50%.
The reaction between ITO and CTO can be reduced to about 1/2 compared to when only amorphous silicon is used. However, even with this, it still essentially has deterioration characteristics, and a more drastic solution was required.

The present invention aims to prevent the occurrence of such deterioration and provide high reliability.

For this purpose, the present invention provides a semiconductor device having a P-type semiconductor and an N-type semiconductor, in which each of the P-type semiconductor and the N-type semiconductor has a structure in close contact with a transparent conductive film, in which the P-type semiconductor Each of the N-type and N-type semiconductors is composed of two layers: a silicon non-single crystal semiconductor layer and a silicon carbide semiconductor layer represented by Six C+-X (0<X<1), and the carbide constituting the P-type semiconductor is The silicon semiconductor layer is in close contact with an oxide transparent conductive film, and the silicon carbide semiconductor layer constituting the N-type semiconductor is in close contact with a transparent conductive film containing indium oxide as a main component. In other words, the present invention is based on a semiconductor having P or N type conductivity and having greater light transmittance than amorphous silicon, and a light transmitting conductive film having conductivity in close contact with this semiconductor. When bringing the electrodes into close contact with each other to make ohmic contact, in order to prevent the generation of insulators due to reactions at the electrode-semiconductor interface, we use a material that has more translucency than amorphous silicon and the same conductivity type as the semiconductor. S having conductivity type of P or N type
Silicon carbide represented by ix C+-x (0< However, oxygen constituting CTO can be prevented from diffusing into silicon to form PSG and BSG, and a highly reliable semiconductor device can be obtained.

The silicon carbide semiconductor represented by Six C+-x (0 < x < 1) has a sufficient oxygen blocking effect especially when X = 0.95 to 0.8, and its thickness is sufficient to draw tunnel current. A thickness of 100 Å or less (typically estimated to have an average film thickness of 15 to 40) has a sufficient blocking effect. As a result, for example, if a photoelectric conversion device without a PIN connection is held at 150°C,
Even after 0 to 2000 hours, the deterioration is 0 to 2% (10
00 hours) to 0 to 3% (2000 hours), and thermal deterioration could be completely eliminated.

In the present invention, the semiconductor in contact with one layer is a non-single crystal semiconductor, and in particular, a microcrystalline or polycrystalline P or N type silicon semiconductor may be used.

In a PI or NI junction, or when the N-type semiconductor layer is amorphous silicon, its electrical conductivity is 10-7 to 10-' (00 m)-', and its activation energy is also 0.3 to 0. It is large at .4eV.

Therefore, the active state of intrinsic or substantially intrinsic I
In order to have an internal electric field at the junction with the type semiconductor,
Such amorphous silicon is insufficient, and furthermore, when attempting to inject light into an I-type semiconductor by transmitting light through this P- or N-type semiconductor, it is required to further reduce light absorption loss in this semiconductor layer.

Therefore, a microcrystalline or polycrystalline P or N type silicon semiconductor was used. This microcrystalline or polycrystalline P or N type silicon semiconductor has an electrical conductivity of 10-' to 10! (
0 cm)-', and the light absorption coefficient is also, for example, 500.
nm is 1 x 10S (0 cm) -', whereas amorphous silicon is 3 x 10' (0 cm) -', 1/
This can be reduced to 3.

The grain size of such microcrystalline or polycrystalline silicon is 5 to 5, respectively.
200 Å and 200-2000 people.

The present invention will be illustrated below according to the drawings.

[Experiment example]

FIG. 1(A) shows a PVC irradiated with light (10) through a substrate (1) and a transparent insulating substrate (15).

In the drawing, the 10th CTO (2) is placed on the glass substrate (1).
) was formed. In the drawings, these are tin oxide (300 to 2,000), ITO (300 to 1,500), and tin decaoxide (200 to 1,500) to which a halogen element such as fluorine is added.
It has a two-tier structure with 400 people). Furthermore, this CTO (2
) on the P-type Six C1-X (0< x < l
For example, x-0,8) using the plasma vapor phase method (PCVO method)
It was carried out with 5iHa and CH4. At that time, B t
+1 was added in an amount of 0.51 degree % and formed at a temperature of 200''C and an output of 20W.The average thickness thereof was about 100.

Furthermore, ■-type amorphous or semi-amorphous silicon is printed on the top surface.
VD method, photo CVD method, photo plasma vapor phase method or LTC
0.2 to
It was formed to have a thickness of 0.8μ, for example 0.5μ. At this time, it was effective to simultaneously add boron at an average concentration of 10"cm-' or less and to increase the concentration gradient toward the P-type side in order to improve efficiency. Also, this hydrogen and halogen element added Oxygen in the silicon semiconductor is at least 5
IO"cm-3 or less, preferably 5x10 cm-3 or less, to prevent deterioration caused by light irradiation due to oxygen and to prevent a decrease in electrical conductivity due to the presence of silicon oxide insulators.

Next, an N-type non-single crystal semiconductor layer (5) is formed using PHa/5iHa.
= 1%, 5iHn/Hg = 30%, and a thickness of 100 to 300, for example 200, was formed by PCVD at an output of IOW. Then, in this case, N-type silicon (to which 5 to 15 atomic % of hydrogen was added) containing microcrystallinity was formed. Furthermore, PHs/5itla on this top surface
= 1%, C114/ (sio, + C1,)
= 5 to 50%, and Six Ct-x (e.g. x
=0.95-0.8) (21). The thickness of this film was 100 Å or less, for example, 30 people. Furthermore, after this, ITO was formed as a back electrode (19) by a known electron beam evaporation method.

An energy band diagram corresponding to this is shown in FIG. 1 CB).

In such a structure, AMI (100 mW/cffl
) at 1°05+J (3.5cm x 3mm), 8.91% (open circuit voltage 0.89V, short circuit current 18
mA/aa, fill factor 0.55) was obtained. This is 150
When left in the atmosphere at 'C, the deterioration after 1000 to 2000 hours was 0 to 3% (1000 hours) compared to the initial state, and 0 to 5% (2000 hours) was obtained with 30 samples. The deterioration was within 3%, which was an extremely significant improvement in reliability in practice compared to the conventional method, which exceeded 20%.

In addition, in contrast to FIG. 1(A), ITO (7) on an N-type semiconductor
Silver as a reflective electrode on top (500-1000 people)
Then, 3,000 aluminum alloys were formed thereon by electron beam evaporation. Then, due to this reflective electrode, 6
Since long wavelength light of 00 to 800 nm can be irradiated and confined in the ■-type semiconductor layer, the initial conversion efficiency is 9.8.
2% (open circuit voltage 0.89V, short circuit current 19.3mA.

A fill factor of 0.57) was obtained. As for its reliability characteristics, there was only a 3% or less deterioration compared to the initial value even under the condition of leaving it for 11,000 hours at 150'C.

Examples that best demonstrate the features of the present invention are shown below.

〔Example〕

Figure 2 is an example of using the present invention in IG FIET, and N
The present invention relates to a structure that is intended to have long-term reliability as an electrode on an insulated gate field effect semiconductor (hereinafter referred to as PET) having (source) I (channel forming region) N (drain) or PIF junction.

In the drawing, a gate electrode (thickness: 0.2 μm, width: 5 μm) made of N-type silicon was fabricated on a quartz substrate (1) using a first mask. Furthermore, the gate insulator was oxidized at a temperature of 1100"C in a halogen element atmosphere to produce a thickness of 300-1200". Furthermore, a P-type intrinsic semiconductor (I-type silicon ) was manufactured to a thickness of 0.3 μm by a known plasma vapor phase method, LT CVD method (also referred to as HOMOCVD method), or LP CVD method (fJIi pressure vapor phase method) such as photo-CVD method.

Next, after making silicon oxide to a thickness of 1μ by CVD method,
A photoresist was coated, and the resist was removed except above the gate electrode by irradiating the lower side with laser light. Furthermore, the resist was removed, leaving only silicon oxide.

Furthermore, a microcrystalline N silicon semiconductor was formed on these surfaces by plasma vapor deposition to a thickness of 500 mm as (21).
Furthermore, Six Ct-x (Q<x<1 here x
−0,9) (22) with a thickness of less than 100 Å, here 5
It was continuously formed in the same reactor to a thickness of 0. Further, ITO was formed to a thickness of 500 mm by electron beam evaporation. After that, the silicon oxide is removed by a lift-off method, and both ends of the gate electrode are roughly destroyed, and N
type semiconductor (21). As a result, the source (1
2) and the drain (14) are formed into a self-line with the gate electrode (11).

In this case, N (12) I (13) N (14)
Alternatively, an inverter integrated structure of N(14)1(13)N(20) could be constructed.

In the drawing, the silicon nitride film is then passivated by photo-CVD using mercury excitation using silane and ammonia. (15) was expanded to a thickness of 500 to 1000 people. Furthermore, a polyimide resin such as PIQ (16) is formed to a thickness of about 2μ, holes for electrodes are made, and a power source (V
DD) (19), ground (Vss) (17), output (
1B) +7) 7 /- was made of aluminum.

When drilling this PIQ, input (gate electrode (11),
A hole was also made in the gate electrode (11') of the load (not shown) to provide an inverter structure.

As is clear from the drawings, the N-type semiconductor has a microcrystalline or polycrystalline structure (21) Six Ct-x (
Q<x<1) When it is made of a semiconductor (22) and a CTO (23) and is made into such an N-N-CTO junction, even if this FET or IC is left at 150°C for 11,000 hours,
No change due to deterioration of FET characteristics was observed, and the reliability was significantly higher than in the conventional case where metal was simply laminated on an N-type silicon semiconductor.

In the present invention, in the above embodiments, an electrode containing indium oxide such as ITO as a main component was fabricated on an N-type non-single crystal semiconductor. However, P-type silicon semiconductor - P-type silicon carbide (Six
C1-xO<x<1) It is effective to simultaneously create an electrode structure using semiconductor-tin oxide CTO.

As explained above, the present invention forms a crystalline non-single-crystal semiconductor with good electrical conductivity in close contact with a ■-type semiconductor in an electrode structure in a semiconductor device using a non-single-crystal semiconductor such as an insulated gate field effect transistor. Furthermore, a chemically extremely stable Six Ct-x (0
< x < 1), and as a result, it was possible to prevent the formation of an insulating film due to the reaction between the non-single crystal silicon semiconductor and CTO, and it became possible to create a highly reliable semiconductor layer.

[Brief explanation of drawings]

FIG. 1 shows a longitudinal sectional view when the present invention is applied to a photoelectric conversion device. FIG. 2 is a longitudinal sectional view of an integrated structure of an insulated gate field effect transistor using the structure of the present invention. l Figure/1 7 Figure

Claims (1)

[Claims] (1) In an insulated gate field effect transistor having source and drain regions made of an N-type conductivity type semiconductor, the N-type conductivity type semiconductor is a silicon non-single crystal semiconductor layer and Si_XC_1_−_X(0<X< An insulated gate comprising two layers including a silicon carbide semiconductor layer as shown in 1), wherein the silicon carbide semiconductor layer is in close contact with a transparent conductive film containing indium oxide as a main component. type field effect transistor.