JPH0344324U - - Google Patents

Info

Publication number
JPH0344324U
JPH0344324U JP10190589U JP10190589U JPH0344324U JP H0344324 U JPH0344324 U JP H0344324U JP 10190589 U JP10190589 U JP 10190589U JP 10190589 U JP10190589 U JP 10190589U JP H0344324 U JPH0344324 U JP H0344324U
Authority
JP
Japan
Prior art keywords
capacitor
circuit
amplifier
amplifier circuit
dissipative
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10190589U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10190589U priority Critical patent/JPH0344324U/ja
Publication of JPH0344324U publication Critical patent/JPH0344324U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の回路図、第2図は
第1図の回路の実装図、第3図は従来の増幅回路
の一例の回路図、第4図は従来の他の増幅回路の
回路図である。 1……FET(増幅素子)、2〜5……分布定
数線路、6〜9……キヤパシタ、10,11……
抵抗、12,13……キヤパシタ、14,15…
…膜回路基板、16,17……分岐、21……F
ET、22〜25……分布定数線路、26〜29
……キヤパシタ、31……FET、32〜37…
…分布定数線路、38〜41……キヤパシタ、4
2,43……抵抗。
Figure 1 is a circuit diagram of an embodiment of the present invention, Figure 2 is an implementation diagram of the circuit in Figure 1, Figure 3 is a circuit diagram of an example of a conventional amplifier circuit, and Figure 4 is another conventional amplifier. It is a circuit diagram of a circuit. 1...FET (amplification element), 2-5...distributed constant line, 6-9...capacitor, 10, 11...
Resistor, 12, 13... Capacitor, 14, 15...
...Membrane circuit board, 16, 17...Branch, 21...F
ET, 22-25...distributed constant line, 26-29
...Capacitor, 31...FET, 32-37...
...Distributed constant line, 38-41...Capacitor, 4
2,43...Resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] トランジスタ等の増幅素子の入力側及び出力側
にそれぞれ整合回路を設けた増幅回路において、
前記増幅素子の入力端、出力端の少なくとも一方
と接地との間に、目的とする周波数では充分に高
いインピーダンスを持つ小容量のキヤパシタとそ
のキヤパシタに直列に接続する抵抗からなる散逸
性の短絡回路を設けたことを特徴とする超高周波
帯増幅回路。
In an amplifier circuit in which a matching circuit is provided on the input side and output side of an amplifier element such as a transistor,
A dissipative short circuit consisting of a small capacitor having a sufficiently high impedance at the target frequency and a resistor connected in series with the capacitor, between at least one of the input end and the output end of the amplifying element and the ground. An ultra-high frequency band amplifier circuit characterized by being provided with.
JP10190589U 1989-08-31 1989-08-31 Pending JPH0344324U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10190589U JPH0344324U (en) 1989-08-31 1989-08-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10190589U JPH0344324U (en) 1989-08-31 1989-08-31

Publications (1)

Publication Number Publication Date
JPH0344324U true JPH0344324U (en) 1991-04-24

Family

ID=31650827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10190589U Pending JPH0344324U (en) 1989-08-31 1989-08-31

Country Status (1)

Country Link
JP (1) JPH0344324U (en)

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