JPH0346276A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an impurity layer very small in impurity diffusion so as to enable as channel to be micronized by a method wherein a source and a drain are formed through a selective epitaxial growth. CONSTITUTION:A semiconductor substrate 1 is etched using the spacer 7 and the formed electrode 5 as a mask as the depth of the formed impurity layer 5 or more. An epitaxial layer 8 which serves as a drain and a source is formed on the etched part of the semiconductor substrate 1 through a selective epitaxial growth technique, which is thermally treated to form a transistor provided with a drain and a source free of diffusion of impurity. By this setup, a source and a drain where impurity is not diffused can be obtained, so that the channel of a transistor can be micronized in length.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention provides a method for manufacturing a semiconductor device that can form a source/drain of a transistor without diffusion of impurities due to heat treatment when forming the source/drain of a transistor. Regarding.

[Summary of the invention]

In the present invention, after gate oxidation, after forming a gate electrode, forming a shallow impurity layer by ion implantation, depositing an insulator, and forming a spacer on the side wall of the gate electrode by anisotropic etching, After the semiconductor substrate is etched to a depth equal to or greater than the impurity layer using the gate electrode and spacer as a mask, P-type or N-type silicon is formed in that portion by selective silicon growth.

[Conventional technology]

Figure 2 (al~(dl) is the source of a conventional transistor/
A method for forming a drain section will be shown.

As shown by tar in FIG. 2, a gate oxide film 2 is formed on a semiconductor substrate 1, and a gate electrode 3 is deposited.

As shown in the second box), a resist 4 is printed on the entire surface and patterned by photolithography to form a gate electrode 3 using the resist 4 as a mask. Figure 2te
After removing the resist 4 as shown in FIG. 1, an impurity layer 5 is formed by ion implantation using the gate electrode as a mask. Then, as shown in FIG. 2 fdl, heat treatment is performed to activate the impurities, and at this time the impurities diffuse to form the source/drain of the transistor.

A method of manufacturing a semiconductor device in which the source/drain of a transistor as described above is formed has been known.

[Problem B that the invention attempts to solve]

However, the impurity layer formed by the conventional manufacturing method has the disadvantage that the impurity is diffused in the vertical and horizontal directions due to the heat treatment for activation, resulting in a short effective channel length and punch-through.

Therefore, in order to solve these conventional drawbacks, the present invention aims to obtain a source/drain without impurity diffusion.

[Means to solve the problem]

In order to solve the above problem, the present invention forms the source/drain portions by selective epitaxial deposition, thereby making it possible to obtain an impurity layer that does not require heat treatment for activation.

[Effect]

By forming the source/drain using the selective epitaxial formation described above, an impurity layer with very low impurity diffusion can be obtained, so the short channel effect is reduced.
Bunch-through also becomes less likely to occur, making it possible to miniaturize the channel length.

〔Example〕

Embodiments of the present invention are shown in FIG.
The explanation will be based on t~fi+.

As shown in FIG. 1 (al), a gate oxide film 2 is formed on the semiconductor substrate FIL by oxidation, and a gate electrode 3 is deposited on the gate oxide film 2.Furthermore, a photoresist 4 is coated, and a photoresist is formed by a photolithography process. 4 is arbitrarily patterned.

As shown in FIG. 1 (bl), using the photoresist 4 as a mask, the gate electrode 5 is etched. Using the gate electrode 5 as a mask, an impurity layer is formed by ion implantation, and then an insulator 6 is formed on the entire surface. deposit

Then, as shown in FIG. 1 (C1), a spacer 7 is formed on the side wall of the gate electrode 5 by etching the insulator 6 using anisotropic etching.

As shown in FIG. 1+d+, using the gate electrode 3 and spacer 7 formed above as a mask, the semiconductor substrate 1 is etched to a depth equal to or greater than the depth of the impurity layer 5 formed above.

Then, as shown in FIG. 1 (al), an epitaxial layer 8 that will become a source/drain is formed on the etched portion of the semiconductor substrate 1 using a selective epitaxial growth technique.

Through the steps described above, a transistor having a source/drain that will not be diffused by heat treatment can be obtained.

〔Effect of the invention〕

The present invention has the effect of preventing lateral diffusion and further miniaturizing the channel length of the transistor by using a selective epitaxial layer instead of forming the source/drain of the transistor by ion implantation.

[Brief explanation of drawings]

FIGS. 1-(a) are cross-sectional views in the order of manufacturing steps for forming a source/drain according to the present invention, and FIG. 2 (at-fd+ are sectional views in the order of manufacturing steps for forming a conventional source/drain). 1... Semiconductor substrate 2... Gate oxide film 3... Gate electrode 4... Photoresist 5... Impurity layer 6... Insulator 7... Spacer 8... Selected epitaxial layer or more Step-by-step cross-sectional diagram of the method

Claims (1)

[Claims] A first step of forming a gate oxide film on a semiconductor substrate, forming a gate electrode, shallowly implanting impurities using the gate electrode as a mask to form an impurity layer, and depositing an insulating film over the entire surface. , a second step of forming a spacer while leaving an insulator on the sidewall of the gate electrode using anisotropic etching, and a third step of etching the semiconductor substrate using the gate electrode and spacer formed in the first and second steps as a mask. and a fourth step of growing an epitaxial layer by selective silicon growth on the portion etched in the third step to form a source/drain portion of a transistor.