JPH0346464A - Horizontal deflection circuit and horizontal deflection high voltage circuit - Google Patents

Abstract

PURPOSE:To reduce ringing, to improve the picture quality and to obtain an excellent picture by setting a ringing frequency of a current flowing to a damper diode to a frequency at which the Q of a horizontal deflection coil is lowered. CONSTITUTION:The frequency characteristic of the Q of a horizontal deflection coil 6 in the horizontal deflection circuit is taken into account and the ringing frequency is lowered by the coil connecting in series with a resonance capacitor 4 to reduce longitudinal stripes. The ringing frequency is set to the frequency at which the Q of the coil 6 is lowered. A plot in figure shows the frequency characteristic of the Q of the coil 6. In the figure, f1 is the ringing frequency when the coil 5 is not connected, f2 is the ringing frequency when the coil 5 is connected (frequency at which the Q of the coil 6 is lowered). Let the capacitance of the resonance capacitor 4 be C, then the inductance L of the coil 5 is obtained in the following equations L={(1/2pif2)<1/2>-(1/2pif1)<1/2>}/C. The object is attained by connecting the coil 5 whose inductance is L in the equation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a horizontal deflection circuit or a horizontal deflection/high voltage circuit for a television receiver or display using a cathode ray tube.

[Conventional technology]

FIG. 2 is a circuit diagram showing a conventional horizontal deflection circuit. In the figure, 1 is a horizontal drive pulse input terminal, 2 is a horizontal output transistor, 3 is a damper diode, 4 is a resonant capacitor, 6 is a horizontal deflection coil, 7 is a scanning capacitor,
8 is a choke coil, and 9 is a power input terminal.

In such conventional horizontal deflection circuits and horizontal deflection/high voltage circuits,
Ringing occurs and distortion occurs in the horizontal deflection current, resulting in bright and dark vertical stripes on the display screen.

Japanese Patent Application Laid-Open No. 57-53180 can be mentioned as a document describing a conventional technique for reducing vertical stripes caused by ringing in a flyback transformer of a horizontal deflection/high voltage circuit.

[Problem to be solved by the invention]

The above-mentioned conventional technology does not take into account ringing that occurs due to resonance between the lead inductance of the lead wire and the capacitance of the resonant capacitor in the horizontal deflection circuit.

Furthermore, no consideration was given to the frequency characteristics of the Q value of the horizontal deflection coil.

Therefore, if the ringing occurs in a frequency band where the Q value of the horizontal deflection coil is high, severe vertical stripes will occur on the display screen.

SUMMARY OF THE INVENTION An object of the present invention is to provide a horizontal deflection circuit and a horizontal deflection/high voltage circuit that can eliminate the problems of the prior art described above and reduce vertical stripes that occur on a display screen.

In the horizontal deflection circuit, the above purpose is to use a horizontal deflection coil whose Q value is low near the ringing frequency, to set the ringing frequency to a frequency band where the Q value of the horizontal deflection coil is low, or to I1 is achieved by providing means for blocking reverse current at the emitter terminal of the output transistor.

In the diode modulation type horizontal deflection/high voltage circuit, the above object is achieved by connecting a series circuit consisting of a resistor and a coil in series with the second resonant capacitor or by installing a bead core.

[Effect]

In the horizontal deflection circuit of the present invention, since the Q value of the horizontal deflection coil is low at the ringing frequency, ringing can be suppressed.

In addition, since a means for blocking reverse current is provided at the emitter terminal of the horizontal output transistor, ringing occurs due to resonance between the lead inductance of the lead wire between the resonant capacitor and the horizontal output transistor and the capacitance of the resonant capacitor. can be removed. This reduces vertical stripes that occur on the display screen.

Further, in the diode modulation type horizontal deflection/high voltage circuit of the present invention, a parallel circuit or a bead core consisting of a resistor and a coil is connected in series with the second resonant capacitor. Since ringing is thereby damped, vertical stripes can be reduced.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

In each figure, the same numbers are used to indicate the same functions.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. In Figure 1, l is a horizontal drive pulse input terminal, 2 is a horizontal output transistor, 3 is a damper diode, 4 is a resonant capacitor, 5 is a coil, 6 is a horizontal deflection coil, 7 is a scanning capacitor, 8 is a choke coil, 9 indicates the power input terminal.

FIG. 2 is a diagram showing a conventional horizontal deflection circuit, as described above. Hereinafter, for convenience of explanation, the present invention will be explained in comparison with FIG. 2. 1 and 2 differ in that a coil 5 is added.

In the case of the conventional horizontal deflection circuit shown in FIG. 2, when current is passed through the damper diode 3 during the first half of the scanning period, ringing at a constant frequency occurs due to resonance between the lead inductance of the lead wire and the capacitance of the resonant capacitor 4. This ringing also appears in the horizontal deflection current, causing vertical stripes to appear on the display screen and significantly deteriorating the image quality.

On the other hand, in the horizontal deflection circuit of the present invention shown in FIG.
Considering the frequency characteristics of the Q value of the horizontal deflection coil 6, the coil 5 connected in series with the resonant capacitor 4 lowers the ringing frequency and reduces vertical stripes. The ringing frequency is set to a frequency at which the Q value of the horizontal deflection coil 6 is low. FIG. 3 is a diagram showing the frequency characteristics of the Q value of the horizontal deflection coil 6. In FIG. 3, f is the ringing frequency when the coil 5 is not connected, f! is the ringing frequency when the coil 5 is connected (the frequency at which the Q value of the horizontal deflection coil 6 becomes low).

Here, let the capacitance of the resonant capacitor 4 be C.

The inductance L of the coil 5 is obtained by the formula (2).

(However, fL>fz) By connecting the coil 5 having the inductance obtained by the above equation (1), vertical stripes can be reduced, so that image quality can be improved.

Next, a second embodiment of the invention will be described. The circuit configuration of this embodiment is the same as that shown in FIG. 2, but the Q of the horizontal deflection coil 6 is
The difference is that the horizontal deflection coil 6 is set so that the value becomes low at the ringing frequency. In order to change the frequency characteristics of the Q value, it is sufficient to change the self-resonant frequency determined by the distributed capacitance and inductance of the horizontal deflection coil 6.

in general.

The distributed capacitance of the horizontal deflection coil 6 can be reduced by increasing the wire diameter or by increasing the pitch between the windings.

FIG. 4 is a diagram when the frequency characteristic of the Q value of the horizontal deflection coil 6 is changed. In FIG. 4, f.

is the frequency of ringing. From FIG. 4, it can be seen that before the improvement, the Q value was high at the ringing frequency f4, but after the improvement using the above method, the Q value became low. As a result, the same effect as in the first embodiment can be obtained, so that vertical stripes can be reduced and image quality can be improved.

Next, FIG. 5 is a diagram showing a third embodiment of the present invention.

In the present invention, the resonant capacitor 4 is attached to the damper diode 3 during mounting. As a result, the lead wire between the resonant capacitor 4 and the damper diode 3 can be shortened.
Lead inductance can be reduced. Therefore, the frequency of ringing generated by resonance between the capacitance of the resonant capacitor 4 and the lead inductance of the lead wire can be increased.

As shown in FIG. 3, by using the method described above, by setting the ringing frequency to a frequency f where the Q value of the horizontal deflection coil 6 is low, ringing can be suppressed and image quality can be improved.

Next, FIG. 6 is a circuit diagram showing a fourth embodiment of the present invention. In FIG. 6, 10 is a diode.

Comparing the third and fourth embodiments of the present invention,
The difference is that a damper diode 3 is attached to the resonant capacitor 4, but a diode 10 is connected to the emitter terminal of the horizontal output transistor 2. diode 10
acts to block a portion of the current flowing through the damper diode 3 during the first half of the scanning period from flowing into the horizontal output transistor 2 (emitter terminal→collector terminal). As a result, horizontal output transistor 2
Since no current flows through the horizontal output transistor 2 and the resonant capacitor 4, ringing due to resonance between the lead wire inductance between the horizontal output transistor 2 and the resonant capacitor 4 and the capacitance of the resonant capacitor 4 can be eliminated. Therefore, in addition to the effects of the third embodiment of the present invention, it is possible to further reduce vertical stripes, so that a better image can be obtained.

Next, FIG. 7 is a circuit diagram showing a fifth embodiment of the present invention. In FIG. 7, 11 is a bead core.

7 differs from FIG. 6 in that the diode 10 is replaced with a bead core 11. The bead core functions to block the reverse current flowing to the horizontal output transistor 2.

Therefore, the same effects as in the fourth embodiment of the present invention can be obtained, so that the image quality can be improved. Next, FIG. 8 is a circuit diagram showing a sixth embodiment of the present invention. In FIG. 8, 12 is a modulation diode, 3 is a first resonant capacitor, 14 is a second resonant capacitor, 27 is a first scanning capacitor, 15 is a modulation coil, 6 is a second scanning capacitor, 17 18 is a flyback transformer, 18 is a diode 21 is a high voltage output, 22 is a modulation choke coil, 23 is a side pin circuit, 25 is a filter resistor, 2
6 indicates a filter coil.

The operation of the circuit will be explained below using FIG.

In FIG. 8, the resonant frequencies of the horizontal deflection coil 6 and the first resonant capacitor 13 are set to be approximately equal to the resonant frequencies of the modulation coil 15 and the second resonant capacitor 14, and the two resonant circuits are connected in series. It is connected to the.

Hereinafter, this circuit will be referred to as a diode modulation circuit. Pea of the current flowing through the horizontal deflection coil 6 in the diode modulation circuit
kt.

Peak value (hereinafter referred to as P-P value) is current ID? .

Let the P-P value of the current flowing through the modulation coil 15 be current Im, and the P-P value of the current flowing from the connection point between damper diode 3 and modulation diode 12 to the connection point between first scanning capacitor 27 and modulation coil 15 as Imed. Then, the current 1□ is represented by the sum of the current ■1 and the current I m e d. Therefore, when changing the current I, the current becomes ■. 1, the voltage across the second scanning capacitor 16 VC
The horizontal deflection current In! (horizontal size) can be controlled. The side pin circuit 23 modulates the side pin correction voltage to the second scanning capacitor 16 via the choke coil 22.
is applied to both ends to achieve side pin correction.

The diode modulation type horizontal deflection/high voltage circuit of the present invention has a filter resistor 25 and a filter coil 2, compared to the conventional one.
The difference is that six parallel circuits are connected in series with the second resonant capacitor 14. The impedance is set to be high with respect to the frequency of ringing generated by resonance with the lead inductance of the parallel wire. Therefore, this parallel circuit can suppress the ringing that occurs in the lower resonant circuit, reducing vertical stripes.
Image quality can be improved.

Moreover, FIG. 9 shows the sixth embodiment of the present invention when using bead cores.
It is a figure showing an example of. In the fjS9 diagram, 50 is a bead core. As shown in FIG.

By attaching the bead core 50 to the second resonant capacitor 14, ringing occurring in the lower resonant circuit can be reduced. Therefore, the same effect as when a parallel circuit of the filter resistor 25 and the filter coil 26 is connected can be obtained, so that high image quality can be achieved.

〔Effect of the invention〕

According to the present invention, in a horizontal deflection circuit or a diode modulation type horizontal deflection high voltage circuit, it is possible to reduce vertical stripes of brightness and darkness that occur at the left end of the display screen due to the lead wire, improve image quality, and provide a good image.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the first embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional horizontal deflection circuit, FIG. 3 is a characteristic diagram showing the frequency characteristics of the Q value of the horizontal deflection coil, and FIG. Figure 4 is a characteristic diagram when changing the frequency characteristics of the Q value of the horizontal deflection coil.
FIG. 5 is a circuit diagram showing a third embodiment of the invention, FIG. 6 is a circuit diagram showing a fourth embodiment of the invention, and FIG. 7 is a circuit diagram showing a fifth embodiment of the invention. , FIG. 8 is a circuit diagram showing a sixth embodiment of the present invention, and FIG. 9 is a circuit diagram showing a sixth embodiment of the present invention using a bead core. 61...Horizontal drive pulse input terminal. 2...Horizontal output transistor. 3... Damper diode. 4... Resonance capacitor. 5...Coil. 6.Horizontal deflection coil. 7...Scanning capacitor. 8...Choke coil. 9...Power input terminal. 10...Diode. ↓l...Bead core. L2...Modulation diode. 15...Modulation coil. 22...Modulation choke coil. 25...Resistance for filter. 26... Filter coil. Fig. 1 The E + fruit of the unexploded sun and moon, the diagram that accepts the ne L Zudari ε. Fig. A group diagram showing the special number of skins, a diagram showing the execution of ≧ love 3 of the 7th diagram when the change was 2 sun, left, showing the execution of ≧ love 3 of the 7th diagram when the change was 2 sun. Z Figure 43 42+ of the 1st and 3rd month, fixed allocation x office, 3rd time/UJ town ri 1 Implementation of the present invention

Claims (1)

[Claims] 1. In a horizontal deflection circuit consisting of a horizontal output transistor, a damper diode, a resonant capacitor, a horizontal deflection coil, and a scanning capacitor, the ringing frequency of the current flowing through the damper diode is determined by the Q value of the horizontal deflection coil. A horizontal deflection circuit characterized by having a setting means for setting a frequency to be lowered. 2. The horizontal deflection circuit according to claim 1, wherein the setting means comprises means for reducing the distributed capacitance by increasing the wire diameter of the horizontal deflection coil or increasing the pitch between windings. horizontal deflection circuit. 3. The horizontal deflection circuit according to claim 1, wherein the setting means comprises a coil connected in series with the resonant capacitor. 4. The horizontal deflection circuit according to claim 1, wherein the setting means comprises means for directly attaching a resonant capacitor to the damper diode to reduce its lead inductance. 5. In the horizontal deflection circuit according to claim 4, between the emitter terminal of the horizontal output transistor and ground,
A horizontal deflection circuit characterized by connecting diodes with the cathode facing the emitter side and the anode facing the ground side. 6. The horizontal deflection circuit according to claim 4, wherein a bead core is connected between the emitter terminal of the horizontal output transistor and ground. 7. A diode consisting of a horizontal output transistor, a damper diode, a modulation diode, a first resonant capacitor, a second resonant capacitor, a horizontal deflection coil, a first scanning capacitor, a modulation coil, a second scanning capacitor, and a modulation choke coil. A horizontal deflection/high voltage circuit including a modulation circuit and a side pin circuit for applying a side pin correction voltage across the second scanning capacitor, the horizontal deflection/high voltage circuit including a side pin correction voltage across the second scanning capacitor; A horizontal deflection/high voltage circuit characterized by connecting a parallel circuit consisting of the following or bead cores.