JPH0346845A - Signal processing system - Google Patents

Signal processing system

Info

Publication number
JPH0346845A
JPH0346845A JP18312189A JP18312189A JPH0346845A JP H0346845 A JPH0346845 A JP H0346845A JP 18312189 A JP18312189 A JP 18312189A JP 18312189 A JP18312189 A JP 18312189A JP H0346845 A JPH0346845 A JP H0346845A
Authority
JP
Japan
Prior art keywords
signal processing
signal
signals
division multiplexed
time division
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18312189A
Other languages
Japanese (ja)
Inventor
Kenichiro Kamaike
蒲池 健一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18312189A priority Critical patent/JPH0346845A/en
Publication of JPH0346845A publication Critical patent/JPH0346845A/en
Pending legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To omit the external device which sets the take-in position of a signal by providing each signal processor with the means which shifts the signal, which is not taken into the processor itself, in the processor and sends it to the following signal processor in accordance with the start position of time division multiplexed signals. CONSTITUTION:Time division multiplexed signals 31 are sent to a signal processor 21 from a controller 1. The signal processor 21 takes in signals, whose number is determined, from the start of time division multiplexed signals 31. Taken-in signals are processed in the signal processor 21, and the other signals are shifted in the signal processor 21 and are moved to the start position of time division multiplexed signals. They are sent as time division multiplexed signals 32 to a signal processor 22 in the following stage. Hereafter, the same processing is performed in signal processors 22, 23,...2n. Thus, it is unnecessary to change setting from the external though the number of signals to be taken into each signal processor is increased or reduced.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は1時分割多重化信号の処理を行う信号処理シス
テム、さらに詳しく云えば制御装置に複数個の信号処理
装置を接続し、制御装置が送出する時分割多重化信号を
各信号処理装置が順次取込むように構成した信号処理シ
ステムに関する。
Detailed Description of the Invention (Industrial Application Field) The present invention relates to a signal processing system that processes one-time division multiplexed signals, and more specifically, a control device in which a plurality of signal processing devices are connected to a control device. The present invention relates to a signal processing system configured such that each signal processing device sequentially receives a time division multiplexed signal sent out by a device.

(従来の技術) 第4図は1時分割多重化信号の処理を行う従来の信号処
理システムの一例を示すブロック図である。
(Prior Art) FIG. 4 is a block diagram showing an example of a conventional signal processing system that processes a one-time division multiplexed signal.

制御装置lから信号処理装置21へ時分割多重化信号3
が送出されている。
Time division multiplexed signal 3 from control device l to signal processing device 21
is being sent.

信号処理装置21は5時分割多重化信号3t−そのまま
下位の信号処理装置22へ送出し、同時に、時分割多重
化信号3の中の取込位置設定装置71が指示する位置か
ら連続する信号を自装置に取込む。時分割多重化信号3
は下位の信号処理装置に流れていき、信号処理装置22
.23、・・・・・・2nもそれぞn取込み位童設定装
f172.73.・・・・・・7nが指示する位置から
連続する信号を自装置に取込む。
The signal processing device 21 sends the 5 time division multiplexed signal 3t as it is to the lower signal processing device 22, and at the same time, the signal processing device 21 sends the 5 time division multiplexed signal 3t as it is to the lower signal processing device 22, and at the same time receives the continuous signal from the position specified by the acquisition position setting device 71 in the time division multiplexed signal 3. Import into own device. Time division multiplexed signal 3
flows to the lower level signal processing device, and the signal processing device 22
.. 23,...2n also have n intake level child setting device f172.73. ......Receive continuous signals from the position indicated by 7n into the own device.

第5図は各信号処理装置の取込信号が1時分側条重化信
号3の中で連続するように、各取込位置設定装置全設定
した場合の信号の取込み方を示している。
FIG. 5 shows how to take in signals when all the take-in position setting devices are set so that the take-in signals of each signal processing device are continuous in the 1-hour side line weighted signal 3.

(発明が解決しようとする課題) 従来の時分割多重化信号の処理全行う信号処理システム
は、このように各信号処理装置毎に信号取込位置を設定
するので、信号処理装置の取込信号数の増減があると取
込位置設定装置の設定全変更しなけルばならないという
欠点があった。また、取込信号数の異なる信号処理装置
の接続順序全変更する場合も、取込位置設定装置の設定
を変更しなければならないので、柔軟性に欠けるという
欠点があった。
(Problem to be Solved by the Invention) In the conventional signal processing system that performs all the processing of time-division multiplexed signals, the signal acquisition position is set for each signal processing device in this way. There is a drawback that if the number increases or decreases, all settings of the intake position setting device must be changed. Further, even when changing the connection order of signal processing devices having different numbers of signals to be captured, the settings of the capturing position setting device have to be changed, so there is a drawback of lack of flexibility.

本発明の目的は上記欠点を解決するもので、各信号処理
装置の信号取込数が増減した場合でも外部からの設定変
更全必要としない信号処理システム全提供することにあ
る。
An object of the present invention is to solve the above-mentioned drawbacks, and to provide an entire signal processing system that does not require any external setting changes even when the number of signals acquired by each signal processing device increases or decreases.

(課題を解決するための手段) 前記目的全達成するために本発明による信号処理システ
ムは制御装置に消号処理装置複数個全シリースに接続し
、前記制御装置が送出する時分割多重化信号の連続した
複数信号を前記複数の信号処理装置が順次取込んでいく
ように構成したシステムにおいて、前記各信号処理装置
は、自装置の取込むべき数の信号を、前段の装置より受
信した時分割多重化信号の先頭から連続して取込む取込
手段と、自装置が取込まない信号を時分割多重化信号の
先頭の位ttで移動させて後段の装置に送出する手段と
を有しm成されている。
(Means for Solving the Problems) In order to achieve all of the above objects, a signal processing system according to the present invention connects a plurality of decoding processing devices to a control device for all series, and processes the time division multiplexed signals sent out by the control device. In a system configured such that the plurality of signal processing devices sequentially capture a plurality of continuous signals, each of the signal processing devices receives the number of signals that it should capture from the previous device in a time-sharing manner. It has an acquisition means that continuously acquires the multiplexed signal from the beginning, and a means that moves the signal that is not acquired by the own device by the position tt to the beginning of the time division multiplexed signal and sends it to the subsequent device. has been completed.

(実 施例) 以下1図面を参照して本発明をさらに詳しく説明する。(Example) The present invention will be explained in more detail below with reference to one drawing.

第1図は本発明による信号処理システムの一実施例を示
すブロック図である。
FIG. 1 is a block diagram showing an embodiment of a signal processing system according to the present invention.

制御装置1から時分割多重化信号31が信号処理装置2
1へ送出さnて込る。信号処理装置IL21は時分割多
重化信号31の先頭から取込むべき数の信号を取込む。
The time division multiplexed signal 31 from the control device 1 is sent to the signal processing device 2.
Send to 1 and insert. The signal processing device IL21 takes in the number of signals to be taken in from the beginning of the time division multiplexed signal 31.

取込まれた信号は、fs号処理装置21の内部で処理さ
れ、取込まnない残りの信号は内部でシフトされ1時分
割多重化信号の先頭位置に移動させらnる。そして後段
の信号処理装置22に時分割多重化信号32として送出
さnる。以下。
The captured signals are processed within the fs signal processing device 21, and the remaining signals that have not been captured are internally shifted and moved to the leading position of the time division multiplexed signal. The signal is then sent to the subsequent signal processing device 22 as a time division multiplexed signal 32. below.

信号処理装置22,23.・・・・・・2nについても
同様の動作がなさnる。
Signal processing devices 22, 23. . . . Similar operation is performed for 2n.

第2図は、第1図の信号処理装置2−の内部構成の詳細
金示す図である。
FIG. 2 is a diagram showing details of the internal configuration of the signal processing device 2- in FIG. 1.

前段の信号処理装置2i−1からの時分割多重化信号3
−の先頭部分は、シフトレジスタ6番をシフトさn、さ
らに取込まnる信号数に相消する容量を持つシフトレジ
スタ51にシフトさnる。これにより残りの部分は、取
込まれない信号数に相当する容量全持つシフトレジスタ
6iに書込まnる。シフトレジスタ5sに書込まnた信
号は、信号処理部4−で処理さnる。
Time division multiplexed signal 3 from the previous stage signal processing device 2i-1
The leading portion of - is shifted to shift register No. 6 n, and further shifted to a shift register 51 having a capacity that cancels out the number of signals to be taken in n. As a result, the remaining portion is written to the shift register 6i, which has a full capacity corresponding to the number of signals that are not taken in. The signal written to the shift register 5s is processed by the signal processing section 4-.

シフトレジスタ64に書込まnた信号は1時分割多重化
信号の先頭位置に合わせて時分割多重化信号3i+1と
して、下位の信号処理装置2番+1に送出さnる。
The signal written in the shift register 64 is sent to the lower signal processing device No. 2+1 as a time division multiplexed signal 3i+1 in accordance with the leading position of the 1 time division multiplexed signal.

第3図は各信号処理装置間の時分割多重化信号31,3
2.・・・・・・3nの内容を示している。
Figure 3 shows time division multiplexed signals 31, 3 between each signal processing device.
2. ...Indicates the contents of 3n.

図中の1.Cの部分は意味を持たない信号である。1 in the diagram. The part C is a meaningless signal.

(発明の効果) 以上、説明し念ように本発明は、各信号処理装置に自装
置が取込まない信号全装置内でシフトして時分割多重化
信号の先頭位置に合わせて後段の信号処理装置へ送出す
る手段金膜けである。し九がって、信号の取込位fを設
定する外部装置は省略でき、各信号処理装etic取込
信号の増減があっても、他の信号処理装置の設定変更が
不要であるという効果がある。
(Effects of the Invention) As explained above, the present invention enables each signal processing device to shift all the signals that are not taken in by the device itself and to match the start position of the time division multiplexed signal to the subsequent signal processing. The means of delivery to the device is gold-plated. Therefore, an external device for setting the signal acquisition position f can be omitted, and even if there is an increase or decrease in the etic acquisition signal of each signal processing device, there is no need to change the settings of other signal processing devices. There is.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明による信号処理システムの実施例を示す
ブロック図である。 第2図は第1図の信号処理装置の詳細を示す図である。 第3因は%各信号処理装置間の時分割多重化信号の内容
金示す図である。 第4図は、従来の信号処理システムの一例を示す図、第
5図は各信号処理装置が時分割多重化信号を取込む例を
示す図である。 l・・・制御装置 21.22.+++m2j++++20−1.2n・・
・信号処理装置 3.31.32・・・・・・31・・・・・・3n・・
・時分割多重化信号 4i・・・信号処理部 5j 、6i・・・シフトレジスタ
FIG. 1 is a block diagram showing an embodiment of a signal processing system according to the present invention. FIG. 2 is a diagram showing details of the signal processing device shown in FIG. 1. The third factor is a diagram showing the content of time division multiplexed signals between each signal processing device. FIG. 4 is a diagram showing an example of a conventional signal processing system, and FIG. 5 is a diagram showing an example in which each signal processing device receives a time division multiplexed signal. l...control device 21.22. +++m2j++++20-1.2n...
・Signal processing device 3.31.32...31...3n...
・Time division multiplexed signal 4i...Signal processing unit 5j, 6i...Shift register

Claims (1)

【特許請求の範囲】[Claims] 制御装置に信号処理装置複数個をシリースに接続し、前
記制御装置が送出する時分割多重化信号の連続した複数
信号を前記複数の信号処理装置が順次取込んでいくよう
に構成したシステムにおいて、前記各信号処理装置は自
装置の取込むべき数の信号を、前段の装置より受信した
時分割多重化信号の先頭から連続して取込む取込手段と
、自装置が取込まない信号を時分割多重化信号の先頭の
位置まで移動させて後段の装置に送出する手段とを有す
ることを特徴とする信号処理システム。
In a system configured such that a plurality of signal processing devices are connected in series to a control device, and the plurality of signal processing devices sequentially receive a plurality of consecutive time division multiplexed signals sent out by the control device, Each of the signal processing devices has an acquisition means for successively acquiring the number of signals that it should acquire from the beginning of the time-division multiplexed signal received from the previous device, and a means for sequentially acquiring the number of signals that it should acquire from the beginning of the time-division multiplexed signal received from the previous device, and 1. A signal processing system comprising means for moving the divided multiplexed signal to a leading position and transmitting the divided multiplexed signal to a subsequent device.
JP18312189A 1989-07-14 1989-07-14 Signal processing system Pending JPH0346845A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18312189A JPH0346845A (en) 1989-07-14 1989-07-14 Signal processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18312189A JPH0346845A (en) 1989-07-14 1989-07-14 Signal processing system

Publications (1)

Publication Number Publication Date
JPH0346845A true JPH0346845A (en) 1991-02-28

Family

ID=16130159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18312189A Pending JPH0346845A (en) 1989-07-14 1989-07-14 Signal processing system

Country Status (1)

Country Link
JP (1) JPH0346845A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101686473B1 (en) * 2016-06-29 2016-12-14 정남수 Apparatus for collecting onion

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101686473B1 (en) * 2016-06-29 2016-12-14 정남수 Apparatus for collecting onion

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