JPH0348227U - - Google Patents

Info

Publication number
JPH0348227U
JPH0348227U JP1989109552U JP10955289U JPH0348227U JP H0348227 U JPH0348227 U JP H0348227U JP 1989109552 U JP1989109552 U JP 1989109552U JP 10955289 U JP10955289 U JP 10955289U JP H0348227 U JPH0348227 U JP H0348227U
Authority
JP
Japan
Prior art keywords
chip
die bonding
circuit board
infrared
infrared source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989109552U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989109552U priority Critical patent/JPH0348227U/ja
Publication of JPH0348227U publication Critical patent/JPH0348227U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Die Bonding (AREA)
JP1989109552U 1989-09-19 1989-09-19 Pending JPH0348227U (mo)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989109552U JPH0348227U (mo) 1989-09-19 1989-09-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989109552U JPH0348227U (mo) 1989-09-19 1989-09-19

Publications (1)

Publication Number Publication Date
JPH0348227U true JPH0348227U (mo) 1991-05-08

Family

ID=31658139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989109552U Pending JPH0348227U (mo) 1989-09-19 1989-09-19

Country Status (1)

Country Link
JP (1) JPH0348227U (mo)

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