JPH0349072B2 - - Google Patents

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Publication number
JPH0349072B2
JPH0349072B2 JP58078575A JP7857583A JPH0349072B2 JP H0349072 B2 JPH0349072 B2 JP H0349072B2 JP 58078575 A JP58078575 A JP 58078575A JP 7857583 A JP7857583 A JP 7857583A JP H0349072 B2 JPH0349072 B2 JP H0349072B2
Authority
JP
Japan
Prior art keywords
voltage
measured
resistance
resistance element
deviation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58078575A
Other languages
Japanese (ja)
Other versions
JPS59203965A (en
Inventor
Masakuni Wakui
Shoji Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Cosmos Electric Co Ltd
Original Assignee
Tokyo Cosmos Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Cosmos Electric Co Ltd filed Critical Tokyo Cosmos Electric Co Ltd
Priority to JP58078575A priority Critical patent/JPS59203965A/en
Publication of JPS59203965A publication Critical patent/JPS59203965A/en
Publication of JPH0349072B2 publication Critical patent/JPH0349072B2/ja
Granted legal-status Critical Current

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  • Measurement Of Resistance Or Impedance (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Description

【発明の詳細な説明】 この発明は可変抵抗器を作る前における抵抗素
子の偏差特性を測定する抵抗偏差特性検査器に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resistance deviation characteristic tester for measuring the deviation characteristics of a resistance element before manufacturing a variable resistor.

第1図に示すように可変抵抗器11の両端間に
直流電源12が接続され、可変抵抗器11の可動
子13をその抵抗素子14上に摺動した時に得ら
れる電圧が、例えば直線的であることが要求され
る。この可変抵抗器11として抵抗素子14を組
込む前に、その抵抗素子自体のみにおいてその直
線性を検査することが行われている。例えば第1
図において可変抵抗器として作る前において抵抗
素子14に対してその両端面に予め定められた電
圧を印加し、抵抗素子14に沿つて等間隔で複数
のプローブ15を接触させ、そのプローブ15に
得られる各電圧をそれぞれ第2図に示すようにプ
ロツトし、そのプロツトを連らねる抵抗特性線1
6を作る。更に理想的な抵抗特性の線、つまり予
め決められた直線的に変化する理想特性線17の
予め決められた基準点Psでの電圧値Vs1と、実際
の抵抗特性線16上の基準点Ps上の値Vxとの偏
差ΔVを求め、基準点Psにおける実際の特性線上
の値Vxを通り、理想特性線17と並行な線18
に対して、実際の抵抗特性線16の各点がどれだ
け偏差があるか、例えば予め決められた領域(斜
線で示す領域)内にあるかを検査することが行わ
れ、その領域内にある場合は良品として可変抵抗
器に組込むために用いられる。
As shown in FIG. 1, a DC power supply 12 is connected between both ends of the variable resistor 11, and the voltage obtained when the movable element 13 of the variable resistor 11 is slid onto its resistance element 14 is, for example, linear. something is required. Before incorporating the resistance element 14 as the variable resistor 11, the linearity of only the resistance element itself is tested. For example, the first
In the figure, before making a variable resistor, a predetermined voltage is applied to both end faces of the resistance element 14, and a plurality of probes 15 are brought into contact with the resistance element 14 at equal intervals, and the probes 15 are Plot each voltage as shown in Figure 2, and create a resistance characteristic line 1 connecting the plots.
Make 6. Furthermore, the voltage value Vs 1 at a predetermined reference point Ps of the ideal resistance characteristic line, that is, the predetermined linearly changing ideal characteristic line 17, and the reference point Ps on the actual resistance characteristic line 16. Find the deviation ΔV from the above value Vx, and draw a line 18 that passes through the value Vx on the actual characteristic line at the reference point Ps and is parallel to the ideal characteristic line 17.
, it is inspected to see how much deviation each point of the actual resistance characteristic line 16 has, for example, whether it is within a predetermined area (shaded area), and whether it is within that area. If it is a good product, it is used to incorporate it into a variable resistor.

従来このような直線性の検査を行う場合、第3
図に示すように被測定抵抗素子14にその延長方
向に沿つて一定間隔でプローブ11乃至1nを接
触させ、これらプローブ11乃至1nはマルチプ
レクサ21の入力端子21乃至2nにそれぞれ接
続される。一方、被測定抵抗素子14に対する基
準抵抗素子22が設けられ、それに対しても同様
に同一数、同一間隔でプローブ31乃至3nがそ
れぞれ接触され、プローブ31乃至3nはマルチ
プレクサ23の入力端子41乃至4nにそれぞれ
接続される。これら被測定抵抗素子14及び基準
低抗素子22の両端には直流電源12より電圧
Vsが印加されている。被測定抵抗素子14の基
準点Psに接触するプローブ1sはマルチプレク
サ21の入力端子2sに接続される。基準抵抗素
子22の基準点Psと接触するプローブ3sはマ
ルチプレクサ23の入力端子4sに接続されてい
る。
Conventionally, when performing such a linearity test, the third
As shown in the figure, probes 1 1 to 1n are brought into contact with the resistive element 14 to be measured at regular intervals along its extension direction, and these probes 1 1 to 1n are connected to input terminals 2 1 to 2n of the multiplexer 21, respectively. . On the other hand, a reference resistance element 22 is provided for the resistance element 14 to be measured, and probes 3 1 to 3 n are similarly contacted in the same number and at the same intervals. 1 to 4n, respectively. A voltage is applied to both ends of the resistance element 14 to be measured and the reference low resistance element 22 from the DC power supply 12.
Vs is applied. The probe 1s that contacts the reference point Ps of the resistive element 14 to be measured is connected to the input terminal 2s of the multiplexer 21. A probe 3s that contacts the reference point Ps of the reference resistance element 22 is connected to an input terminal 4s of the multiplexer 23.

マルチプレクサ21,23は制御部24によつ
て入力端子21乃至2n,41乃至4nの対応する
ものがそれぞれ順次選択されてその入力電圧が取
出されて出力される。これら出力は差動増幅器2
5に供給される。一方、基準点Psに対応する各
電圧が端子2s,4sより差動増幅器26にも印
加されており、これらの差電圧が取出される。つ
まりこの差動増幅器26から第2図におけら基準
点Psにおける電圧差ΔVが得られる。差動増幅器
25の出力は各プローブの対応測定点における差
電圧が順次得られる。従つて第2図における実際
の抵抗特性線16の各プロツト点と理想線17の
対応する各点との電圧差が得られ、これと差動増
幅器26の出力ΔVとの差が差動増幅器27でと
られる。
In the multiplexers 21 and 23, corresponding ones of the input terminals 2 1 to 2n and 4 1 to 4n are sequentially selected by the control unit 24, and the input voltages thereof are taken out and output. These outputs are differential amplifier 2
5. On the other hand, voltages corresponding to the reference point Ps are also applied to the differential amplifier 26 from the terminals 2s and 4s, and the difference voltages are taken out. In other words, the voltage difference ΔV at the reference point Ps in FIG. 2 is obtained from the differential amplifier 26. As the output of the differential amplifier 25, the difference voltages at the corresponding measurement points of each probe are sequentially obtained. Therefore, the voltage difference between each plot point of the actual resistance characteristic line 16 and each corresponding point of the ideal line 17 in FIG. It is taken by.

差動増幅器27の出力は第2図における抵抗特
性線16のプロツト点と基準線18との対応する
点との偏差となる。この差動増幅器27の出力は
AD変換器28でデジタル信号に変換され、表示
器29へ供給され、例えば横軸の基準線18上の
位置は各プローブの測定点と対応し、その基準線
らの偏差は特性線16と18との偏差を示し、そ
のような偏差特性線31が記録表示される。
The output of the differential amplifier 27 is the deviation between the plot point of the resistance characteristic line 16 and the corresponding point of the reference line 18 in FIG. The output of this differential amplifier 27 is
It is converted into a digital signal by the AD converter 28 and supplied to the display 29. For example, the position on the reference line 18 on the horizontal axis corresponds to the measurement point of each probe, and the deviation between the reference lines is the characteristic line 16 and 18. Such a deviation characteristic line 31 is recorded and displayed.

この偏差特性線31を見ればその被測定抵抗素
子が良品であるか否かが直ちに解り、抵抗偏差特
性検査を行うことができる。しかしこの第3図に
示した検査器は一般に市販されているものではな
く、わざわざこのための検査器を作る必要があつ
た。第3図における構成中の差動増幅器25,2
6を除いた部分、即ちマルチプレクサ21,2
3、制御部24、差動増幅器27、AD変換器2
8、表示部29を含んだ部分32は一般にデータ
収録器(データロガ)として市販されている。し
かしこの市販品を従来の抵抗偏差特性検査器とし
て直接使うことができず、また第3図中の差動増
幅器25,26を市販のデータ集録器内に挿入し
て用いることは実際には困難であつた。このため
従来の抵抗偏差特性検査器は高価なものとならざ
るを得なかつた。
By looking at this deviation characteristic line 31, it can be immediately determined whether the resistance element to be measured is a good product or not, and a resistance deviation characteristic test can be performed. However, the tester shown in FIG. 3 is not generally available on the market, and it was necessary to create a tester specifically for this purpose. Differential amplifiers 25, 2 in the configuration in FIG.
6, that is, multiplexers 21 and 2
3. Control unit 24, differential amplifier 27, AD converter 2
8. The portion 32 including the display section 29 is generally commercially available as a data logger. However, this commercially available product cannot be used directly as a conventional resistance deviation characteristic tester, and it is actually difficult to insert the differential amplifiers 25 and 26 in Fig. 3 into a commercially available data acquisition device. It was hot. For this reason, conventional resistance deviation characteristic testers have had to be expensive.

このような点より第4図に示すように抵抗素子
14に対する直流電源12と、基準抵抗素子22
に対する直流電源12′とを別個に設け、被測定
抵抗素子14の基準点Psに対するプローブ1s
に得られた電圧と、基準抵抗素子22の基準点
Psのプローブ3sに得られた電圧とを差動増幅
器33で差をとつて差電圧ΔVを得て、この差電
圧を被測定抵抗素子14に対する電源12の基準
電位点に印加することが考えられる。
From this point of view, as shown in FIG.
A DC power source 12' is separately provided for the probe 1s for the reference point Ps of the resistive element 14 to be measured.
The voltage obtained at and the reference point of the reference resistance element 22
It is conceivable that the difference between the voltage obtained at the probe 3s of Ps and the voltage obtained by the probe 3s of Ps is obtained by the differential amplifier 33 to obtain a differential voltage ΔV, and this differential voltage is applied to the reference potential point of the power supply 12 with respect to the resistance element 14 to be measured. .

このようにすればプローブ11乃至1nをマル
チプレクサ21に印加して得られた電圧と、プロ
ーブ31乃至3nに得られた電圧をマルチプレク
サ23で取出した電圧とを差動増幅器25で差を
とり、その差動増幅器25の出力をそのまゝAD
変換器28によりデジタル信号に変換して表示器
29に表示すれば第3図における表示器29の表
示と同一のものが得られる。この構成によれば従
来のデータ収録器32として市販されているもの
を使用することができ、全体として安価に構成で
きる。
In this way, the differential amplifier 25 calculates the difference between the voltage obtained by applying the probes 1 1 to 1n to the multiplexer 21 and the voltage obtained by the multiplexer 23 from the voltage obtained to the probes 3 1 to 3n. , the output of the differential amplifier 25 is directly AD
If the signal is converted into a digital signal by the converter 28 and displayed on the display 29, the same display as that on the display 29 in FIG. 3 can be obtained. According to this configuration, a commercially available conventional data recorder 32 can be used, and the overall configuration can be made at low cost.

しかし、この場合は電源12が接地されていな
いフロート電源となるため、電源電圧が不安定と
なり、しかも電源12′として電源トランンスや
電源フイルタなども必要となる。電源が不安定で
あれば正しい測定が得られなくなる。
However, in this case, the power supply 12 is a floating power supply that is not grounded, so the power supply voltage becomes unstable, and a power transformer, a power filter, etc. are also required as the power supply 12'. If the power supply is unstable, accurate measurements will not be obtained.

この発明の目的は市販のデータ収録器をそのま
ま使用することができ、しかも安定で正しく測定
することが可能な抵抗偏差特性検査器を提供する
ことにある。
An object of the present invention is to provide a resistance deviation characteristic tester which can use a commercially available data recorder as is and which can perform stable and accurate measurements.

この発明によれば被測定抵抗素子の基準点の電
圧と、これと対応する基準抵抗素子の基準点の電
圧とを演算増幅器に入力してその偏差を取出し、
この偏差と、被測定抵抗素子の両端に印加すべき
直流電圧とを加算回路で加算し、その加算回路の
出力側と演算増幅器の出力側との間に被測定抵抗
素子の両端を接続する。このようにして演算増幅
器の前記両入力の偏差がなくなるように負帰還が
かゝり、被抵抗素子には基準点の電位の差分だけ
差し引かれた電圧が印加されることになる。
According to this invention, the voltage at the reference point of the resistance element to be measured and the voltage at the reference point of the corresponding reference resistance element are input to an operational amplifier, and the deviation thereof is extracted.
This deviation and the DC voltage to be applied to both ends of the resistive element to be measured are added by an adder circuit, and both ends of the resistive element to be measured are connected between the output side of the adder circuit and the output side of the operational amplifier. In this way, negative feedback is applied to eliminate the deviation between the two inputs of the operational amplifier, and a voltage subtracted by the difference in potential between the reference points is applied to the resisted element.

第5図はこの発明による抵抗偏差特性検査器の
一例を示し、第4図と対応する部分には同一符号
を付けて示す。この発明では参照電圧発生回路3
4が設けられる。参照電圧発生回路34は被測定
抵抗素子14の両端に印加されるべき電圧Vsと、
基準抵抗素子の基準点に得られる電圧とを発生す
るものである。この例においては基準抵抗素子2
2が設けられ、その両端面に電源12′が接続さ
れ、電源12′の一端は接地されて電圧Vsが基準
抵抗素子22に印加されている。この基準抵抗素
子22の基準点Psにプローブ3sが接触されて
このプローブ3sから基準電圧が得られている。
測定すべき抵抗素子の種類が決つていればその印
加電圧Vsが決つており、また基準点も決つてい
るため、このような基準抵抗素子22をわざわざ
設けることなく電圧Vsと基準点Psに対応する電
圧とのみを発生する参照電圧発生回路34を設け
てもよい。
FIG. 5 shows an example of a resistance deviation characteristic tester according to the present invention, and parts corresponding to those in FIG. 4 are designated by the same reference numerals. In this invention, the reference voltage generation circuit 3
4 is provided. The reference voltage generation circuit 34 generates a voltage Vs to be applied across the resistance element 14 to be measured;
The voltage obtained at the reference point of the reference resistance element is generated. In this example, the reference resistance element 2
2 is provided, a power supply 12' is connected to both end faces thereof, one end of the power supply 12' is grounded, and a voltage Vs is applied to the reference resistance element 22. A probe 3s is brought into contact with a reference point Ps of this reference resistance element 22, and a reference voltage is obtained from this probe 3s.
If the type of resistance element to be measured is determined, the applied voltage Vs is determined, and the reference point is also determined. A reference voltage generation circuit 34 may be provided that generates only the corresponding voltage.

被測定抵抗素子14の基準点Psのプローブ1
sに得られた電圧と、基準抵抗素子22の基準点
Psのプローブ3sに得られた電圧とが演算増幅
器35の反転入力側と非反転入力側にそれぞれ印
加される。演算増幅器35の出力と、参照電圧発
生回路34よりの抵抗素子14に印加されるべき
電圧、即ちこの例では電源12′の電圧Vsとが加
算回路36で加算される。この加算回路36の出
力側と、演算増幅器35の出力側とが抵抗素子1
4の両端に接続される。
Probe 1 at reference point Ps of resistive element 14 to be measured
The voltage obtained at s and the reference point of the reference resistance element 22
The voltage obtained at the probe 3s of Ps is applied to the inverting input side and the non-inverting input side of the operational amplifier 35, respectively. The output of the operational amplifier 35 and the voltage to be applied to the resistive element 14 from the reference voltage generating circuit 34, that is, the voltage Vs of the power supply 12' in this example, are added in an adding circuit 36. The output side of this adder circuit 36 and the output side of the operational amplifier 35 are connected to the resistor element 1.
Connected to both ends of 4.

このような構成となつているため、演算増幅器
35の出力側と反転入力側との間に、抵抗素子1
4の一端とその基準点Psとの間の部分が帰還抵
抗器として接続され、演算増幅器35の両入力
側、つまり抵抗素子14,22における各基準点
における電位差がなくなるように、即ち、被測定
抵抗素子14の基準点の電位が基準抵抗素子22
の基準点の電位と等しくなるように負帰還がかゝ
つて演算増幅器35の出力側には、第1図、第2
図に示した偏差ΔVが得られる。
Because of this configuration, the resistor element 1 is connected between the output side and the inverting input side of the operational amplifier 35.
4 and its reference point Ps is connected as a feedback resistor so that there is no potential difference at each reference point on both input sides of the operational amplifier 35, that is, in the resistive elements 14 and 22. The potential of the reference point of the resistance element 14 is the same as that of the reference resistance element 22.
Negative feedback is applied to the output side of the operational amplifier 35 so that the potential is equal to the potential of the reference point of FIGS. 1 and 2.
The deviation ΔV shown in the figure is obtained.

このΔVと電源12′の電圧Vsとが加算回路で
加算され、この加算値が被測定抵抗素子14の他
端に印加される。従つて被測定抵抗素子14の両
端面にはVsが印加されることになり、しかもそ
の抵抗素子14の基準電位点がΔVだけずらされ
ており、従つてこれらの被抵抗素子14の各点と
接触したプローブ11乃至1nと、基準抵抗素子
の対応する各点と接触したプローブ31乃至3n
にそれぞれ得られている電圧の対応するものをマ
ルチプレクサ21,23で取出し、その出力を差
動増幅器25で偏差をとつてAD変換器28でデ
ジタル信号に変換して表示器29に表示すれば、
第3図の表示線31と同一のものが得られる。
This ΔV and the voltage Vs of the power supply 12' are added by an adder circuit, and this added value is applied to the other end of the resistance element 14 to be measured. Therefore, Vs is applied to both end faces of the resistive element 14 to be measured, and the reference potential point of the resistive element 14 is shifted by ΔV, so that each point of the resistive element 14 and Probes 1 1 to 1n in contact and probes 3 1 to 3n in contact with corresponding points on the reference resistance element
The multiplexers 21 and 23 take out the corresponding voltages obtained respectively, the output is deducted by the differential amplifier 25, converted into a digital signal by the AD converter 28, and displayed on the display 29.
The same display line 31 in FIG. 3 is obtained.

つまり第4図の場合と同様に市販のデータ収録
器32をそのまゝ使うことができる。しかもこの
場合においては第4図におけるフロート電源12
を必要とせず、かつ電源は12′の1個のみで済
みまたその他に演算増幅器35、加算回路36を
用いるが、これらは安価な市販のものを使用する
ことができ、簡単に組立てることができる。従つ
て第3図に示したものと比較して全体として頗る
安価なものを作ることができ、かつ第4図に示し
たものと比較して安定に動作し、従つて高い精度
の測定を行うことができ、しかも構成なものとな
る。
In other words, as in the case of FIG. 4, a commercially available data recorder 32 can be used as is. Moreover, in this case, the float power supply 12 in FIG.
In addition, an operational amplifier 35 and an adder circuit 36 are used, but these can be inexpensive commercially available products and can be easily assembled. . Therefore, compared to the one shown in Fig. 3, it is possible to make a device that is much cheaper overall, and compared to the one shown in Fig. 4, it operates more stably and can therefore perform measurements with high precision. It is possible to do this, and it is also a composition.

一般にデータ収録器32内には所定以上の偏差
となると不合格、偏差が所定値以下の場合は合格
とするような判定手段を内蔵したものがあり、そ
のような判定手段によつて偏差が所定値以内のも
のを合格として被測定抵抗素子の合否のみを表示
するようにしてもよい。またマルチプレクサ21
の出力のみを表示器37へ供給し(必要に応じ
AD変換などを行う)、第2図の特性線16と対
応し、かつΔVを差し引いた表示線38として表
示してもよい。この場合は基準抵抗素子22のプ
ローブ31乃至3nは必要とせず、たゞ参照電圧
発生回路34から基準点Psのプローブ3sの電
圧を作り、これとVsのみを出力することができ
ればよく、このプローブ3sの電圧は先にも述べ
たように被測定抵抗素子の種類が決つていれば、
予め決つたものとなり、基準抵抗素子22を設け
ることなく発生させることもできる。
Generally, some data recorders 32 have a built-in judgment means that judges the deviation to be a failure when the deviation is a predetermined value or more, and the judgment to pass if the deviation is less than a predetermined value. It is also possible to display only the pass/fail of the resistance element to be measured, with those within the value being considered as passes. Also multiplexer 21
Only the output of is supplied to the display 37 (if necessary
AD conversion, etc.) may be displayed as a display line 38 that corresponds to the characteristic line 16 in FIG. 2 and is obtained by subtracting ΔV. In this case, the probes 31 to 3n of the reference resistance element 22 are not required, and it is only necessary to generate the voltage of the probe 3s of the reference point Ps from the reference voltage generation circuit 34 and output only this and Vs. As mentioned above, if the type of resistance element to be measured is determined, the voltage of the probe 3s is
It is determined in advance and can be generated without providing the reference resistance element 22.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は抵抗偏差特性の説明に供するための可
変抵抗器を示す図、第2図は抵抗偏差特性線と基
準線との関係を示す図、第3図は従来の抵抗偏差
特性検査器を示すブロツク図、第4図は改良され
た抵抗偏差特性検査器を示すブロツク図、第5図
はこの発明による抵抗偏差特性検査器を示すブロ
ツク図である。 11乃至1n,31乃至3n:プローブ、14:
被測定抵抗素子、22:基準抵抗素子、21,2
3:マルチプレクサ、25:差動増幅器、28:
AD変換器、29,37:表示器、32:データ
収録器、35:演算増幅器、36:加算回路。
Figure 1 is a diagram showing a variable resistor for explaining resistance deviation characteristics, Figure 2 is a diagram showing the relationship between the resistance deviation characteristic line and the reference line, and Figure 3 is a diagram showing a conventional resistance deviation characteristic tester. 4 is a block diagram showing an improved resistance deviation characteristic tester, and FIG. 5 is a block diagram showing a resistance deviation characteristic tester according to the present invention. 1 1 to 1n, 3 1 to 3n: probe, 14:
Resistance element to be measured, 22: Reference resistance element, 21, 2
3: Multiplexer, 25: Differential amplifier, 28:
AD converter, 29, 37: display, 32: data recorder, 35: operational amplifier, 36: addition circuit.

Claims (1)

【特許請求の範囲】 1 被測定抵抗素子の予め定められた測定点に対
し接触される複数のプローブと、 その被測定抵抗素子の理想抵抗特性線上の予め
決められた基準点上の基準電圧及び被測定抵抗素
子の両端間に印加すべき両端間電圧を発生する参
照電圧発生回路と、 上記基準電圧及び上記基準点と対応する上記被
測定抵抗素子上の測定点と接触するプローブの電
圧が入力される演算増幅器と、 その演算増幅器の出力及び上記参照電圧発生回
路よりの両端間電圧とを加算する加算回路と、 その加算回路の出力側と上記演算増幅器の出力
側との間に上記被測定抵抗素子を接続する第1,
第2接続端子と、 上記プローブよりの電圧が順次取込まれるデー
タ集録器とを具備する抵抗偏差特性検査器。
[Claims] 1. A plurality of probes that are brought into contact with predetermined measurement points of a resistance element to be measured, and a reference voltage and a reference voltage at a predetermined reference point on an ideal resistance characteristic line of the resistance element to be measured. A reference voltage generation circuit that generates a voltage to be applied between both ends of the resistive element to be measured, and a voltage of a probe in contact with a measurement point on the resistive element to be measured that corresponds to the reference voltage and the reference point are input. an operational amplifier, an adder circuit that adds the output of the operational amplifier and the voltage across the voltage from the reference voltage generation circuit, and the device under test between the output side of the adder circuit and the output side of the operational amplifier. The first connecting the resistive element,
A resistance deviation characteristic tester comprising a second connection terminal and a data acquisition device from which voltages from the probe are sequentially acquired.
JP58078575A 1983-05-02 1983-05-02 Inspecting device for resistance deviation characteristic Granted JPS59203965A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58078575A JPS59203965A (en) 1983-05-02 1983-05-02 Inspecting device for resistance deviation characteristic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58078575A JPS59203965A (en) 1983-05-02 1983-05-02 Inspecting device for resistance deviation characteristic

Publications (2)

Publication Number Publication Date
JPS59203965A JPS59203965A (en) 1984-11-19
JPH0349072B2 true JPH0349072B2 (en) 1991-07-26

Family

ID=13665695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58078575A Granted JPS59203965A (en) 1983-05-02 1983-05-02 Inspecting device for resistance deviation characteristic

Country Status (1)

Country Link
JP (1) JPS59203965A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1617446A1 (en) 2004-07-16 2006-01-18 SMK Corporation Rotating input selection device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61167876A (en) * 1985-01-18 1986-07-29 Yokogawa Electric Corp Resistance type converting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1617446A1 (en) 2004-07-16 2006-01-18 SMK Corporation Rotating input selection device

Also Published As

Publication number Publication date
JPS59203965A (en) 1984-11-19

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